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1. 发明授权

US08786675B2 Systems using eye mounted displays 有权
标题翻译：使用眼睛安装显示器的系统
公开(公告)号：US08786675B2
公开(公告)日：2014-07-22
申请号：US12359951
申请日：2009-01-26
申请人： Michael F. Deering
发明人： Michael F. Deering
IPC分类号： G09G5/00 , H04N13/02 , H04N13/04
CPC分类号： G02B27/017 , G02B27/0093 , G02B27/0172 , G02B2027/0134 , G02B2027/0138 , G02B2027/0147 , G02B2027/0187 , G02C7/04 , G09G3/02 , H04N13/344
摘要： A display device is mounted on and/or inside the eye. The eye mounted display contains multiple sub-displays, each of which projects light to different retinal positions within a portion of the retina corresponding to the sub-display. The projected light propagates through the pupil but does not fill the entire pupil. In this way, multiple sub-displays can project their light onto the relevant portion of the retina. Moving from the pupil to the cornea, the projection of the pupil onto the cornea will be referred to as the corneal aperture. The projected light propagates through less than the full corneal aperture. The sub-displays use spatial multiplexing at the corneal surface. Various electronic devices interface to the eye mounted display.
摘要翻译：显示装置安装在眼睛和/或内部。眼睛安装的显示器包含多个子显示器，每个子显示器在对应于子显示器的视网膜的一部分内投射光到不同的视网膜位置。投影光通过瞳孔传播，但不会填满整个瞳孔。以这种方式，多个子显示器可将其光投射到视网膜的相关部分上。从瞳孔移动到角膜，将瞳孔投射到角膜上将被称为角膜孔。投影光通过少于全角膜孔径传播。子显示器在角膜表面使用空间复用。各种电子设备与眼睛安装的显示器接口。

2. 发明申请

US20080266300A1 Scalable High Performance 3D Graphics 有权
标题翻译：可扩展的高性能3D图形
公开(公告)号：US20080266300A1
公开(公告)日：2008-10-30
申请号：US12127737
申请日：2008-05-27
申请人： Michael F. Deering , Michael G. Lavelle
发明人： Michael F. Deering , Michael G. Lavelle
IPC分类号： G06T1/20
CPC分类号： G06T1/20 , G06T1/60 , G06T5/002 , G06T15/005
摘要： A high-speed ring topology. In one embodiment, two base chip types are required: a “drawing” chip, LoopDraw, and an “interface” chip, LoopInterface. Each of these chips have a set of pins that supports an identical high speed point to point unidirectional input and output ring interconnect interface: the LoopLink. The LoopDraw chip uses additional pins to connect to several standard memories that form a high bandwidth local memory sub-system. The LoopInterface chip uses additional pins to support a high speed host computer host interface, at least one video output interface, and possibly also additional non-local interconnects to other LoopInterface chip(s).
摘要翻译：高速环形拓扑。在一个实施例中，需要两种基本芯片类型：“绘图”芯片，LoopDraw和“接口”芯片，LoopInterface。每个芯片都有一组引脚，支持相同的高速点对点输入和输出环互连接口：LoopLink。 LoopDraw芯片使用额外的引脚连接到形成高带宽本地存储器子系统的多个标准存储器。 LoopInterface芯片使用额外的引脚来支持高速主机主机接口，至少一个视频输出接口，以及可能与其他LoopInterface芯片的附加非本地互连。

3. 发明申请

US20110221742A1 Scalable High Performance 3D Graphics 有权
标题翻译：可扩展的高性能3D图形
公开(公告)号：US20110221742A1
公开(公告)日：2011-09-15
申请号：US12898249
申请日：2010-10-05
申请人： Michael F. Deering , Michael G. Lavelle
发明人： Michael F. Deering , Michael G. Lavelle
IPC分类号： G06T15/00
CPC分类号： G06T1/20 , G06T1/60 , G06T5/002 , G06T15/005
摘要： A high-speed ring topology. In one embodiment, two base chip types are required: a “drawing” chip, LoopDraw, and an “interface” chip, LoopInterface. Each of these chips have a set of pins that supports an identical high speed point to point unidirectional input and output ring interconnect interface: the LoopLink. The LoopDraw chip uses additional pins to connect to several standard memories that form a high bandwidth local memory sub-system. The LoopInterface chip uses additional pins to support a high speed host computer host interface, at least one video output interface, and possibly also additional non-local interconnects to other LoopInterface chip(s).
摘要翻译：高速环形拓扑。在一个实施例中，需要两种基本芯片类型：“绘图”芯片，LoopDraw和“接口”芯片，LoopInterface。每个芯片都有一组引脚，支持相同的高速点对点输入和输出环互连接口：LoopLink。 LoopDraw芯片使用额外的引脚连接到形成高带宽本地存储器子系统的多个标准存储器。 LoopInterface芯片使用额外的引脚来支持高速主机主机接口，至少一个视频输出接口，以及可能与其他LoopInterface芯片的附加非本地互连。

4. 发明授权

US07379067B2 Scalable high performance 3D graphics 有权
标题翻译：可扩展的高性能3D图形
公开(公告)号：US07379067B2
公开(公告)日：2008-05-27
申请号：US11305474
申请日：2005-12-15
申请人： Michael F. Deering , Michael G. Lavelle
发明人： Michael F. Deering , Michael G. Lavelle
IPC分类号： G06T1/20 , G06T1/60 , G06F15/16
CPC分类号： G06T1/20 , G06T1/60 , G06T5/002 , G06T15/005
摘要： A high-speed ring topology. In one embodiment, two base chip types are required: a “drawing” chip, LoopDraw, and an “interface” chip, LoopInterface. Each of these chips have a set of pins that supports an identical high speed point to point unidirectional input and output ring interconnect interface: the LoopLink. The LoopDraw chip uses additional pins to connect to several standard memories that form a high bandwidth local memory sub-system. The LoopInterface chip uses additional pins to support a high speed host computer host interface, at least one video output interface, and possibly also additional non-local interconnects to other LoopInterface chip(s).
摘要翻译：高速环形拓扑。在一个实施例中，需要两种基本芯片类型：“绘图”芯片，LoopDraw和“接口”芯片，LoopInterface。每个芯片都有一组引脚，支持相同的高速点对点输入和输出环互连接口：LoopLink。 LoopDraw芯片使用额外的引脚连接到形成高带宽本地存储器子系统的多个标准存储器。 LoopInterface芯片使用额外的引脚来支持高速主机主机接口，至少一个视频输出接口，以及可能与其他LoopInterface芯片的附加非本地互连。

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