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1. 发明授权

US08994435B2 Switching core layout 有权
标题翻译：切换核心布局
公开(公告)号：US08994435B2
公开(公告)日：2015-03-31
申请号：US13490264
申请日：2012-06-06
申请人： Siraj Akhtar
发明人： Siraj Akhtar
IPC分类号： H01L25/00 , H03D7/14 , H03D7/16
CPC分类号： H03D7/1458 , H03D7/1433 , H03D7/1441 , H03D7/1483 , H03D7/165 , H03D2200/0019 , H03D2200/0082
摘要： Traditionally, mixers have been arranged symmetrically around the input signal, which has resulted in problems due to self-mixing or feed-through by the local oscillator signal. Here, however, the arrangement for a mixer has been changed to generally avoid self-mixing of the local oscillator signal. In particular, transistors in the switching core are merged according to the portion of the local oscillator signal received. This, in turn, results in the conductors, which carry the different portions of the local oscillator signal, being separated (or not having any crossings) so as to generally eliminate self-mixing or feed-through of the local oscillator signal. Complex IQ mixers realized using this arrangement benefit from improved sideband suppression and image rejection.
摘要翻译：传统上，混频器已经围绕输入信号对称布置，这导致了由于本机振荡器信号的自混合或馈通引起的问题。然而，这里，混频器的布置已经改变，以便大体上避免本地振荡器信号的自混合。特别地，切换核心中的晶体管根据所接收的本地振荡器信号的部分被合并。这又导致承载本地振荡器信号的不同部分的导体被分离（或不具有任何交叉），以便通常消除本机振荡器信号的自混合或馈通。使用这种安排实现的复杂IQ混音器可从改进的边带抑制和镜像抑制中获益。

2. 发明授权

US08963300B2 Semiconductor device with selective planished leadframe 有权
标题翻译：具有选择性平面引线框的半导体器件
公开(公告)号：US08963300B2
公开(公告)日：2015-02-24
申请号：US14066885
申请日：2013-10-30
申请人： Texas Instruments Incorporated
发明人： Donald C. Abbott
IPC分类号： H01L23/495 , H01L21/48 , H01L21/64
CPC分类号： H01L21/4842 , H01L21/4821 , H01L21/561 , H01L21/64 , H01L23/49503 , H01L23/49541 , H01L23/49548 , H01L23/49565 , H01L23/49575 , H01L24/85 , H01L24/97 , H01L2224/05599 , H01L2224/85 , H01L2924/00014 , H01L2924/0002 , H01L2924/181 , H01L2924/2064 , Y10T29/49121 , H01L2924/00 , H01L2224/45099
摘要： A semiconductor device includes a leadframe, a semiconductor chip, a packaging compound. The leadframe has a pad with straps. Leads on the leadframe include first and second portions. The pad, the straps, and the leads have a mechanically rough surface. The semiconductor chip is attached to the pad and wire bonded to the first lead portions. A packaging compound encapsulates the chip, the pad, the straps, the bonding wires and the first lead portions. The second lead portions are left un-encapsulated. The strap ends are exposed on the surface of the package. At least one of the straps includes a portion adjacent to the exposed end. This portion having a mechanically smooth surface transitioning by a step into the rough surface of the remainder of the strap.
摘要翻译：半导体器件包括引线框，半导体芯片，封装化合物。引线框架带有带子的垫子。引线框上的引线包括第一和第二部分。垫，带和引线具有机械粗糙的表面。半导体芯片附接到焊盘，并且引线接合到第一引线部分。封装组合物封装芯片，焊盘，带，接合线和第一引线部分。第二引线部分未封装。带端部暴露在包装的表面上。带中的至少一个包括与暴露端相邻的部分。该部分具有机械平滑的表面，通过台阶转移到带的其余部分的粗糙表面。

3. 发明授权

US08810153B2 Led power supply systems and methods 有权
标题翻译： LED电源系统和方法
公开(公告)号：US08810153B2
公开(公告)日：2014-08-19
申请号：US13182000
申请日：2011-07-13
申请人： Katsura Yoshio , Yasuo Matsumura
发明人： Katsura Yoshio , Yasuo Matsumura
IPC分类号： H05B37/02
CPC分类号： H05B33/0815 , H05B33/0827
摘要： One aspect of the present invention includes a light-emitting diode (LED) power supply system. The system includes an LED regulator configured to monitor at least one LED voltage associated with a respective at least one activated LED string and to generate an LED regulation voltage based on the at least one LED voltage relative to an LED power voltage that provides power to the at least one activated LED string. The system also includes a power converter configured to generate the LED power voltage and to regulate the LED power voltage based on the LED regulation voltage.
摘要翻译：本发明的一个方面包括发光二极管（LED）电源系统。该系统包括LED调节器，其被配置为监测与相应的至少一个激活的LED串相关联的至少一个LED电压，并且基于相对于向所述至少一个激活的LED串提供电力的LED功率电压的至少一个LED电压来产生LED调节电压至少一个激活的LED串。该系统还包括功率转换器，其被配置为产生LED电源电压并且基于LED调节电压来调节LED电源电压。

4. 发明申请

US20140223047A1 SYSTEM AND METHOD FOR PER-TASK MEMORY PROTECTION FOR A NON-PROGRAMMABLE BUS MASTER 审中-公开
标题翻译：用于非可编程总线主机的全局存储器保护的系统和方法
公开(公告)号：US20140223047A1
公开(公告)日：2014-08-07
申请号：US14015561
申请日：2013-08-30
申请人： TEXAS INSTRUMENTS INCORPORATION
发明人： Balatripura Sodemma CHAVALI , Karl Friedrich GREB , Rajeev SUVARNA
IPC分类号： G06F13/28 , G06F13/40
CPC分类号： G06F13/4068 , G06F12/1416 , G06F12/1458 , G06F12/1483 , G06F13/1605 , G06F13/4221 , G06F2212/1016 , G06F2212/1052
摘要： A system includes a non-programmable bus master. The non-programmable bus master includes a memory protection unit (MPU) to operate in a first configuration with a first set of access permissions and a second configuration with a second set of access permissions, and hardware logic. The hardware logic executes a first task and a second task. The tasks generate transactions and the hardware logic switches between executing the first and second tasks. The hardware logic also causes the MPU to operate in the first configuration when the hardware logic executes the first task and causes the MPU to operate in the second configuration when the hardware logic executes the second task.
摘要翻译：系统包括一个不可编程总线主机。非可编程总线主机包括一个存储器保护单元（MPU），以在具有第一组访问权限的第一配置和具有第二组访问许可的第二配置和硬件逻辑中操作。硬件逻辑执行第一任务和第二任务。任务生成事务，硬件逻辑在执行第一和第二任务之间切换。当硬件逻辑执行第一任务时，硬件逻辑还使得MPU在第一配置中操作，并且当硬件逻辑执行第二任务时使得MPU在第二配置中操作。

5. 发明授权

US08493419B2 Mitigation of artifacts in PWM illumination imaging 有权
标题翻译： PWM照明成像中的伪影减轻
公开(公告)号：US08493419B2
公开(公告)日：2013-07-23
申请号：US13466606
申请日：2012-05-08
申请人： Daniel J. Morgan
发明人： Daniel J. Morgan
IPC分类号： G09G5/10
CPC分类号： G09G5/10 , G09G3/2018 , G09G5/02 , G09G5/399 , G09G2320/0276 , G09G2340/0428 , G09G2340/06 , H04N9/3114 , H04N9/3123
摘要： A system and method for reducing pulse width modulation contouring artifacts. Each input intensity value is translated to at least one non-binary bit pattern for display. Many of the input intensity values are translated to at least two alternate non-binary bit patterns. The alternate codes are used to smooth the transition between intensity codes as major bits are turned on. The smoothing occurs by the gradual transition from codes that do not use the major bit to codes that do use the major bit. Typically the alternate codes are selected based on the location of the pixel in a spatial pattern (100) and the alternate codes are spatially alternated from one pixel (102) to the next (104). Other embodiments temporally alternate the codes from one period—typically a frame period—to the next. Still other embodiments alternate the codes both spatially and temporally.
摘要翻译：用于减少脉宽调制轮廓假象的系统和方法。每个输入强度值被转换为至少一个非二进制位模式用于显示。许多输入强度值被转换为至少两个交替的非二进制位模式。当主位打开时，替代代码用于平滑强度代码之间的转换。平滑发生在不使用主要位的代码逐渐过渡到使用主要位的代码。通常，基于空间图案（100）中的像素的位置来选择替代代码，并且替代代码在空间上从一个像素（102）交替到下一个（104）。其他实施例在时间上将代码从一个周期（通常是帧周期）交替到下一个周期。另外其他实施例在空间和时间上交替代码。

6. 发明申请

US20070219800A1 Voice message systems and methods 审中-公开
标题翻译：语音留言系统和方法
公开(公告)号：US20070219800A1
公开(公告)日：2007-09-20
申请号：US11374791
申请日：2006-03-14
申请人： James Hymel , Prathibha Tammana
发明人： James Hymel , Prathibha Tammana
IPC分类号： G10L21/00
CPC分类号： H04M3/53333 , H04M1/6505 , H04M1/72519 , H04M1/7255 , H04M2201/38 , H04M2201/40 , H04M2201/42 , H04M2203/301 , H04M2203/303
摘要： A voice message system is provided that includes a voice control that receives voice messages and identified voice message pattern types within respective voice messages. The voice message system also includes a graphical user interface that displays voice message representations associated with the voice messages and visual indicator identifiers that reference portions of the voice message representations that contain the identified voice message pattern types.
摘要翻译：提供了一种语音消息系统，其包括语音控制，其在相应语音消息内接收语音消息和识别的语音消息模式类型。语音消息系统还包括显示与语音消息相关联的语音消息表示的图形用户界面以及引用包含所识别的语音消息模式类型的语音消息表示的部分的视觉指示符标识符。

7. 发明授权

US5654741A Spatial light modulator display pointing device 失效
标题翻译：空间光调制器显示指示装置
公开(公告)号：US5654741A
公开(公告)日：1997-08-05
申请号：US567439
申请日：1995-12-05
申请人： Jeffrey B. Sampsell , Toshio Shionoya
发明人： Jeffrey B. Sampsell , Toshio Shionoya
IPC分类号： G06F3/041 , G06F3/038 , G06F3/042 , G09F9/00 , G09G5/08
CPC分类号： G06F3/0386 , G06F3/042
摘要： A display system with a pointer that is not restricted by wires or sensors. The display uses a spatial light modulator (14) for projecting an image on the screen (20). During a time period when all of the cells of the modulator (14) are in the same state, a cursor projected onto the screen by the pointer is reimaged from the screen to a detector (26), which translates the cursor image into signals for a central processing unit (38). The central processing unit (38) then directs the system as to what tasks are being dictated by the cursor.
摘要翻译：具有不受电线或传感器限制的指针的显示系统。显示器使用用于在屏幕（20）上投影图像的空间光调制器（14）。在调制器（14）的所有单元处于相同状态的时间段期间，由指针投影到屏幕上的光标被重新映射到屏幕，检测器（26）将光标图像转换成中央处理单元（38）。中央处理单元（38）然后引导系统关于由光标指定的任务。

8. 发明授权

US10396852B2 Long preamble and duty cycle based coexistence mechanism for power line communication (PLC) networks 有权
公开(公告)号：US10396852B2
公开(公告)日：2019-08-27
申请号：US15946041
申请日：2018-04-05
申请人： Texas Instruments Incorporated
发明人： Kumaran Vijayasankar , Ramanuja Vedantham , Tarkesh Pande
IPC分类号： H04B3/54
摘要： Embodiments of methods and systems for supporting coexistence of multiple technologies in a Power Line Communication (PLC) network are disclosed. A long coexistence preamble sequence may be transmitted by a device that has been forced to back off the PLC channel multiple times. The long coexistence sequence provides a way for the device to request channel access from devices on the channel using other technology. The device may transmit a data packet after transmitting the long coexistence preamble sequence. A network duty cycle time may also be defined as a maximum allowed duration for nodes of the same network to access the channel. When the network duty cycle time occurs, all nodes will back off the channel for a duty cycle extended inter frame space before transmitting again. The long coexistence preamble sequence and the network duty cycle time may be used together.

9. 发明授权

US10033341B2 Programmable impedance network in an amplifier 有权
公开(公告)号：US10033341B2
公开(公告)日：2018-07-24
申请号：US15464091
申请日：2017-03-20
申请人： Texas Instruments Incorporated
发明人： Rajendrakumar Joish
IPC分类号： H03G1/00 , H03F3/45 , H04B1/10
摘要： The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input. A second transistor receives a second input. A plurality of impedance networks is coupled between the first transistor and the second transistor. At least one impedance network of the plurality of impedance networks includes a first impedance path and a second impedance path. The first impedance path is activated during single ended operation, and the second impedance path is activated during differential operation.

10. 发明授权

US09373569B1 Flat no-lead packages with electroplated edges 有权
标题翻译：带电镀边缘的扁平无铅封装
公开(公告)号：US09373569B1
公开(公告)日：2016-06-21
申请号：US14842460
申请日：2015-09-01
申请人： Texas Instruments Incorporated
发明人： Reynaldo Corpuz Javier , Alok Kumar Lohia , Andy Quang Tran
IPC分类号： H01L21/44 , H01L23/495 , H01L21/48 , H01L21/56 , H01L21/78 , H01L23/31
CPC分类号： H01L23/49582 , H01L21/4821 , H01L21/561 , H01L23/293 , H01L23/3107 , H01L23/3675 , H01L23/49503 , H01L23/49541 , H01L23/49548 , H01L23/49568 , H01L23/49579 , H01L24/09 , H01L24/29 , H01L24/46 , H01L24/97 , H01L2224/2908 , H01L2224/29144 , H01L2224/29155 , H01L2224/29164 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48464 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01029 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H01L2924/00012 , H01L2224/45099
摘要： A method of forming packaged semiconductor devices includes providing a lead frame sheet of flat no-lead lead frames having a semiconductor die on a die pad, terminals, and plastic encapsulation except on a back side of the sheet to provide an exposed thermal die pad and exposed back sides of the terminals. Partial sawing in saw lanes begins from the back side through the terminals terminating within the plastic encapsulation to provide exposed side walls of the terminals and of the plastic encapsulation. The exposed thermal pad and exposed back side of the terminals are all shorted together to form exposed electrically interconnected metal surfaces (interconnected surfaces). The interconnected surfaces are electroplated with a solder wetable metal or metal alloy plating layer. The interconnected surfaces are decoupled. A second sawing in the saw lanes finishes sawing through the plastic encapsulation to provide singulation, forming a plurality of packaged semiconductor devices.
摘要翻译：一种形成封装半导体器件的方法包括：提供一个平板无引线引线框架的引线框架片，其具有在芯片焊盘上的半导体管芯，端子和塑料封装，除了片材的背面以提供暴露的热管芯焊盘，暴露在终端的背面。锯条中的部分锯切从背面开始，通过终端在塑料封装内终止，以提供端子的暴露侧壁和塑料封装。端子的暴露的热垫和暴露的背面全部短接在一起形成暴露的电互连金属表面（互连表面）。互连的表面用可焊接的可润湿金属或金属合金镀层电镀。互连的表面是去耦的。在锯条中的第二次锯切完成了通过塑料封装的锯切，以提供单一化，形成多个封装的半导体器件。

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