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    • 4. 发明授权
    • Method and system for improving simulation performance
    • 提高仿真性能的方法和系统
    • US07684971B1
    • 2010-03-23
    • US10907343
    • 2005-03-30
    • Fredrik LarssonBengt Werner
    • Fredrik LarssonBengt Werner
    • G06F9/45
    • G06F9/45504
    • The invention is a technique that allows very efficient execution of an instruction set simulator (ISS) when certain code fragments are simulated. They occur frequently in operating systems, when a processor waits for something to occur. These loops perform very little, if any, computation. An automatic analysis of the code fragments is performed to determine whether they can be transformed to “fast forward” when execution loops through the code fragment. This is done by the creation of a function g, that takes a number of state changes as an input and can compute the state at a time T by a single application of the function, rather than applying the next state function repeatedly until time T is reached. An important aspect of the resulting optimization is that it produces exactly the same simulated result as compared to when it is not applied, i.e. the optimization is non-intrusive.
    • 本发明是当模拟某些代码片段时允许非常有效地执行指令集仿真器(ISS)的技术。 当处理器等待某些事情发生时,它们经常在操作系统中出现。 这些循环执行很少(如果有的话)计算。 执行代码片段的自动分析以确定当执行循环通过代码片段时它们是否可以被转换为“快进”。 这是通过创建一个函数g来完成的,该函数g将多个状态变化作为输入,并且可以通过该函数的单个应用计算一次的状态,而不是重复应用下一个状态函数,直到时间T为 到达。 最终优化的一个重要方面是,与不应用时相比,它产生完全相同的模拟结果,即优化是非侵入性的。
    • 7. 发明申请
    • METHOD AND SYSTEM FOR MULTIMODE SIMULATOR GENERATION FROM AN INSTRUCTION SET ARCHITECTURE SPECIFICATION
    • 来自指令集架构规范的多模仿真器生成方法与系统
    • US20050015754A1
    • 2005-01-20
    • US10710099
    • 2004-06-18
    • Bengt WernerMagnus ChristenssonFredrik Larsson
    • Bengt WernerMagnus ChristenssonFredrik Larsson
    • G06F9/45G06F9/455
    • G06F9/45508G06F9/45516
    • The present invention discloses method and system for a multimode simulator having an emulation core with improved performance. In an embodiment of the invention, the overhead caused by the exclusive use of the simulation technique using one instruction-at-a-time interpretation is reduced by additionally using binary translation for executed blocks of interpreted instructions (i.e. that contain no jumps out of the block) from the same instruction set architecture description. Since performing translations too frequently can undesirably increase overhead by overloading the cache, the binary translation is only performed for blocks that are executed frequently. Once the blocks are translated e.g. by forming the block from instructions via templates and generating the collective code, the overall simulator performance is significantly improved by running the blocks instead of running the instructions one-at-a-time.
    • 本发明公开了一种具有改进性能的仿真核心的多模式仿真器的方法和系统。 在本发明的一个实施例中,通过另外对被解释的指令的执行块额外使用二进制转换来减少由使用一次一次指令的独占使用的模拟技术引起的开销(即,不包含从 块)从相同的指令集架构描述。 由于执行翻译太频繁可能会不期望地通过超载高速缓存来增加开销,所以仅对经常执行的块执行二进制转换。 一旦块被翻译,例如 通过通过模板从指令形成块并生成集合代码,通过运行块而不是一次一个地运行指令来显着改善整体模拟器的性能。