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1. 发明授权

US08759901B2 Nonvolatile semiconductor memory device including a charge storage layer and semiconductor region in a groove 有权
标题翻译：非易失性半导体存储器件，其包括电荷存储层和凹槽中的半导体区域
公开(公告)号：US08759901B2
公开(公告)日：2014-06-24
申请号：US12855212
申请日：2010-08-12
申请人： Masaaki Higuchi , Yoshio Ozawa , Katsuyuki Sekine , Ryota Fujitsuka
发明人： Masaaki Higuchi , Yoshio Ozawa , Katsuyuki Sekine , Ryota Fujitsuka
IPC分类号： H01L29/792
CPC分类号： H01L29/792 , H01L21/28282 , H01L29/4234 , H01L29/513 , H01L29/66833
摘要： According to one embodiment, a nonvolatile semiconductor memory device including a semiconductor layer with a main surface, a first insulating layer formed on the main surface of the semiconductor layer, a charge storage layer formed on the first insulating layer, a second insulating layer formed on the charge storage layer, and a control gate electrode formed on the second insulating layer. At least one inelastic scattering film that reduces energy of electrons by scattering is contained in at least one of the charge storage layer and second insulating layer.
摘要翻译：根据一个实施例，一种非易失性半导体存储器件，包括具有主表面的半导体层，形成在半导体层的主表面上的第一绝缘层，形成在第一绝缘层上的电荷存储层，形成在第一绝缘层上的第二绝缘层电荷存储层和形成在第二绝缘层上的控制栅电极。至少一个通过散射减少电子能量的非弹性散射膜被包含在电荷存储层和第二绝缘层中的至少一个中。

2. 发明授权

US08754459B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US08754459B2
公开(公告)日：2014-06-17
申请号：US13728311
申请日：2012-12-27
申请人： Masaaki Higuchi , Masaru Kito
发明人： Masaaki Higuchi , Masaru Kito
IPC分类号： H01L27/108 , H01L27/105 , H01L27/11 , H01L27/115 , H01L21/8229 , H01L21/8239 , H01L27/112 , H01L29/68
CPC分类号： H01L27/105 , H01L21/8229 , H01L21/8239 , H01L27/11 , H01L27/112 , H01L27/115 , H01L27/11582 , H01L29/685 , H01L29/792
摘要： According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a plurality of insulative separating films, a channel body, and a memory film. The stacked body includes a plurality of electrode layers and a plurality of insulating layers. The plurality of insulative separating films separates the stacked body into a plurality. The channel body extends in the stacking direction between the plurality of insulative separating films. A width of the electrode layer of a lower layer side between the insulative separating film and the memory film is greater than a width of the electrode layer of an upper layer side between the insulative separating film and the memory film. An electrical resistivity of the electrode layer is higher for the electrode layer of the lower layer side having the greater width than for the electrode layer of the upper layer side having the lesser width.
摘要翻译：根据一个实施例，半导体存储器件包括衬底，层叠体，多个绝缘分离膜，通道体和存储膜。层叠体包括多个电极层和多个绝缘层。多个绝缘分离膜将堆叠体分离成多个。通道体在层叠方向上在多个绝缘分离膜之间延伸。绝缘分离膜和记忆膜之间的下层侧的电极层的宽度大于绝缘分离膜和记忆膜之间的上层侧的电极层的宽度。对于具有比具有较小宽度的上层侧的电极层的宽度大的下层侧的电极层，电极层的电阻率较高。

3. 发明申请

US20130234222A1 SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：半导体存储器件
公开(公告)号：US20130234222A1
公开(公告)日：2013-09-12
申请号：US13598748
申请日：2012-08-30
申请人： Naoki YASUDA , Masaaki Higuchi , Katsuyuki Sekine , Masao Shingu
发明人： Naoki YASUDA , Masaaki Higuchi , Katsuyuki Sekine , Masao Shingu
IPC分类号： H01L29/78
CPC分类号： H01L27/11582 , G11C16/0483
摘要： A semiconductor memory device includes a substrate, a structure body, a semiconductor layer, and a memory film. The memory film is provided between the semiconductor layer and the plurality of electrode films. The memory film includes a charge storage film, a block film, and a tunnel film. The block film is provided between the charge storage film and the plurality of electrode films. The tunnel film is provided between the charge storage film and the semiconductor layer. The tunnel film includes a first film containing silicon oxide, a second film containing silicon oxide, and a third film provided between the first film and the second film and containing silicon oxynitride. When a composition of the silicon oxynitride contained in the third film is expressed by a ratio x of silicon oxide and a ratio (1−x) of silicon nitride, 0.5≦x
摘要翻译：半导体存储器件包括衬底，结构体，半导体层和存储膜。存储膜设置在半导体层和多个电极膜之间。存储膜包括电荷存储膜，块膜和隧道膜。阻挡膜设置在电荷存储膜和多个电极膜之间。隧道膜设置在电荷存储膜和半导体层之间。隧道膜包括含有氧化硅的第一膜，含有氧化硅的第二膜和设置在第一膜和第二膜之间并含有氮氧化硅的第三膜。当第三膜中所含的氮氧化硅的组成由氧化硅的比率x和氮化硅的比例（1-x）表示时，0.5×x≤1。

4. 发明授权

US08254175B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08254175B2
公开(公告)日：2012-08-28
申请号：US12638836
申请日：2009-12-15
申请人： Masaaki Higuchi , Hiroshi Matsuba , Yoshio Ozawa , Tetsuya Kai
发明人： Masaaki Higuchi , Hiroshi Matsuba , Yoshio Ozawa , Tetsuya Kai
IPC分类号： G11C11/34
CPC分类号： H01L21/28282
摘要： A semiconductor device includes a semiconductor region, a tunnel insulating film formed on the semiconductor region, a charge-storage insulating film formed on the tunnel insulating film, a block insulating film formed on the charge-storage insulating film, and a control gate electrode formed on the block insulating film, wherein the tunnel insulating film comprises a first region which is formed on a surface of the semiconductor region and contains silicon and oxygen, a second region which contains silicon and nitrogen, a third region which is formed on a back surface of the charge-storage insulating film and contains silicon and oxygen, and an insulating region which is formed at least between the first region and the second region or between the second region and the third region, and contains silicon and nitrogen and oxygen and the second region is formed between the first region and the third region.
摘要翻译：半导体器件包括半导体区域，形成在半导体区域上的隧道绝缘膜，形成在隧道绝缘膜上的电荷存储绝缘膜，形成在电荷存储绝缘膜上的块绝缘膜和形成的控制栅电极在所述块绝缘膜上，其中所述隧道绝缘膜包括形成在所述半导体区域的表面上并且包含硅和氧的第一区域，包含硅和氮的第二区域，形成在所述第二区域的背面的电荷存储绝缘膜并且包含硅和氧，以及至少形成在第一区域和第二区域之间或者在第二区域和第三区域之间形成的绝缘区域，并且包含硅和氮和氧，并且第二区域形成在第一区域和第三区域之间。

5. 发明申请

US20120068251A1 SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：半导体存储器件
公开(公告)号：US20120068251A1
公开(公告)日：2012-03-22
申请号：US13004238
申请日：2011-01-11
申请人： Masaaki Higuchi , Junya Fujita
发明人： Masaaki Higuchi , Junya Fujita
IPC分类号： H01L29/792
CPC分类号： H01L27/11582 , H01L29/40114 , H01L29/7926
摘要： According to one embodiment, a semiconductor memory device includes a multilayer body, a block layer, a charge storage layer, a tunnel layer, and a semiconductor pillar. The multilayer body includes a plurality of insulating films and electrode films alternately stacked. The multilayer body includes a through hole extending in stacking direction of the insulating films and the electrode films. The block layer is provided on an inner surface of the through hole. The charge storage layer is surrounded by the block layer. The tunnel layer is surrounded by the charge storage layer. The semiconductor pillar is surrounded by the tunnel layer. Dielectric constant of a portion of the tunnel layer on a side of the semiconductor pillar is higher than dielectric constant of a portion of the tunnel layer on a side of the charge storage layer.
摘要翻译：根据一个实施例，半导体存储器件包括多层体，块层，电荷存储层，隧道层和半导体柱。多层体包括交替层叠的多个绝缘膜和电极膜。多层体包括在绝缘膜和电极膜的堆叠方向上延伸的通孔。阻挡层设置在通孔的内表面上。电荷存储层被阻挡层包围。隧道层被电荷存储层包围。半导体柱被隧道层包围。半导体柱一侧的隧道层的一部分的介电常数高于电荷存储层一侧的隧道层的一部分的介电常数。

6. 发明授权

US07004134B2 Engine generator 失效
标题翻译：发动机发电机
公开(公告)号：US07004134B2
公开(公告)日：2006-02-28
申请号：US10778889
申请日：2004-02-12
申请人： Masaaki Higuchi
发明人： Masaaki Higuchi
IPC分类号： F02P23/00
CPC分类号： F02B75/16 , F02B63/04 , F02B63/048 , F02B2063/046
摘要： A positioning pin is knocked onto a crankshaft of an engine and a key way is formed in a boss of a first flywheel. When an outer rotor type generator is connected with the engine, the boss of the first flywheel is fitted over the crankshaft so as to adjust the positioning pin to the key way. When an inner rotor type generator is connected with the engine, a rotor shaft on which a rotor of a generator is mounted is fitted to a second flywheel so as to adjust the positioning pin to a key way formed in the second flywheel. The ignition angle of the engine is determined by fitting the positioning pin to the key way.
摘要翻译：定位销被撞击到发动机的曲轴上，并且在第一飞轮的凸台中形成关键方式。当外转子型发电机与发动机连接时，第一飞轮的凸台装配在曲轴上，以便将定位销调整为关键方式。当将内转子式发电机与发动机连接时，将安装有发电机的转子的转子轴装配到第二飞轮上，以将定位销调整成形成在第二飞轮中的键。发动机的点火角通过将定位销配合到钥匙方式来确定。

7. 发明授权

US06661107B2 Engine generator 失效
公开(公告)号：US06661107B2
公开(公告)日：2003-12-09
申请号：US10012414
申请日：2001-12-12
申请人： Masaaki Higuchi , Shinichi Saito
发明人： Masaaki Higuchi , Shinichi Saito
IPC分类号： H02P904
CPC分类号： F02B77/13 , F02B63/04 , F02B63/048 , F02B75/16 , F02B2063/046
摘要： An engine generator having an engine unit and generator are accommodated in a noise insulation case with a crankshaft oriented in a widthwise direction of the noise insulation case. An air cleaner is disposed at the front end of the noise insulation case and a muffler is disposed at the rear end of the noise insulation case with an engine between. When the engine generator is used as a generator, a generator and a recoil starter are connected with one end of the crankshaft. When the engine generator is used as a utility engine, the recoil starter is connected with one end of the crankshaft and a driven member is connected with the other end of the crankshaft.

8. 外观设计

USD309597S Engine generator 失效
公开(公告)号：USD309597S
公开(公告)日：1990-07-31
申请号：US110681
申请日：1987-10-20
申请人： Masaaki Higuchi , Masaru Atsuumi , Yasuo Otake , Yukinori Itoh
设计人： Masaaki Higuchi , Masaru Atsuumi , Yasuo Otake , Yukinori Itoh

9. 发明授权

US08829593B2 Semiconductor memory device having three-dimensionally arranged memory cells, and manufacturing method thereof 有权
标题翻译：具有三维布置的存储单元的半导体存储器件及其制造方法
公开(公告)号：US08829593B2
公开(公告)日：2014-09-09
申请号：US12726952
申请日：2010-03-18
申请人： Katsuyuki Sekine , Kensuke Takano , Masaaki Higuchi , Tetsuya Kai , Yoshio Ozawa
发明人： Katsuyuki Sekine , Kensuke Takano , Masaaki Higuchi , Tetsuya Kai , Yoshio Ozawa
IPC分类号： H01L29/792 , H01L21/336 , H01L29/423 , H01L27/115 , H01L29/788
CPC分类号： H01L27/11578 , H01L27/11551 , H01L27/11556 , H01L27/11582 , H01L29/42332 , H01L29/7881 , H01L29/792 , H01L29/7926
摘要： A first select transistor is formed on a semiconductor substrate. Memory cell transistors are stacked on the first select transistor and connected in series. A second select transistor is formed on the memory cell transistors. The memory cell transistors include a tapered semiconductor pillar which increases in diameter from the first select transistor toward the second select transistor, a tunnel dielectric film formed on the side surface of the semiconductor pillar, a charge storage layer which is formed on the side surface of the tunnel dielectric film and which increases in charge trap density from the first select transistor side toward the second select transistor side, a block dielectric film formed on the side surface of the charge storage layer, and conductor films which are formed on the side surface of the block dielectric film and which serve as gate electrodes.
摘要翻译：第一选择晶体管形成在半导体衬底上。存储单元晶体管堆叠在第一选择晶体管上并串联连接。在存储单元晶体管上形成第二选择晶体管。存储单元晶体管包括从第一选择晶体管朝向第二选择晶体管的直径增加的锥形半导体柱，形成在半导体柱的侧表面上的隧道电介质膜，形成在半导体柱的侧表面上的电荷存储层隧道电介质膜，并且其从第一选择晶体管侧朝向第二选择晶体管侧的电荷陷阱密度增加，形成在电荷存储层的侧表面上的块状电介质膜和形成在电荷存储层的侧表面上的导体膜该块介质膜并用作栅电极。

10. 发明授权

US08772859B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US08772859B2
公开(公告)日：2014-07-08
申请号：US13415057
申请日：2012-03-08
申请人： Masaaki Higuchi
发明人： Masaaki Higuchi
IPC分类号： H01L29/792
CPC分类号： H01L27/11582 , H01L27/1157
摘要： According to one embodiment, a semiconductor memory device includes a substrate, a first stacked body, a second stacked body, a memory film, a gate insulating film, and a channel body. The first stacked body has a plurality of electrode layers and a plurality of first insulating layers. The second stacked body has a selector gate and a second insulating layer. The memory film is provided on a sidewall of a first hole. The gate insulating film is provided on a sidewall of a second hole. The channel body is provided on an inner side of the memory film and on an inner side of the gate insulating film. A step part is provided between a side face of the selector gate and the second insulating layer. A region positioned near a top end of the selector gate of the channel body is silicided.
摘要翻译：根据一个实施例，半导体存储器件包括衬底，第一层叠体，第二层叠体，存储膜，栅极绝缘膜和通道体。第一层叠体具有多个电极层和多个第一绝缘层。第二层叠体具有选择栅和第二绝缘层。记忆膜设置在第一孔的侧壁上。栅极绝缘膜设置在第二孔的侧壁上。通道体设置在存储膜的内侧和栅极绝缘膜的内侧。在选择栅极的侧面和第二绝缘层之间设置台阶部。位于通道主体的选择器门的顶端附近的区域被硅化。

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