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1. 发明申请

US20200022056A1 PATH CONTROLLER AND PATH CONTROL METHOD 审中-公开
公开(公告)号：US20200022056A1
公开(公告)日：2020-01-16
申请号：US16443570
申请日：2019-06-17
申请人： FUJITSU LIMITED
发明人： Koichiro Yamashita , Takahisa Suzuki
IPC分类号： H04W40/18 , H04W40/20 , H04W40/12 , H04W40/04
摘要： A path controller includes a memory, and a processor coupled to the memory and configured to acquire a weather condition of an installation place of a plurality of nodes, the weather condition changing a communication quality of the plurality of nodes, and control a node that is a connection candidate in the plurality of nodes, based on the acquired weather condition so as to determine a communication path between the plurality of nodes.

2. 发明授权

US10515541B2 Control device, sensor node, and computer-readable recording medium 有权
公开(公告)号：US10515541B2
公开(公告)日：2019-12-24
申请号：US15700611
申请日：2017-09-11
申请人： FUJITSU LIMITED
发明人： Koichiro Yamashita , Takahisa Suzuki , Koji Kurihara , Toshiya Otomo
IPC分类号： H04W84/18 , G08C25/00
摘要： A control device includes: a processor configured to: control calibration of sensing values in a sensor node group formed of sensor nodes each including a sensor and a wireless device and being capable of performing multi-hop communication; divide the sensor node group into a plurality of clusters such that each of the clusters includes at least one partial cluster including a relay node and a child node that performs wireless communication; collect an average of sensing values in each of the partial clusters from the relay node of each of the partial clusters; calculate a calibration reference value of each of the clusters from the collected averages of the respective partial clusters; and provide the calculated calibration reference value of each of the clusters to each of the clusters.

3. 发明授权

US10425879B2 Control device, control method, and computer-readable recording medium 有权
公开(公告)号：US10425879B2
公开(公告)日：2019-09-24
申请号：US15649109
申请日：2017-07-13
申请人： FUJITSU LIMITED
发明人： Koichiro Yamashita , Toshiya Otomo , Takahisa Suzuki , Koji Kurihara
IPC分类号： H04W40/10 , H04W52/02 , H04W84/18
摘要： A control device includes: a processor configured to: control a multihop communication path in a wireless network that includes a node group; when a first power storage speed of a target relay node in the node group is negative, calculate a first estimated time that is needed to reach a target power-storage value in a case where the target relay node is in a non-relay operating state; and in accordance with a length of the first estimated time calculated, change a state of the target relay node into the non-relay operating state or a stop state and change a state of another node, which is in the non-relay operating state, into a relay operating state.

4. 发明授权

US10091095B2 System, node, failure determining system, failure determining method, and computer product 有权
公开(公告)号：US10091095B2
公开(公告)日：2018-10-02
申请号：US15057476
申请日：2016-03-01
申请人： FUJITSU LIMITED
发明人： Toshiya Otomo , Koichiro Yamashita , Takahisa Suzuki , Hiromasa Yamauchi
IPC分类号： H04L12/733 , H04W4/70 , H04W40/22 , H04W84/18 , H04W24/04 , H04W4/00 , H04L12/703 , H04L12/24 , H04W40/34
摘要： A system has a group of nodes that perform multi-hop communication therebetween and a communications apparatus that communicates with a node included in the group of nodes. The node adds to data transmitted by the node, a hop count updated each time the data is transferred by the multi-hop communication and a reference hop count for the data to be transferred from the node to the communications apparatus, and transmits the data. The communications apparatus, when receiving the data, compares the reference hop count and the hop count added to the data, and based on a result of comparison, determines whether failure has occurred at a given node in the group of nodes.

5. 发明授权

US09794858B2 Data processing apparatus, data processing system, and data processing method 有权
公开(公告)号：US09794858B2
公开(公告)日：2017-10-17
申请号：US14603718
申请日：2015-01-23
申请人： FUJITSU LIMITED
发明人： Takahisa Suzuki , Koichiro Yamashita , Hiromasa Yamauchi , Koji Kurihara , Toshiya Otomo , Yuta Teranishi
IPC分类号： H04W48/08 , H04W8/26 , H04W4/02 , H04W48/16 , H04W24/00 , H04L29/08 , H04W84/18 , H04W4/00
CPC分类号： H04W48/08 , H04L67/12 , H04W4/023 , H04W4/38 , H04W4/50 , H04W8/26 , H04W24/00 , H04W48/16 , H04W84/18
摘要： A data processing apparatus that is installed in plural in an installation area and processes data of each installation site, includes a processor that based on a combination of identification information included in calibration information respectively transmitted by calibration nodes and self-identification generation information that is included in the calibration information and for identifying the data processing apparatus among the plural data processing apparatuses, generates self-identification information; a memory device that retains the self-identification information; and a wireless communications circuit that receives the calibration information from the calibration nodes and performs transmission and reception of the data with an adjacent data processing apparatus provided in the installation area.

6. 发明授权

US09672076B2 Scheduling process on a processor or an accelerator on a system driven by battery based on processing efficiency and power consumption 有权
公开(公告)号：US09672076B2
公开(公告)日：2017-06-06
申请号：US14027712
申请日：2013-09-16
申请人： FUJITSU LIMITED
发明人： Takahisa Suzuki , Koichiro Yamashita , Hiromasa Yamauchi , Koji Kurihara , Fumihiko Hayakawa , Naoki Odate , Tetsuo Hiraki , Toshiya Otomo
IPC分类号： G06F9/46 , G06F9/50 , G06F1/32
CPC分类号： G06F9/5094 , G06F1/3293 , G06F9/5044 , G06F9/505 , G06F2209/508 , Y02D10/122 , Y02D10/22
摘要： A system includes a CPU; an accelerator; a comparing unit that compares a first value that is based on a first processing time period elapsing until the CPU completes a first process and a second processing time period elapsing until the accelerator completes the first process, and a second value that is based on a state of use of a battery driving the CPU and the accelerator; and a selecting unit that selects any one among the CPU and the accelerator, based on a result of comparison by the comparing unit.

7. 发明授权

US09635671B2 Scheduling method 有权
公开(公告)号：US09635671B2
公开(公告)日：2017-04-25
申请号：US13941146
申请日：2013-07-12
申请人： FUJITSU LIMITED
发明人： Toshiya Otomo , Koichiro Yamashita , Takahisa Suzuki , Hiromasa Yamauchi , Koji Kurihara , Tetsuo Hiraki
IPC分类号： H04B7/00 , H04W72/04 , G06F9/50 , H04W72/12 , G06F9/48
CPC分类号： H04W72/048 , G06F9/4856 , G06F9/5072 , G06F9/5094 , G06F2209/5017 , G06F2209/502 , H04W72/1284 , Y02D10/22
摘要： A scheduling method includes acquiring first information, second information, and third information from a first terminal located in a service area of a first base station; determining based on the first information, the second information, and the third information, whether a first process assigned to the first terminal is to be collected; and assigning the first process to a second terminal located in the service area of the first base station, when at the determining the first process is determined to be collected.

8. 发明授权

US09553928B2 Data sharing method and data processing system 有权
标题翻译：数据共享方法和数据处理系统
公开(公告)号：US09553928B2
公开(公告)日：2017-01-24
申请号：US14090954
申请日：2013-11-26
申请人： FUJITSU LIMITED
发明人： Koji Kurihara , Koichiro Yamashita , Hiromasa Yamauchi , Naoki Odate , Toshiya Otomo
IPC分类号： G06F15/167 , H04L29/08 , H04W52/02 , G06F11/30 , G06F17/30 , G06F11/34
CPC分类号： H04L67/1095 , G06F11/3058 , G06F11/3062 , G06F11/349 , G06F17/30206 , H04W52/0254 , H04W52/0261 , Y02D70/164
摘要： A data sharing method includes detecting by a first data processing apparatus that is among multiple data processing apparatuses that share data, any one among a shortage of available memory, a change in remaining battery power, a change in a relative positional distance of the first data processing apparatus to a second data processing apparatus that is among the data processing apparatuses, a change in a communication speed of communication with the second data processing apparatus, and an interruption of communication with the second data processing apparatus; and transmitting by the first data processing apparatus to a third data processing apparatus that is among the data processing apparatuses, a shared portion of the data saved in the first data processing apparatus.
摘要翻译：一种数据共享方法，包括：由共享数据的多个数据处理装置之中的第一数据处理装置进行检测，可用存储器不足，剩余电池电力的变化，第一数据的相对位置距离的变化处理装置到数据处理装置之中的第二数据处理装置，与第二数据处理装置的通信通信速度的改变以及与第二数据处理装置的通信的中断; 并且由第一数据处理装置向数据处理装置之中的第三数据处理装置发送保存在第一数据处理装置中的数据的共享部分。

9. 发明授权

US09547576B2 Multi-core processor system and control method 有权
标题翻译：多核处理器系统及控制方法
公开(公告)号：US09547576B2
公开(公告)日：2017-01-17
申请号：US14151421
申请日：2014-01-09
申请人： FUJITSU LIMITED
发明人： Hiromasa Yamauchi , Koichiro Yamashita , Takahisa Suzuki , Koji Kurihara , Toshiya Otomo
IPC分类号： G06F11/34 , G06F9/50
CPC分类号： G06F11/3409 , G06F9/505 , G06F2209/501 , G06F2209/5021
摘要： A multi-core processor system includes a multi-core processor that has plural core groups; and a storage device that stores a constraint on execution time for each application. A first identified core of the multi-core processor is configured to identify a constraint on execution time of a given application that is among the applications and for which an invocation instruction is received; determine whether the identified constraint meets a performance drop condition; assign the given application to a predetermined core of the multi-core processor, upon determining that the identified constraint meets the performance drop condition; and notify a second identified core of a core group among the core groups, of an assignment instruction for the given application, upon determining that the identified constraint does not meet the performance drop condition.
摘要翻译：多核处理器系统包括具有多个核心组的多核处理器; 以及存储装置，其对每个应用程序存储对执行时间的约束。多核处理器的第一识别核心被配置为识别对应用中的给定应用的执行时间的约束，并且其中接收到调用指令; 确定所识别的约束是否满足性能下降条件; 在确定所识别的约束满足性能下降条件时，将给定应用分配给多核处理器的预定核心; 并且在确定所识别的约束不满足性能下降条件时，通知所述核心组中的核心组的第二识别核心，给定应用的分配指令。

10. 发明授权

US09529073B2 Determining method, computer product, determining apparatus, and determining system 有权
标题翻译：确定方法，计算机产品，确定装置和确定系统
公开(公告)号：US09529073B2
公开(公告)日：2016-12-27
申请号：US14619879
申请日：2015-02-11
申请人： FUJITSU LIMITED
发明人： Toshiya Otomo , Koichiro Yamashita , Takahisa Suzuki , Hiromasa Yamauchi , Koji Kurihara , Yuta Teranishi
IPC分类号： H04W4/02 , G01S5/02 , G01S11/02 , H04W84/18 , H04L12/733 , H04W40/20
CPC分类号： G01S5/02 , G01S5/0226 , G01S11/02 , H04L45/20 , H04W4/025 , H04W40/20 , H04W84/18 , Y02D70/166 , Y02D70/22 , Y02D70/38
摘要： A determining method executed by a processor includes obtaining distance information that indicates a distance between monitoring apparatuses disposed to encompass a given area in which wireless communications apparatuses are scattered; causing a wireless signal to be transmitted and received between the monitoring apparatuses by multi-hop communication among the wireless communications apparatuses; calculating an estimated distance between the monitoring apparatuses, based on a hop count of the wireless signal multi-hop communicated among the monitoring apparatuses; and making a determination concerning a vacant area in which none of the wireless communications apparatuses is present, based on a result of comparison of the distance indicated by the obtained distance information and the calculated estimated distance.
摘要翻译：由处理器执行的确定方法包括获取指示被布置为包围无线通信装置分散的给定区域的监视装置之间的距离的距离信息; 通过所述无线通信装置之间的多跳通信，在所述监视装置之间发送和接收无线信号; 基于所述监视装置之间传送的无线信号多跳的跳数来计算所述监视装置之间的估计距离; 并且基于由所获得的距离信息指示的距离与所计算的估计距离的比较结果，确定不存在无线通信装置的空闲区域。

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