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    • 2. 发明授权
    • Double self-aligned metal oxide TFT
    • 双自对准金属氧化物TFT
    • US08435832B2
    • 2013-05-07
    • US13406824
    • 2012-02-28
    • Chan-Long ShiehGang Yu
    • Chan-Long ShiehGang Yu
    • H01L21/00
    • H01L29/7869H01L21/02554H01L21/02565H01L29/42384H01L29/66969H01L29/78621
    • A method of fabricating MOTFTs on transparent substrates includes positioning opaque gate metal on the front surface of a transparent substrate and depositing transparent gate dielectric, transparent metal oxide semiconductor material, and passivation material on the gate metal and the surrounding area. Portions of the passivation material are exposed from the rear surface of the substrate. Exposed portions are removed to define a channel area overlying the gate area. A relatively thick conductive metal material is selectively deposited on the exposed areas of the semiconductor material to form thick metal source/drain contacts. The selective deposition includes either plating or printing and processing a metal paste.
    • 在透明基板上制造MOTFT的方法包括在透明基板的前表面上定位不透明栅极金属,并在栅极金属和周围区域上沉积透明栅极电介质,透明金属氧化物半导体材料和钝化材料。 钝化材料的一部分从基板的后表面露出。 去除暴露部分以限定覆盖栅极区域的沟道区域。 相对厚的导电金属材料被选择性地沉积在半导体材料的暴露区域上以形成厚的金属源极/漏极触点。 选择性沉积包括电镀或印刷和加工金属浆料。
    • 3. 发明授权
    • Two-terminal switching devices and their methods of fabrication
    • 两端开关器件及其制造方法
    • US08193594B2
    • 2012-06-05
    • US13015013
    • 2011-01-27
    • Gang YuChan-Long ShiehHsing-Chung Lee
    • Gang YuChan-Long ShiehHsing-Chung Lee
    • H01L21/00H01L47/00H01L29/04
    • H01L29/861G02F1/1365G02F1/167H01L29/22H01L29/417H01L29/786H01L45/00H01L51/0035H01L51/0579H01L51/0587
    • Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
    • 提供了具有高导通/截止电流比和高击穿电压特性的两端开关器件。 这些器件可以用作有源矩阵显示器的驱动电路中的开关,例如在电泳,旋转元件和液晶显示器中。 开关器件包括两个电极和位于电极之间的宽带半导体材料层。 根据一个示例,阴极包括具有低功函数的金属,阳极包括具有p +或p ++类型的导电性的有机材料,并且宽带半导体包括金属氧化物。 阴极和阳极材料之间的功函数差异优选为至少约0.6eV。 可以实现在约15V的电压范围内的至少10,000的开/关电流比。 如果需要,可以在具有低熔点的柔性聚合物基材上形成装置。
    • 7. 发明授权
    • High mobility stabile metal oxide TFT
    • 高迁移率稳定金属氧化物TFT
    • US09379247B2
    • 2016-06-28
    • US13536641
    • 2012-06-28
    • Chan-Long ShiehGang YuFatt FoongTian XiaoJuergen Musolf
    • Chan-Long ShiehGang YuFatt FoongTian XiaoJuergen Musolf
    • H01L29/10H01L29/786
    • H01L29/7869H01L21/467H01L21/4763H01L23/535H01L29/0649H01L29/41733H01L29/66969H01L29/78696
    • A method of fabricating a stable, high mobility metal oxide thin film transistor includes the steps of providing a substrate, positioning a gate on the substrate, and depositing a gate dielectric layer on the gate and portions of the substrate not covered by the gate. A multiple film active layer including a metal oxide semiconductor film and a metal oxide passivation film is deposited on the gate dielectric with the passivation film positioned in overlying relationship to the semiconductor film. An etch-stop layer is positioned on a surface of the passivation film and defines a channel area in the active layer. A portion of the multiple film active layer on opposite sides of the etch-stop layer is modified to form an ohmic contact and metal source/drain contacts are positioned on the modified portion of the multiple film active layer.
    • 一种制造稳定的高迁移率金属氧化物薄膜晶体管的方法包括以下步骤:提供衬底,将栅极定位在衬底上,以及在栅极上沉积栅极电介质层,并且将衬底部分未被栅极覆盖。 包括金属氧化物半导体膜和金属氧化物钝化膜的多层膜活性层沉积在栅极电介质上,钝化膜位于与半导体膜的重叠关系中。 蚀刻停止层位于钝化膜的表面上并限定有源层中的沟道区。 在蚀刻停止层的相对侧上的多个膜有源层的一部分被修改以形成欧姆接触,并且金属源极/漏极触点位于多个膜有源层的修改部分上。
    • 9. 发明授权
    • Mask level reduction for MOFET
    • MOFET的掩模级别降低
    • US09129868B2
    • 2015-09-08
    • US13481781
    • 2012-05-26
    • Chan-Long ShiehGang YuFatt FoongLiu-Chung Lee
    • Chan-Long ShiehGang YuFatt FoongLiu-Chung Lee
    • H01L21/00H01L27/12
    • H01L27/1288H01L27/1225
    • A method of fabricating a TFT and IPS with reduced masking operations includes a substrate, a gate, a layer of gate dielectric on the gate and surrounding substrate surface and a semiconducting metal oxide on the gate dielectric. A channel protection layer overlies the gate to define a channel area in the semiconducting metal oxide. A S/D metal layer is patterned on the channel protection layer and a portion of the exposed semiconducting metal oxide to define an IPS area. An organic dielectric material is patterned on the S/D terminals and at an opposed side of the IPS area. The S/D metal is etched to expose the semiconducting metal oxide defining a first IPS electrode. A passivation layer covers the first electrode and a layer of transparent conductive material is patterned on the passivation layer to define a second IPS electrode overlying the first electrode.
    • 制造具有减小的掩模操作的TFT和IPS的方法包括基板,栅极,栅极上的栅极电介质层和周围的衬底表面以及栅极电介质上的半导体金属氧化物。 沟道保护层覆盖栅极以限定半导体金属氧化物中的沟道区。 S / D金属层在通道保护层和暴露的半导体金属氧化物的一部分上被图案化以限定IPS区域。 在S / D端子和IPS区域的相对侧上构图有机电介质材料。 蚀刻S / D金属以暴露限定第一IPS电极的半导体金属氧化物。 钝化层覆盖第一电极,并且在钝化层上图案化透明导电材料层以限定覆盖第一电极的第二IPS电极。