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1. 发明申请

US20170308220A1 TOUCH SCREEN CONTROLLER FOR DETERMINING RELATIONSHIP BETWEEN A USER'S HAND AND A HOUSING OF AN ELECTRONIC DEVICE 审中-公开
公开(公告)号：US20170308220A1
公开(公告)日：2017-10-26
申请号：US15151247
申请日：2016-05-10
申请人： STMicroelectronics Asia Pacific Pte Ltd , STMicroelectronics (Beijing) R&D Co. Ltd
发明人： Tae-gil Kang , Hang Yin , Cam Chung La
IPC分类号： G06F3/041 , G06F3/044
CPC分类号： G06F3/0416 , G06F3/044 , G06F3/04883 , G06F2203/04104 , G06F2203/04108
摘要： An electronic device described herein includes a touch screen for a touch sensitive display carried by a portable housing. The electronic device is configured to operate in a high. detection threshold mode to determine whether an object is in contact with the touch sensitive display, and operate in a low detection threshold mode to determine whether the object is adjacent to the touch sensitive display, based on lack of detection of the object being in contact with the touch sensitive display. The electronic device is further configured to determine whether the object is in contact with a peripheral edge of the portable housing by determining whether the object is adjacent opposite sides of the touch sensitive display, based on detection of the object being adjacent to the touch sensitive display.

2. 发明授权

US09015450B2 Apparatus utilizing efficient hardware implementation of shadow registers and method thereof 有权
标题翻译：利用影子寄存器的高效硬件实现的装置及其方法
公开(公告)号：US09015450B2
公开(公告)日：2015-04-21
申请号：US12690719
申请日：2010-01-20
申请人： Hong-Xia Sun , Peng Fei Zhu , Yong Qiang Wu
发明人： Hong-Xia Sun , Peng Fei Zhu , Yong Qiang Wu
IPC分类号： G06F15/00 , G06F9/30 , G06F9/40 , G06F9/38
CPC分类号： G06F9/30116 , G06F9/30123 , G06F9/384 , G06F9/3863
摘要： Embodiments of a processor architecture efficiently implement shadow registers in hardware. A register system in a processor includes a set of physical data registers coupled to register renaming logic. The register renaming logic stores data in and retrieves data from the set of physical registers when the processor is in a first processor state. The register renaming logic identifies ones of the set of physical registers that have a first operational state as a first group of registers and identifies the remaining ones of the set of physical registers as a second group of registers in response to an indication that the processor is to enter a second processor state from the first processor state. The register renaming logic stores data in and retrieves data from the second group of registers but not the first group of registers when the processor is in the second processor state.
摘要翻译：处理器架构的实施例在硬件中有效地实现影子寄存器。处理器中的寄存器系统包括耦合到寄存器重命名逻辑的一组物理数据寄存器。当处理器处于第一处理器状态时，寄存器重命名逻辑将数据存储在物理寄存器组中并从中检索数据。寄存器重命名逻辑将具有第一操作状态的一组物理寄存器中的一个标识为第一组寄存器，并且响应于处理器的指示，将该组物理寄存器中剩余的一组物理寄存器识别为第二组寄存器从第一处理器状态进入第二处理器状态。当处理器处于第二处理器状态时，寄存器重命名逻辑将数据存储在第二组寄存器中，而不是第一组寄存器中的数据。

3. 发明申请

US20140122837A1 NOVEL REGISTER RENAMING SYSTEM USING MULTI-BANK PHYSICAL REGISTER MAPPING TABLE AND METHOD THEREOF 有权
标题翻译：使用多银行物理寄存器映射表的新型寄存器恢复系统及其方法
公开(公告)号：US20140122837A1
公开(公告)日：2014-05-01
申请号：US14064936
申请日：2013-10-28
申请人： STMicroelectronics (Beijing) R&D Co. Ltd.
发明人： Peng Fei Zhu , Hong-Xia Sun , Yong Qiang Wu
IPC分类号： G06F9/30
CPC分类号： G06F9/3012 , G06F9/384
摘要： Embodiments of a processor architecture utilizing multi-bank implementation of physical register mapping table are provided. A register renaming system to correlate architectural registers to physical registers includes a physical register mapping table and a renaming logic. The physical register mapping table has a plurality of entries each indicative of a state of a respective physical register. The mapping table has a plurality of non-overlapping sections each of which having respective entries of the mapping table. The renaming logic is coupled to search a number of the sections of the mapping table in parallel to identify entries that indicate the respective physical registers have a first state. The renaming logic selectively correlates each of a plurality of architectural registers to a respective physical register identified as being in the first state. Methods of utilizing the multi-bank implementation of physical register mapping table are also provided.
摘要翻译：提供了利用多库实现物理寄存器映射表的处理器架构的实施例。将结构寄存器与物理寄存器相关联的寄存器重命名系统包括物理寄存器映射表和重命名逻辑。物理寄存器映射表具有多个表示每个物理寄存器的状态的条目。映射表具有多个非重叠部分，每个部分具有映射表的相应条目。重命名逻辑被耦合以并行地搜索映射表的多个部分以识别指示相应物理寄存器具有第一状态的条目。重命名逻辑选择性地将多个体系结构寄存器中的每一个相关于被识别为处于第一状态的相应物理寄存器。还提供了利用多库实现物理寄存器映射表的方法。

4. 发明授权

US08521991B2 Reducing instruction collisions in a processor 有权
标题翻译：减少处理器中的指令冲突
公开(公告)号：US08521991B2
公开(公告)日：2013-08-27
申请号：US12631098
申请日：2009-12-04
申请人： Kai-feng Wang , Hong-Xia Sun , Peng-fei Zhu , Yong-qiang Wu
发明人： Kai-feng Wang , Hong-Xia Sun , Peng-fei Zhu , Yong-qiang Wu
IPC分类号： G06F9/30
CPC分类号： G06F9/3836 , G06F9/3855
摘要： A technique for selecting instructions for execution from an issue queue at multiple function units while reducing the chances of instruction collisions. In an embodiment, each function unit in a processor may include a selection logic circuit that selects a specific instruction from the issue queue for execution. In order to avoid instruction collision, a function unit may have a selection logic circuit that may select two instructions from an instruction queue: one according to a first selection technique and one according to a second selection technique. Then, by comparing the instruction selected by the first selection technique to the instruction selected by the selection logic circuit of another function unit, the instruction selected by the second technique may be used instead if there will be an instruction collision because the instruction selected by the first selection technique is the same as the instruction selected at a different function unit.
摘要翻译：一种用于在减少指令冲突的机会的同时从多个功能单元的问题队列中选择执行指令的技术。在一个实施例中，处理器中的每个功能单元可以包括从发布队列中选择特定指令以供执行的选择逻辑电路。为了避免指令冲突，功能单元可以具有可以从指令队列中选择两个指令的选择逻辑电路：根据第一选择技术和第二选择技术的选择逻辑电路。然后，通过将由第一选择技术选择的指令与由另一功能单元的选择逻辑电路选择的指令进行比较，可以使用由第二技术选择的指令来代替，否则将产生指令冲突，因为由第一选择技术与在不同功能单元处选择的指令相同。

5. 发明授权

US08291200B2 Reduced power load/store queue searching by comparing subsets of address bits and enabling second subset comparison based on first subset comparison result 有权
标题翻译：通过比较地址位子集减少功率加载/存储队列搜索，并且基于第一子集比较结果启用第二子集比较
公开(公告)号：US08291200B2
公开(公告)日：2012-10-16
申请号：US12535615
申请日：2009-08-04
申请人： Kai-Feng Wang , Hong-Xia Sun , Yong-Qiang Wu
发明人： Kai-Feng Wang , Hong-Xia Sun , Yong-Qiang Wu
IPC分类号： G06F9/312 , G06F1/32
CPC分类号： G06F9/38 , G06F7/02 , G06F9/3834 , G06F9/3855
摘要： A comparison circuit can reduce the amount of power consumed when searching a load queue or a store queue of a microprocessor. Some embodiments of the comparison circuit use a comparison unit that performs an initial comparison of addresses using a subset of the address bits. If the initial comparison results in a match, a second comparison unit can be enabled to compare another subset of the address bits.
摘要翻译：比较电路可以减少在搜索微处理器的加载队列或存储队列时消耗的功率量。比较电路的一些实施例使用比较单元，其使用地址位的子集来执行地址的初始比较。如果初始比较导致匹配，则可以使能第二比较单元来比较另一个地址比特的子集。

6. 发明授权

US08275363B2 Inquiring of a protected communications services database to address concerns over blind base station operation in conflict with protected communications services 有权
标题翻译：查询受保护的通信服务数据库，以解决与受保护通信业务冲突的盲基站操作的担忧
公开(公告)号：US08275363B2
公开(公告)日：2012-09-25
申请号：US13350574
申请日：2012-01-13
申请人： Zhen Ning Peng
发明人： Zhen Ning Peng
IPC分类号： H04M3/42
CPC分类号： H04W16/14 , H04W48/16
摘要： A database stores updated information concerning protected communications services. A base station for a coexisting, and potentially co-channel, non-protected communications service makes an inquiry of the database requesting an identification of geographically relevant protected services along with the database stored information pertinent to each of those identified protected services. The returned information is processed by the base station to determine what channels are available for use by the non-protected service. An available channel is identified by the base station as the working channel for the non-protected service and the base station initiates a process to establish a communications network using the non-protected service and the selected working channel.
摘要翻译：数据库存储有关受保护通信服务的更新信息。用于共存和潜在的共通道的非保护通信服务的基站对数据库进行询问，请求对地理相关的受保护服务进行识别，以及与所识别的每个受保护服务相关的数据库存储的信息。返回的信息由基站处理，以确定哪些通道可供无保护服务使用。可用信道由基站识别为用于非保护业务的工作信道，并且基站发起使用非受保护业务和所选工作信道建立通信网络的过程。

7. 发明申请

US20120115524A1 INQUIRING OF A PROTECTED COMMUNICATIONS SERVICES DATABASE TO ADDRESS CONCERNS OVER BLIND BASE STATION OPERATION IN CONFLICT WITH PROTECTED COMMUNICATIONS SERVICES 有权
标题翻译：查询保护通信服务数据库，以便在受到保护的通信服务的冲突中解决黑洞基站的操作
公开(公告)号：US20120115524A1
公开(公告)日：2012-05-10
申请号：US13350574
申请日：2012-01-13
申请人： Zhen Ning Peng
发明人： Zhen Ning Peng
IPC分类号： H04B7/24
CPC分类号： H04W16/14 , H04W48/16
摘要： A database stores updated information concerning protected communications services. A base station for a coexisting, and potentially co-channel, non-protected communications service makes an inquiry of the database requesting an identification of geographically relevant protected services along with the database stored information pertinent to each of those identified protected services. The returned information is processed by the base station to determine what channels are available for use by the non-protected service. An available channel is identified by the base station as the working channel for the non-protected service and the base station initiates a process to establish a communications network using the non-protected service and the selected working channel.
摘要翻译：数据库存储有关受保护通信服务的更新信息。用于共存和潜在的共通道的非保护通信服务的基站对数据库进行询问，请求对地理相关的受保护服务进行识别，以及与所识别的每个受保护服务有关的数据库存储的信息。返回的信息由基站处理，以确定哪些通道可供无保护服务使用。可用信道由基站识别为用于非保护业务的工作信道，并且基站发起使用非受保护业务和所选工作信道建立通信网络的过程。

8. 发明申请

US20100290360A1 BLIND CARRIER FREQUENCY OFFSET ESTIMATOR BASED ON SINGLE-OFDM-SYMBOL PN RANGING CODE IN MULTI-USER OFDMA UPLINK 有权
标题翻译：基于多用户OFDMA上行链路中的单OFDM符号PN范围代码的盲载波频率估计器
公开(公告)号：US20100290360A1
公开(公告)日：2010-11-18
申请号：US12787309
申请日：2010-05-25
申请人： Yiqun Ge , Xutao Zhou , Wuxian Shi
发明人： Yiqun Ge , Xutao Zhou , Wuxian Shi
IPC分类号： H04L12/26
CPC分类号： H04L27/2657 , H04L27/2676
摘要： A blind carrier frequency offset estimator is based on a single-OFDM-symbol training sequence in multi-user OFDMA uplink. Through multiple access interference modeling and analysis, a virtual user is employed that occupies the all null sub-carriers. By minimizing the energy leakage on the virtual user in term of tentative frequency offsets, the estimator can approach the real frequency offset. The estimator performs only on frequency-domain, simplifies interference calculations, and lowers the rank of the matrix. An iterative computation method is used to approach the real frequency offset.
摘要翻译：盲载波频偏估计器基于多用户OFDMA上行链路中的单OFDM符号训练序列。通过多址干扰建模和分析，采用占用全部空子载波的虚拟用户。通过最小化虚拟用户在暂定频率偏移方面的能量泄漏，估计器可以接近实际频率偏移。估计器仅在频域上执行，简化了干扰计算，并降低了矩阵的秩。迭代计算方法用于逼近实际频偏。

9. 发明申请

US20100205387A1 APPARATUS UTILIZING EFFICIENT HARDWARE IMPLEMENTATION OF SHADOW REGISTERS AND METHOD THEREOF 有权
标题翻译：利用有效的硬件实现方法的设备及其方法
公开(公告)号：US20100205387A1
公开(公告)日：2010-08-12
申请号：US12690719
申请日：2010-01-20
申请人： Hong-Xia Sun , Peng Fei Zhu , Yong Qiang Wu
发明人： Hong-Xia Sun , Peng Fei Zhu , Yong Qiang Wu
IPC分类号： G06F12/00
CPC分类号： G06F9/30116 , G06F9/30123 , G06F9/384 , G06F9/3863
摘要： Embodiments of a processor architecture efficiently implement shadow registers in hardware. A register system in a processor includes a set of physical data registers coupled to register renaming logic. The register renaming logic stores data in and retrieves data from the set of physical registers when the processor is in a first processor state. The register renaming logic identifies ones of the set of physical registers that have a first operational state as a first group of registers and identifies the remaining ones of the set of physical registers as a second group of registers in response to an indication that the processor is to enter a second processor state from the first processor state. The register renaming logic stores data in and retrieves data from the second group of registers but not the first group of registers when the processor is in the second processor state.
摘要翻译：处理器架构的实施例在硬件中有效地实现影子寄存器。处理器中的寄存器系统包括耦合到寄存器重命名逻辑的一组物理数据寄存器。当处理器处于第一处理器状态时，寄存器重命名逻辑将数据存储在物理寄存器组中并从中检索数据。寄存器重命名逻辑将具有第一操作状态的一组物理寄存器中的一个标识为第一组寄存器，并且响应于处理器的指示，将该组物理寄存器中的剩余的一组标识为第二组寄存器从第一处理器状态进入第二处理器状态。当处理器处于第二处理器状态时，寄存器重命名逻辑将数据存储在第二组寄存器中，而不是第一组寄存器中的数据。

10. 发明申请

US20100169625A1 REDUCING BRANCH CHECKING FOR NON CONTROL FLOW INSTRUCTIONS 有权
标题翻译：减少分支机构检查非流动控制指令
公开(公告)号：US20100169625A1
公开(公告)日：2010-07-01
申请号：US12535590
申请日：2009-08-04
申请人： Kai-Feng Wang , Hong-Xia Sun , Yong-Qiang Wu
发明人： Kai-Feng Wang , Hong-Xia Sun , Yong-Qiang Wu
IPC分类号： G06F9/44
CPC分类号： G06F9/3806 , G06F9/3844
摘要： Some microprocessors check branch prediction information in a branch history table and/or a branch target buffer. To check for branch prediction information, a microprocessor can identify which instructions are control flow instructions and which instructions are non control flow instructions. To reduce power consumption in the branch history table and/or branch target buffer, the branch history table and/or branch target buffer can check for branch prediction information corresponding to the control flow instructions and not the non control flow instructions.
摘要翻译：一些微处理器检查分支历史表和/或分支目标缓冲器中的分支预测信息。为了检查分支预测信息，微处理器可以识别哪些指令是控制流程指令，哪些指令是非控制流程指令。为了减少分支历史表和/或分支目标缓冲器中的功耗，分支历史表和/或分支目标缓冲器可以检查与控制流程指令相对应的分支预测信息，而不是非控制流程指令。

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