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1. 发明授权

US08612667B2 Method for performing data pattern management regarding data accessed by a controller of a flash memory, and associated memory device and controller thereof 有权
标题翻译：用于执行关于由闪存的控制器访问的数据的数据模式管理的方法，以及相关联的存储器件及其控制器
公开(公告)号：US08612667B2
公开(公告)日：2013-12-17
申请号：US12647555
申请日：2009-12-28
申请人： Ching-Hui Lin , Kuo-Liang Yeh , Ken-Fu Hsu
发明人： Ching-Hui Lin , Kuo-Liang Yeh , Ken-Fu Hsu
IPC分类号： G06F12/00
CPC分类号： G11C29/02 , G11C7/1006 , G11C29/025 , G11C29/028 , G11C29/50008
摘要： A method for performing data pattern management regarding data accessed by a controller of a Flash memory includes: when the controller receives a write command, generating a first random function, where the write command is utilized for instructing the controller to write the data into the Flash memory; and adjusting a plurality of bits of the data bit by bit to generate a pseudo-random bit sequence, and writing the pseudo-random bit sequence into the Flash memory to represent the data, whereby data pattern distribution of the data is adjusted. An associated memory device and the controller thereof are also provided, where the controller includes: a ROM arranged to store a program code; a microprocessor arranged to execute the program code to control the access to the Flash memory and manage a plurality of blocks; and a randomizer arranged to generate a random function. The controller can perform data pattern management.
摘要翻译：用于执行关于由闪存的控制器访问的数据的数据模式管理的方法包括：当控制器接收到写命令时，生成第一随机函数，其中写命令用于指示控制器将数据写入闪存记忆; 并且逐位地调整数据的多个比特以产生伪随机比特序列，并将伪随机比特序列写入闪速存储器以表示数据，从而调整数据的数据模式分布。还提供了一种相关联的存储器件及其控制器，其中控制器包括：ROM，被布置为存储程序代码; 布置成执行程序代码以控制对闪存的访问并管理多个块的微处理器; 以及布置成生成随机函数的随机发生器。控制器可以执行数据模式管理。

2. 发明授权

US08312205B2 Method for identifying a page of a block of flash memory, and associated memory device 有权
标题翻译：用于识别闪存块的页面以及相关联的存储器设备的方法
公开(公告)号：US08312205B2
公开(公告)日：2012-11-13
申请号：US12756165
申请日：2010-04-07
申请人： Wu-Chi Kuo
发明人： Wu-Chi Kuo
IPC分类号： G06F5/08
CPC分类号： G11C16/344 , G06F11/1068 , G11C16/26
摘要： A memory device includes a flash memory and a controller. The flash memory includes a plurality of blocks, and each block includes a plurality of pages. The controller is utilized for reading a plurality of bits from an identification region of a page, and determining whether the page is blank or not according to the plurality of bits.
摘要翻译：存储器件包括闪存和控制器。闪速存储器包括多个块，并且每个块包括多个页。控制器用于从页面的识别区域读取多个位，并根据多个位确定页面是否为空。

3. 发明授权

US08311177B2 Clock generating circuit, transceiver and related method 有权
标题翻译：时钟发生电路，收发器及相关方法
公开(公告)号：US08311177B2
公开(公告)日：2012-11-13
申请号：US12649348
申请日：2009-12-30
申请人： Chin-Hsien Yen
发明人： Chin-Hsien Yen
IPC分类号： H03D3/24
CPC分类号： H04L7/0337 , H03L7/081 , H03L7/087 , H03L7/18
摘要： A clock generating circuit includes: a phase detector for detecting a phase difference between an input clock and a reference clock to generate a control signal corresponding to the phase difference; a filter for filtering the control signal to generate a filtered control signal; a controllable oscillator for generating a plurality of output clocks according to the filtered control signal, wherein the plurality of output clocks correspond to an oscillating frequency and correspond to a plurality of different phases respectively; a phase selector for selecting an output clock as a feedback clock from the plurality of output clocks according to a phase select signal; and a feedback circuit for generating the input clock according to the feedback clock.
摘要翻译：时钟发生电路包括：相位检测器，用于检测输入时钟和参考时钟之间的相位差，以产生对应于相位差的控制信号; 用于对控制信号进行滤波以产生经滤波的控制信号的滤波器; 可控振荡器，用于根据滤波的控制信号产生多个输出时钟，其中多个输出时钟分别对应于振荡频率并对应于多个不同相位; 相位选择器，用于根据相位选择信号从多个输出时钟中选择输出时钟作为反馈时钟; 以及用于根据反馈时钟产生输入时钟的反馈电路。

4. 发明授权

US08285951B2 Control apparatus for controlling peripheral device, non-volatile storage element, and method thereof 有权
标题翻译：用于控制外围设备，非易失性存储元件的控制设备及其方法
公开(公告)号：US08285951B2
公开(公告)日：2012-10-09
申请号：US12485044
申请日：2009-06-16
申请人： Li-Ling Chou
发明人： Li-Ling Chou
IPC分类号： G06F13/00
CPC分类号： G06F13/105
摘要： A control apparatus for controlling at least one peripheral device includes a non-volatile storage element and a controller. The non-volatile storage element is used for storing at least one control information set. The controller is externally coupled to the non-volatile storage element and includes a read-only storage element which stores a segment of program code. The controller loads the segment of program code to execute the segment of program code for reading at least one portion of the control information set from the non-volatile storage element to control the operation of the peripheral device.
摘要翻译：用于控制至少一个外围设备的控制装置包括非易失性存储元件和控制器。非易失性存储元件用于存储至少一个控制信息集。控制器外部耦合到非易失性存储元件，并且包括存储程序代码段的只读存储元件。控制器加载程序代码段以执行程序代码段，用于从非易失性存储元件读取至少一部分控制信息集以控制外围设备的操作。

5. 发明申请

US20100008003A1 ELECTROSTATIC DISCHARGE PROTECTION DEVICE 审中-公开
标题翻译：静电放电保护装置
公开(公告)号：US20100008003A1
公开(公告)日：2010-01-14
申请号：US12562779
申请日：2009-09-18
申请人： Te-Wei CHEN
发明人： Te-Wei CHEN
IPC分类号： H02H9/04 , H01L27/088
CPC分类号： H01L27/0251
摘要： An electrostatic discharge (ESD) protection device for providing an ESD path between two circuitries is provided. Each circuitry has a power supply terminal and a ground terminal. The protection device comprises an equivalent MOS, a first terminal, and a second terminal. The equivalent MOS comprises a source, a drain and a gate, wherein the drain is connected to the gate. The first terminal is connected to the gate, while the second terminal is connected to the source. The first terminal is connected to one power supply terminal and ground terminal, whereas the second terminal is connected to the other the power supply terminal and ground terminal.
摘要翻译：提供了用于在两个电路之间提供ESD路径的静电放电（ESD）保护装置。每个电路都有一个电源端子和一个接地端子。保护装置包括等效的MOS，第一端子和第二端子。等效MOS包括源极，漏极和栅极，其中漏极连接到栅极。第一个端子连接到门，而第二个端子连接到源。第一个端子连接到一个电源端子和接地端子，而第二个端子连接到另一个电源端子和接地端子。

6. 发明申请

US20100006943A1 ELECTROSTATIC DISCHARGE PROTECTION DEVICE 审中-公开
公开(公告)号：US20100006943A1
公开(公告)日：2010-01-14
申请号：US12562823
申请日：2009-09-18
申请人： Te-Wei CHEN
发明人： Te-Wei CHEN
IPC分类号： H01L23/60
CPC分类号： H01L27/0251
摘要： An electrostatic discharge (ESD) protection device for providing an ESD path between two circuitries is provided. Each circuitry has a power supply terminal and a ground terminal. The protection device comprises an equivalent MOS, a first terminal, and a second terminal. The equivalent MOS comprises a source, a drain and a gate, wherein the drain is connected to the gate. The first terminal is connected to the gate, while the second terminal is connected to the source. The first terminal is connected to one power supply terminal and ground terminal, whereas the second terminal is connected to the other the power supply terminal and ground terminal.

7. 发明授权

US08666150B2 Pixel processing method and apparatus thereof 有权
标题翻译：像素处理方法及其装置
公开(公告)号：US08666150B2
公开(公告)日：2014-03-04
申请号：US12545080
申请日：2009-08-21
申请人： Yung-Wei Chen
发明人： Yung-Wei Chen
IPC分类号： G06K9/00
CPC分类号： H04N9/045 , G06T3/4015 , H04N2209/046
摘要： A pixel processing method includes: selecting a first plurality of color component values of a first plurality of pixels within a pixel block in a buffering device, performing a first color component process upon a first target pixel in the first plurality of pixels to determine a first target color component value of the first target pixel; and selecting a second plurality of color component values of a second plurality of pixels within the pixel block at the same time as the first color component process is performed, and performing a second color component process upon a second target pixel in the second plurality of pixels according to the second plurality of color component values to determine at least one underdetermined target color component value of the second target pixel, wherein the second target pixel has been processed by the first color component process.
摘要翻译：像素处理方法包括：在缓冲装置中选择像素块内的第一多个像素的第一多个颜色分量值，对所述第一多个像素中的第一目标像素执行第一颜色分量处理，以确定第一第一目标像素的目标颜色分量值; 以及在执行所述第一颜色分量处理的同时选择所述像素块内的第二多个像素的第二多个颜色分量值，并且对所述第二多个像素中的第二目标像素执行第二颜色分量处理根据所述第二多个颜色分量值来确定所述第二目标像素的至少一个未确定的目标色彩分量值，其中所述第二目标像素已经被所述第一颜色分量处理处理。

8. 发明授权

US08442350B2 Edge parameter computing method for image and image noise omitting method utilizing the edge parameter computing method 有权
标题翻译：利用边缘参数计算方法的图像和图像噪声省略方法的边缘参数计算方法
公开(公告)号：US08442350B2
公开(公告)日：2013-05-14
申请号：US12574704
申请日：2009-10-07
申请人： Chun-Wen Chang
发明人： Chun-Wen Chang
IPC分类号： G06K9/40
CPC分类号： G06T5/002 , G06T5/20 , G06T2207/10024 , G06T2207/20192
摘要： An edge parameter computing method for an image, wherein the image includes a plurality of pixels forming a Bayer pattern. The edge parameter computing method comprises: (a) computing an average grey level of at least one specific type pixels in a specific region of the image; (b) computing each grey level difference value between the average grey level and the specific type pixels in the specific region to generate a plurality of grey level difference values; (c) finding a specific pixel with a maximum grey level difference value according to the grey level difference values; and (d) computing a ratio value between the average grey level and the maximum grey level difference value as the edge parameter.
摘要翻译：一种用于图像的边缘参数计算方法，其中所述图像包括形成拜耳图案的多个像素。所述边缘参数计算方法包括：（a）计算所述图像的特定区域中的至少一个特定类型像素的平均灰度级; （b）计算特定区域中的平均灰度级和特定类型像素之间的每个灰度级差值，以产生多个灰度级差值; （c）根据灰度差值求出具有最大灰度差值的特定像素; 和（d）计算平均灰度级和最大灰度差值之间的比值作为边缘参数。

9. 发明授权

US07966433B2 Method for enhancing performance of data access between a personal computer and a USB Mass Storage, associated personal computer, and storage medium storing an associated USB Mass Storage driver 有权
标题翻译：用于增强个人计算机与USB大容量存储，相关个人计算机之间的数据访问性能的方法以及存储相关联的USB大容量存储驱动器的存储介质
公开(公告)号：US07966433B2
公开(公告)日：2011-06-21
申请号：US12553993
申请日：2009-09-04
申请人： Chang-Hao Chiang
发明人： Chang-Hao Chiang
IPC分类号： G06F3/00
CPC分类号： G06F3/0611 , G06F3/0659 , G06F3/0679
摘要： A method for enhancing performance of data access between a personal computer and a USB Mass Storage is provided. The personal computer is equipped with a plurality of layers of drivers regarding USB data access, and a lower layer of the layers of the drivers includes a USB Bus Driver. The method includes: monitoring commands sent from an operating system (OS) file system to an upper layer; and when a command sent from the OS file system to the upper layer is utilized for accessing data of a data amount that is greater than a predetermined threshold value, omitting a portion of a plurality of IRPs, automatically generating a plurality of replies for replying to the omitted IRPs, and altering at least one IRP of remaining IRPs in order to correctly access the data with a lower IRP count, wherein the plurality of IRPs is associated with the command.
摘要翻译：提供了一种用于增强个人计算机和USB大容量存储之间的数据访问性能的方法。个人计算机配备有关于USB数据访问的多层驱动程序，并且驱动器层的下层包括USB总线驱动程序。该方法包括：监视从操作系统（OS）文件系统发送到上层的命令; 并且当从OS文件系统发送到上层的命令被用于访问大于预定阈值的数据量的数据时，省略多个IRP的一部分，自动生成多个答复以回复所述省略的IRP，以及改变剩余IRP的至少一个IRP，以便正确地访问具有较低IRP计数的数据，其中所述多个IRP与所述命令相关联。

10. 发明授权

US07608894B2 Electrostatic discharge protection device 有权
标题翻译：静电放电保护装置
公开(公告)号：US07608894B2
公开(公告)日：2009-10-27
申请号：US11724194
申请日：2007-03-15
申请人： Te-Wei Chen
发明人： Te-Wei Chen
IPC分类号： H01L23/62
CPC分类号： H01L27/0251
摘要： An electrostatic discharge (ESD) protection device for providing an ESD path between two circuitries is provided. Each circuitry has a power supply terminal and a ground terminal. The protection device comprises an equivalent MOS, a first terminal, and a second terminal. The equivalent MOS comprises a source, a drain and a gate, wherein the drain is connected to the gate. The first terminal is connected to the gate, while the second terminal is connected to the source. The first terminal is connected to one power supply terminal and ground terminal, whereas the second terminal is connected to the other the power supply terminal and ground terminal.
摘要翻译：提供了用于在两个电路之间提供ESD路径的静电放电（ESD）保护装置。每个电路都有一个电源端子和一个接地端子。保护装置包括等效的MOS，第一端子和第二端子。等效MOS包括源极，漏极和栅极，其中漏极连接到栅极。第一个端子连接到门，而第二个端子连接到源。第一个端子连接到一个电源端子和接地端子，而第二个端子连接到另一个电源端子和接地端子。

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