专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US11249894B2 Storage devices and data retention methods thereof 有权
公开(公告)号：US11249894B2
公开(公告)日：2022-02-15
申请号：US16007025
申请日：2018-06-13
申请人： VIA TECHNOLOGIES, INC.
发明人： Zhongyi Gao , Xiaoyu Yang
IPC分类号： G06F12/02 , G11C16/34 , G11C16/16
摘要： A storage device includes a flash memory array and a controller. The flash memory array includes a plurality of blocks. A minimal erase number of blocks have a minimal erase count in the plurality of blocks. When one of the minimal erase number of blocks is erased, the controller subtracts 1 from the minimal erase number.

2. 发明授权

US11216648B2 Method and device for facial image recognition 有权
公开(公告)号：US11216648B2
公开(公告)日：2022-01-04
申请号：US16807292
申请日：2020-03-03
申请人： VIA TECHNOLOGIES, INC.
发明人： Hao Sun
IPC分类号： G06K9/00 , G06K9/62 , G06N3/08
摘要： A method for facial image recognition is provided. A plurality of original facial images are received. A plurality of standard facial images corresponding to the original facial images are generated through a standard face generation model. A recognition model is trained by using the original facial images and the standard facial images. The recognition model is tested by using the original facial image test set and a standard facial image test set until the recognition model recognizes that the first accuracy rate of the original facial image test set is higher than a first threshold value and the second accuracy rate of the standard facial image test set is higher than a second threshold value. The original facial image test set is composed of the original facial images obtained by sampling, and the standard facial image test set is composed of the standard facial images obtained by sampling.

3. 发明申请

US20210342287A1 BRIDGE CIRCUIT FOR PROVIDING CONVERSION BETWEEN PCIE-NVME PROTOCOL AND NVME-TCP PROTOCOL AND COMPUTER SYSTEM USING THE SAME 有权
公开(公告)号：US20210342287A1
公开(公告)日：2021-11-04
申请号：US17234751
申请日：2021-04-19
申请人： VIA Technologies Inc.
发明人： Jiin Lai
IPC分类号： G06F13/40 , G06F13/16 , G06F13/42 , H04L29/06
摘要： A bridge circuit includes an NVMe device controller, a network subsystem, and a data transfer circuit. The NVMe device controller is arranged to communicate with a host via a PCIe bus. The network subsystem is arranged to communicate with an NVMe-TCP device via a network. The data transfer circuit is coupled between the NVMe device controller and the network subsystem, and is arranged to deal with data transfer associated with the NVMe-TCP device without intervention of the host.

4. 发明授权

US10977947B2 Method for vehicle blind zone detection 有权
公开(公告)号：US10977947B2
公开(公告)日：2021-04-13
申请号：US16278213
申请日：2019-02-18
申请人： VIA Technologies, Inc.
发明人： Juan He
IPC分类号： G08G1/16 , G06K9/00 , B60Q9/00 , B60R1/12 , G01S13/931
摘要： A method for vehicle blind zone detection, applied to an electronic device coupled to one or more cameras arranged on a vehicle, the method comprising: setting a capture zone in a current frame image captured by the camera and detecting an object entering the capture zone in the current frame image, wherein the object meeting a capture criterion and a location information of the object meeting the capture criterion are added into a tracking list; performing tracking operations on an existing object, which has been detected and thus added to the tracking list, in one or more previous frame images preceding the current frame image captured by the camera, to obtain a new location information of the existing object in the current frame image, and determining whether to have the existing object remained in the tracking list in accordance with the new location information of the existing object and the detection scope; and making a warning determination in accordance with the location information in the current frame image for all the objects remained in the tracking list.

5. 发明授权

US10783032B2 Non-volatile memory apparatus and reading method thereof 有权
公开(公告)号：US10783032B2
公开(公告)日：2020-09-22
申请号：US15662254
申请日：2017-07-27
申请人： VIA Technologies, Inc.
发明人： Yi-Lin Lai , Chen-Te Chen , Ying-Che Chung
IPC分类号： G06F11/00 , G06F11/10 , G11C29/52 , H03M13/29 , H03M13/09 , H03M13/15 , H03M13/11
摘要： A non-volatile memory apparatus includes an error checking and correcting (ECC) decoding circuit, a main buffer circuit, a multiplexer, and an interface circuit. The ECC decoding circuit decodes an original codeword to obtain a decoded codeword. The main buffer circuit is coupled to the ECC decoding circuit for receiving and storing a first data portion of the decoded codeword. The multiplexer's first input end is coupled to the output end of the main buffer circuit. The second input end of the multiplexer is coupled to the output end of the ECC decoding circuit. The interface circuit is coupled to the output end of the multiplexer and receives the first data portion from the multiplexer to provide the first data portion to a host.

6. 发明授权

US10649513B2 Energy regulation circuit and operation system utilizing the same 有权
公开(公告)号：US10649513B2
公开(公告)日：2020-05-12
申请号：US15647449
申请日：2017-07-12
申请人： VIA TECHNOLOGIES, INC.
发明人： Tze-Shiang Wang
IPC分类号： G06F1/26 , G05F1/56 , G05F1/571 , G06F1/28 , G06F13/12 , H02M5/293
摘要： An energy regulation circuit including a first voltage regulator, a processor, a second voltage regulator, and a controller is provided. The first voltage regulator adjusts an input voltage to generate an adjustment voltage. The processor increases the adjustment voltage according to the input voltage to generate a boost voltage. An energy accumulator is charged according to the boost voltage. The second voltage regulator adjusts the boost voltage to generate an operation voltage. The controller operates according to the operation voltage.

7. 发明授权

US10509571B2 Storage devices and data retention methods thereof 有权
公开(公告)号：US10509571B2
公开(公告)日：2019-12-17
申请号：US15955917
申请日：2018-04-18
申请人： VIA TECHNOLOGIES, INC.
发明人： Zhongyi Gao , Xiaoyu Yang
IPC分类号： G05F3/06 , G06F3/06
摘要： A storage device includes a flash memory array and a controller. The flash memory array includes a plurality of blocks. The first block among the blocks has a minimal erase count in the blocks. When determining that a difference between an average erase count of the blocks and the minimal erase count exceeds a cold-data threshold, the controller selects the first block to be a source block. When a data migration of a data-moving process is executed, the controller moves the data of the source block to a target block.

8. 发明授权

US10459007B2 Probe card 有权
公开(公告)号：US10459007B2
公开(公告)日：2019-10-29
申请号：US16221611
申请日：2018-12-17
申请人： VIA Technologies, Inc.
发明人： Chen-Yueh Kung , Wen-Yuan Chang , Wei-Cheng Chen
IPC分类号： G01R1/073 , G01R31/02 , G01R31/26 , G01R31/28 , H01L21/66 , H01L21/84
摘要： A probe card including a circuit board, a transformer, a probe head, and a reinforcement structure is provided. The transformer including a body, a plurality of solder balls, and a plurality of first contact points are disposed on the substrate. The body has a first surface and a second surface, wherein the first surface is located between the circuit board and the second surface. The solder balls are disposed on the first surface, and the first contact points are disposed on the second surface. The probe head is disposed on the second surface. The probe head is electrically connected to the circuit board by the first solder balls. The reinforcement structure is disposed between the probe head and the circuit board.

9. 发明授权

US10372533B2 Non-volatile memory apparatus and empty page detection method thereof 有权
公开(公告)号：US10372533B2
公开(公告)日：2019-08-06
申请号：US15221598
申请日：2016-07-28
申请人： VIA Technologies, Inc.
发明人： Ying Yu Tai , Jiangli Zhu
IPC分类号： G06F11/10 , H03M13/11 , G11C29/52
摘要： A non-volatile memory (NVM) apparatus and an empty page detection method thereof are provided. The NVM apparatus includes a NVM and a controller. The controller reads the content of a memory page of the NVM. The controller performs Low Density Parity Check (LDPC) decoding for at least one codeword of the memory page to obtain a decoded codeword and a check-result vector. The controller determines that the memory page is not an empty page when the LDPC decoding for the codeword is successful. The controller counts an amount of the bits being 1 (or 0) in the check-result vector when the LDPC decoding for the codeword is fail. Based on the amount of the bits being 1 (or 0) in the check-result vector, the controller determines whether the memory page is an empty page.

10. 发明授权

US10318202B2 Non-volatile memory apparatus and data deduplication method thereof 有权
公开(公告)号：US10318202B2
公开(公告)日：2019-06-11
申请号：US15641242
申请日：2017-07-04
申请人： VIA Technologies, Inc.
发明人： Tingjun Xie , Ying Yu Tai , Jiangli Zhu
IPC分类号： G06F3/06 , G06F11/10 , H03M13/11 , H03M13/00 , H03M7/30
摘要： A non-volatile memory (NVM) apparatus and a data de-duplication method thereof are provided. The NVM apparatus includes a NVM and a controller. The controller performs an error checking and correcting (ECC) method to convert a raw data into an encoded data. The controller performs the data de-duplication method to reduce a number of times that the same encoded data is repeatedly written into the NVM. The controller generates the feature information corresponding to the raw data by reusing the ECC method. When the feature information is found in a feature list, the encoded data corresponding to the raw data will not be written into the NVM. When the feature information is not found in the feature list, the feature information is added into the feature list, and the encoded data corresponding to the raw data is written into the NVM.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式