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1. 发明授权

US10903277B2 Scalable, stackable, and BEOL-process compatible integrated neuron circuit 有权
公开(公告)号：US10903277B2
公开(公告)日：2021-01-26
申请号：US16706393
申请日：2019-12-06
申请人： HRL Laboratories, LLC
发明人： Wei L. Yi
IPC分类号： H01L27/26 , H01L49/02 , H01L45/00 , G11C11/54 , H01L27/24 , H01L47/00 , H01L47/02 , H01L27/06
摘要： An integrated neuron circuit structure comprising at least one thin-film resistor, one Metal Insulator Metal capacitor and one Negative Differential Resistance device.

2. 发明授权

US10600961B2 Scalable and low-voltage electroforming-free nanoscale vanadium dioxide threshold switch devices and relaxation oscillators with current controlled negative differential resistance 有权
公开(公告)号：US10600961B2
公开(公告)日：2020-03-24
申请号：US16005529
申请日：2018-06-11
申请人： HRL LABORATORIES, LLC
发明人： Wei Yi , Kenneth K. Tsang , Stephen K. Lam , Xiwei Bai , Jack A. Crowell , Elias A. Flores
IPC分类号： H01L47/00 , H01L27/26 , H01L45/00
摘要： A vanadium dioxide (VO2)-based threshold switch device exhibiting current-controlled negative differential resistance (S-type NDR), an electrical oscillator circuit based on the threshold switch device, a wafer including a plurality of said devices, and a method of manufacturing said device are provided. The VO2-based threshold switch device exhibits volatile resistance switching and current-controlled negative differential resistance from the first time a sweeping voltage or voltage pulse is applied across the device without being treated with an electroforming process. Furthermore, the device exhibits substantially identical switching characteristics over at least 103 switching operations between a high resistance state (HRS) and a low resistance state (LRS), and a plurality of threshold switch devices exhibits a threshold voltage VT spreading of less than about 25%. The threshold switch device may be included in an oscillator circuit to produce an astable oscillator that may serve as a functional building block in spiking-neuron based neuromorphic computing.

3. 发明申请

US20180040820A1 Rectifier for Electromagnetic Radiation 审中-公开
公开(公告)号：US20180040820A1
公开(公告)日：2018-02-08
申请号：US15669915
申请日：2017-08-05
申请人： Chris W. Mann , Kyle W. Hoover , Gennady Shvets
发明人： Chris W. Mann , Kyle W. Hoover , Gennady Shvets
IPC分类号： H01L47/02 , H01L27/26
CPC分类号： H01L47/023 , G01J5/0837 , H01L27/265 , H01L47/026 , H01Q1/248 , H01Q1/36 , H01Q15/008 , H03K17/58
摘要： A rectifier is provided for converting an oscillating electromagnetic field into a direct current and comprises an electrically conductive antenna layer configured to absorb electromagnetic radiation, an electrically conductive mirror layer configured to provide an electromagnetic mirror charge of the antenna layer, an electrically insulating tunnel barrier layer positioned between the antenna layer and the mirror layer, and an electronic circuit electrically connected between the conductive mirror layer and the conductive antenna layer. The rectifier employs a metamaterial configuration for room temperature rectification of radiation in regions of the electromagnetic spectrum comprising the MWIR and LWIR regions. Methods for use of the rectifier in rectifying and detecting radiation are described.

4. 发明申请

US20170243924A1 NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICE BASED ON FAST DIFFUSIVE METAL ATOMS 审中-公开
公开(公告)号：US20170243924A1
公开(公告)日：2017-08-24
申请号：US15500084
申请日：2014-12-19
申请人： HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
发明人： Jianhua YANG , Stanley WILLIAMS , Max ZHANG , Zhiyong LI
IPC分类号： H01L27/26 , H01L47/00
CPC分类号： H01L27/26 , H01L27/2409 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/146 , H01L47/005
摘要： A negative differential resistance (NDR) device for non-volatile memory cells in crossbar arrays is provided. Each non-volatile memory cell is situated at a crosspoint of the array. Each non-volatile memory cell comprises a switching layer in series with an NDR material containing fast diffusive atoms that are electrochemically inactive. The switching layer is positioned between two elec-trodes.

5. 发明申请

US20130299769A1 LINE AND SPACE ARCHITECTURE FOR A NON-VOLATILE MEMORY DEVICE 失效
标题翻译：用于非易失性存储器件的线和空间结构
公开(公告)号：US20130299769A1
公开(公告)日：2013-11-14
申请号：US13468201
申请日：2012-05-10
申请人： Steven Patrick MAXWELL
发明人： Steven Patrick MAXWELL
IPC分类号： H01L27/26 , H01L47/00
CPC分类号： H01L45/1675 , H01L45/085 , H01L45/1233 , H01L45/148 , H01L45/1616
摘要： A non-volatile memory device includes first wiring structures elongated in a first direction and separated by a first gap region in a second direction, the first gap region comprising first dielectric material formed in a first process, second wiring structures elongated in a second direction and separated by a second gap region in a first direction, the second gap region comprising second dielectric material formed in a second process, and a resistive switching devices comprising active conductive material, resistive switching material, and a junction material, wherein resistive switching devices are formed at intersections of the first wiring structures and the second wiring structures, wherein the junction material comprising p+ polysilicon material overlying the first wiring material, wherein some resistive switching devices are separated by the first gap region and some resistive switching devices separated by the second gap region.
摘要翻译：非易失性存储器件包括在第一方向上延伸并在第二方向上由第一间隙区分隔开的第一布线结构，所述第一间隙区域包括以第一工艺形成的第一电介质材料，在第二方向上延伸的第二布线结构，由第二方向的第二间隙区域分隔，第二间隙区域包括以第二工序形成的第二电介质材料，以及包括有源导电材料，电阻开关材料和结材料的电阻式开关器件，其中形成电阻式开关器件在所述第一布线结构和所述第二布线结构的交叉处，其中所述结合材料包括覆盖所述第一布线材料的p +多晶硅材料，其中一些电阻式开关器件由所述第一间隙区域和由所述第二间隙区域分隔的一些电阻式开关器件分离。

6. 发明申请

US20130277639A1 SELF-ALIGNED PROCESS TO FABRICATE A MEMORY CELL ARRAY WITH A SURROUNDING-GATE ACCESS TRANSISTOR 有权
标题翻译：具有环绕门控存取晶体管的存储器单元阵列的自对准过程
公开(公告)号：US20130277639A1
公开(公告)日：2013-10-24
申请号：US13451902
申请日：2012-04-20
申请人： Matthew J. BrightSky , Chung H. Lam , Gen P. Lauer
发明人： Matthew J. BrightSky , Chung H. Lam , Gen P. Lauer
IPC分类号： H01L27/26 , H01L47/00
CPC分类号： H01L21/28008 , H01L27/2454 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144
摘要： A memory array including a plurality of memory cells. Each word line is electrically coupled to a set of memory cells, a gate contact and a pair of dielectric pillars positioned parallel to the word line with a spacer of electrically insulating material surrounding the gate contact. Also a method to prevent a gate contact from electrically connecting to a source contact for a plurality of memory cells on a substrate. The method includes depositing and etching gate material to partially fill a space between the pillars and to form a word line for the memory cells, etching a gate contact region for the word line between the pair of pillars, forming a spacer of electrically insulating material in the gate contact region, and depositing a gate contact between the pair of pillars to be in electrical contact with the gate material such that the spacer surrounds the gate contact.
摘要翻译：一种包括多个存储单元的存储器阵列。每个字线电耦合到一组存储器单元，栅极接触和一对平行于字线定位的介电柱，其中隔离物围绕栅极接触的电绝缘材料。也是防止栅极接触与衬底上的多个存储器单元的源极接触电连接的方法。该方法包括沉积和蚀刻栅极材料以部分地填充柱之间的空间并形成用于存储单元的字线，蚀刻一对柱之间的字线的栅极接触区域，形成电绝缘材料的间隔物所述栅极接触区域以及在所述一对柱之间沉积栅极接触以与所述栅极材料电接触，使得所述间隔物围绕所述栅极接触。

7. 发明授权

US08384061B2 Nonvolatile memory device and manufacturing method 有权
标题翻译：非易失存储器件及其制造方法
公开(公告)号：US08384061B2
公开(公告)日：2013-02-26
申请号：US12745190
申请日：2008-11-06
申请人： Takumi Mikawa , Kenji Tominaga , Kazuhiko Shimakawa , Ryotaro Azuma
发明人： Takumi Mikawa , Kenji Tominaga , Kazuhiko Shimakawa , Ryotaro Azuma
IPC分类号： H01L27/26 , H01L29/8605 , H01L21/02
CPC分类号： H01L27/2409 , G11C13/0002 , G11C2213/71 , G11C2213/72 , H01L27/101 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1683
摘要： A nonvolatile memory device of the present invention includes a substrate (1), first wires (3), first resistance variable elements (5) and lower electrodes (6) of first diode elements which are filled in first through-holes (4), respectively, second wires (11) which cross the first wires 3 perpendicularly to the first wires 3, respectively, and each of which includes a semiconductor layer (7) of a first diode elements, a conductive layer (8) and a semiconductor layer (10) of a second diode elements which are stacked together in this order, second resistance variable elements (16) and upper electrodes (14) of second diode elements which are filled into second through holes (13), respectively, and third wires (17), and the conductive layer (8) of each second wires (11) also serves as the upper electrode of the first diode elements (9) and the lower electrode of the second diode elements (15).
摘要翻译：本发明的非易失性存储器件包括填充在第一通孔（4）中的基片（1），第一布线（3），第一电阻可变元件（5）和第一二极管元件的下电极（6）分别与第一布线3分别垂直于第一布线3交叉的第二布线（11），每条布线包括第一二极管元件的半导体层（7），导电层（8）和半导体层（ 10）分别被填充到第二通孔（13）中的第二电阻可变元件（16）和第二二极管元件的上电极（14）以及第三电线（17）），并且每个第二布线（11）的导电层（8）也用作第一二极管元件（9）的上电极和第二二极管元件（15）的下电极。

8. 发明申请

US20120300533A1 NONVOLATILE MEMORY CELL OPERATING BY INCREASING ORDER IN POLYCRYSTALLINE SEMICONDUCTOR MATERIAL 有权
标题翻译：通过在多晶半导体材料中增加订单来操作非易失性存储器单元
公开(公告)号：US20120300533A1
公开(公告)日：2012-11-29
申请号：US13568834
申请日：2012-08-07
申请人： S. Brad Herner , Abhijit Bandyopadhyay
发明人： S. Brad Herner , Abhijit Bandyopadhyay
IPC分类号： G11C11/00 , H01L27/26 , H01L47/00
CPC分类号： G11C11/36 , G11C5/02 , G11C11/39 , G11C17/06 , G11C17/16 , H01L27/1021
摘要： A memory cell is provided that includes a first conductor, a second conductor, and a semiconductor junction diode between the first and second conductors. The semiconductor junction diode is not in contact with a material having a lattice mismatch of less than 12 percent with the semiconductor junction diode. In addition, no resistance-switching element having its resistance changed by application of a programming voltage by more than a factor of two is disposed between the semiconductor junction diode and the first conductor or between the semiconductor junction diode and the second conductor. Numerous other aspects are provided.
摘要翻译：提供了一种存储单元，其包括在第一和第二导体之间的第一导体，第二导体和半导体结二极管。半导体结二极管与半导体结二极管不与具有小于12％的晶格失配的材料接触。此外，在半导体结二极管和第一导体之间或半导体结二极管和第二导体之间设置不具有通过施加编程电压大于2的电阻而改变其电阻的电阻切换元件。提供了许多其他方面。

9. 发明授权

US4789887A Controlling oscillator 失效
标题翻译：控制振荡器
公开(公告)号：US4789887A
公开(公告)日：1988-12-06
申请号：US912975
申请日：1986-09-29
申请人： Ian Crossley , Daniel Donoghue , Robert Goldwasser , John Miley , Frank Spooner
发明人： Ian Crossley , Daniel Donoghue , Robert Goldwasser , John Miley , Frank Spooner
IPC分类号： H03L7/04 , H01L29/06 , H01L27/12 , H01L27/26
CPC分类号： H03L7/04
摘要： A voltage controlled oscillator includes a VCO chip that is a monolithic circuit with a Gunn diode and varactor diode intercoupled by a resonant circuit. A detector/discriminator/power divider chip is coupled to the VCO chip through a directional coupler and is a monolithic circuit having a pair of discriminator diodes and amplitude detector diode on a semi-insulating substrate with associated circuit components. Connected-together electrodes of the discriminator diodes are connected to one output of the power divider. An electrode of the amplitude detector diode is connected to the other output of the power divider. Stagger-tuned resonant circuits are coupled to the other electrodes of the discriminator diodes. Conducting portions forming low pass filters couple the amplitude detector diode and the discriminator detector diodes to respective outputs. The outputs of the discriminator and amplitude detector are coupled to respective inputs of an analog divider that provides a ratio signal that is coupled to the - input of a differential amplifier. The + input of the differential amplifier receives a frequency designating potential. The output of the differential amplifier is coupled to the varactor diode.
摘要翻译：压控振荡器包括VCO芯片，其是具有耿氏二极管和变容二极管的单片电路，其由谐振电路相互耦合。检测器/鉴频器/功率分配器芯片通过定向耦合器耦合到VCO芯片，并且是在具有相关联的电路部件的半绝缘衬底上具有一对鉴别二极管和振幅检测器二极管的单片电路。鉴别二极管的连接电极连接到功率分配器的一个输出端。振幅检测器二极管的电极连接到功率分配器的另一个输出端。交错调谐的谐振电路耦合到鉴别二极管的其它电极。形成低通滤波器的导电部分将振幅检测器二极管和鉴别器检测器二极管耦合到相应的输出。鉴别器和幅度检测器的输出耦合到模拟分频器的相应输入，模拟分频器提供耦合到差分放大器的输入端的比率信号。差分放大器的+输入接收频率指定电位。差分放大器的输出耦合到变容二极管。

10. 发明授权

US4660063A Immersion type ISFET 失效
标题翻译：浸入型ISFET
公开(公告)号：US4660063A
公开(公告)日：1987-04-21
申请号：US713143
申请日：1985-03-18
申请人： Thomas R. Anthony
发明人： Thomas R. Anthony
IPC分类号： G01N27/414 , H01L29/08 , H01L29/06 , H01L29/66 , H01L27/26
CPC分类号： G01N27/414 , H01L29/0847
摘要： Three-dimensional diode arrays have been produced in semiconductor wafers by a two-step process involving laser drilling and solid-state diffusion.Holes are first produced in the wafer in various arrays by laser drilling. Under suitable conditions, laser drilling causes little or no damage to the wafer. Cylindrical P-N junctions are then formed around the laser-drilled holes by diffusing an impurity into the wafer from the walls of the hole. A variety of distinctly different ISFET devices is produced.
摘要翻译：已经通过涉及激光钻孔和固态扩散的两步工艺在半导体晶片中产生了三维二极管阵列。首先通过激光钻孔在各种阵列中在晶片中生产孔。在合适的条件下，激光钻孔对晶片造成很少或没有损坏。然后通过从孔的壁将杂质扩散到晶片中，在激光钻孔周围形成圆柱形P-N结。产生各种明显不同的ISFET器件。

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