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1. 发明授权

US11595055B2 Methods and apparatus to parallelize data decompression 有权
公开(公告)号：US11595055B2
公开(公告)日：2023-02-28
申请号：US17586598
申请日：2022-01-27
申请人： Intel Corporation
发明人： Vinodh Gopal , James D. Guilford , Sudhir K. Satpathy , Sanu K. Mathew
IPC分类号： H03M7/34 , H03M7/30 , H03M7/40
摘要： Methods and apparatus to parallelize data decompression are disclosed. An example method selecting initial starting positions in a compressed data bitstream; adjusting a first one of the initial starting positions to determine a first adjusted starting position by decoding the bitstream starting at a training position in the bitstream, the decoding including traversing the bitstream from the training position as though first data located at the training position is a valid token; outputting first decoded data generated by decoding a first segment of the bitstream starting from the first adjusted starting position; and merging the first decoded data with second decoded data generated by decoding a second segment of the bitstream, the decoding of the second segment starting from a second position in the bitstream and being performed in parallel with the decoding of the first segment, and the second segment preceding the first segment in the bitstream.

2. 发明授权

US11581903B2 Data compression method and apparatus, computer-readable storage medium, and electronic device 有权
公开(公告)号：US11581903B2
公开(公告)日：2023-02-14
申请号：US17526335
申请日：2021-11-15
申请人： Beijing Horizon Information Technology Co., Ltd.
发明人： Zhenjiang Wang , Jianjun Li , Zhuoran Zhao , Chang Huang
IPC分类号： H03M7/00 , H03M7/34 , H03M7/30
摘要： Disclosed are a data compression method, a computer-readable storage medium, and an electronic device. The method includes: converting each data in a to-be-compressed data set into binary data in a preset format; determining a to-be-compressed bit and a significant bit for the each data in the to-be-compressed data set based on a sequence of all bits of the binary data; determining a compression bit width corresponding to the to-be-compressed data set based on bit widths of the significant bits; compressing the each data in the to-be-compressed data set based on the compression bit width, to obtain a compressed data set; and generating attribute information of the compressed data set. According to the present disclosure, the significant bit can be determined based on the sequence of all bits without adjusting orders of the bits of the binary data, thereby simplifying a data compression process and improving efficiency of data compression.

3. 发明授权

US11423247B2 Identifying fixed bits of a bitstring format 有权
公开(公告)号：US11423247B2
公开(公告)日：2022-08-23
申请号：US16839982
申请日：2020-04-03
申请人： SRI International
发明人： Ashish Tiwari , Susmit Jha , Patrick Lincoln
IPC分类号： H03M7/34 , H03M7/00 , G06K9/62 , G06F9/54 , H03M7/30 , H03M7/40
摘要： Techniques are disclosed for identifying fixed bits of a bitstring format. One or more processors are configured to generate a first bitstring having respective first bit values that have a first satisfiability state and generate a second bitstring having respective second bit values that have a second satisfiability state. The one or more processors are configured to identify first potential free bits having respective first common values and generate a third bitstring having first potential free bits with the respective first common values and third remaining bits. The one or more processors are configured to identify second potential free bits having respective second common values and identify a fixed bit that is not included in the first potential free bits and is not included in the second potential free bits.

4. 发明授权

US11218163B2 Memory system and information processing system 有权
公开(公告)号：US11218163B2
公开(公告)日：2022-01-04
申请号：US17039893
申请日：2020-09-30
申请人： TOSHIBA MEMORY CORPORATION
发明人： Keiri Nakanishi , Youhei Fukazawa
IPC分类号： H03M7/00 , H03M7/34 , H03M7/30 , G06F3/06 , G06F12/02 , G06F9/54
摘要： A memory system includes a nonvolatile memory, an interface circuit, and a controller configured to upon receipt of a plurality of write commands for storing write data in the nonvolatile memory via the interface circuit, acquire compression-ratio information about the write data associated with each write command, determine a compression ratio of each write data based on the acquired compression-ratio information, and determine an execution order of the write commands based on the determined compression ratio.

5. 发明授权

US11171665B2 Dictionary-based data compression 有权
公开(公告)号：US11171665B2
公开(公告)日：2021-11-09
申请号：US16646135
申请日：2018-09-10
申请人： Nyriad Limited
发明人： Alexander Kingsley St. John
IPC分类号： H03M7/34 , H03M7/30
摘要： Approaches to dictionary-based data compression are disclosed, including those in which a Zbuffer is used to identify phrases that represent uncompressed data and/or to generate decompressed data by combining a set of overlapping occluded phrases.

6. 发明授权

US11095305B1 Method and apparatus for high performance compression and decompression 有权
公开(公告)号：US11095305B1
公开(公告)日：2021-08-17
申请号：US16391246
申请日：2019-04-22
申请人： Intel Corporation
发明人： James Guilford , Kirk Yap , Vinodh Gopal , Daniel Cutter , Wajdi Feghali
IPC分类号： H03M7/34 , H03M7/30 , H03M7/40
摘要： An apparatus and method for performing efficient lossless compression. For example, one embodiment of an apparatus comprises: first compression circuitry to identify and replace one or more repeated bit strings from an input data stream with distances to the one or more repeated bit strings, the first compression circuitry to generate a first compressed data stream comprising literal-length data identifying a first instance of each repeated bit string and distance data comprising distances from the first instance to each repeated instance of the repeated bit string; second compression circuitry to perform sorting, tree generation, and length calculations for literal-length values and distance values of the first compressed data stream, the second compression circuitry comprising: variable length code mapping circuitry to map each literal-length value and distance value to a variable length code; header generation circuitry to generate a header for a final compressed bit stream using the length calculations; and a transcoder to substitute the variable length codes in place of the literal-length and distance values to generate a compressed bit stream body, wherein the transcoder operates in parallel with the header generation circuitry; and bit stream merge circuitry to combine the header with the compressed bit stream body to generate a final lossless compressed bitstream.

7. 发明授权

US11050436B2 Advanced database compression 有权
公开(公告)号：US11050436B2
公开(公告)日：2021-06-29
申请号：US16729721
申请日：2019-12-30
申请人： SAP SE
发明人： Robert Lasch , Ismail Oukid , Norman May
IPC分类号： H03M7/34 , H03M7/30 , G06F16/174 , G06F9/38
摘要： A method, a system, and a computer program product for executing a database compression. A compressed string dictionary having a block size and a front coding bucket size is generated from a dataset. Front coding is applied to one or more buckets of strings in the dictionary having the front coding bucket size to generate one or more front coded buckets of strings. One or more portions of the generated front coded buckets of strings are concatenated to form one or more blocks having the block size. Each block is compressed. A set of compressed blocks is stored. The set of the compressed blocks stores all strings in the dataset.

8. 发明授权

US11005496B2 Multi-mode compression acceleration 有权
公开(公告)号：US11005496B2
公开(公告)日：2021-05-11
申请号：US16668061
申请日：2019-10-30
申请人： International Business Machines Corporation
发明人： Anthony T. Sofia , Matthias Klein , Jonathan D. Bradbury , Peter Sutton
IPC分类号： H03M7/34 , H03M7/30 , G06F9/38 , G06F15/173
摘要： A computer system includes a plurality of hardware processors, and a hardware accelerator. A first processor among the plurality of processor runs an application that issues a data compression request to compress or decompress a data stream. The hardware accelerator selectively operates in different modes to compresses or decompresses the data stream. Based on a selected mode, the hardware accelerator can utilize a different number of processors among the plurality of hardware to compress or decompress the data stream.

9. 发明授权

US10985778B2 Verifying the correctness of a deflate compression accelerator 有权
公开(公告)号：US10985778B2
公开(公告)日：2021-04-20
申请号：US16741974
申请日：2020-01-14
申请人： International Business Machines Corporation
发明人： Timothy Siegel , Mark Farrell , Bruce Giamei , Matthias Klein , Ashutosh Misra , Simon Weishaupt , Girish Gopala Kurup
IPC分类号： H03M7/34 , H03M13/01 , G06F9/50 , H03M13/00 , H03M7/40 , G06F7/58 , G06F9/30 , G06F9/38 , H03M7/30
摘要： Embodiments of the invention are directed to a DEFLATE compression accelerator and to a method for verifying the correctness of the DEFLATE compression accelerator. The accelerator includes an input buffer and a Lempel-Ziv 77 (LZ77) compressor communicatively coupled to an output of the input buffer. A switch is communicatively coupled to the output of the input buffer and to the output of the LZ77 compressor. The switch is configured to bypass the LZ77 compressor during a compression test. The accelerator further includes a deflate Huffman encoder communicatively coupled to an output of the switch and an output buffer communicatively coupled to the deflate Huffman encoder. When the switch is not bypassed, the compressor can be modified to produce repeatable results.

10. 发明授权

US10763894B2 Methods and apparatus to parallelize data decompression 有权
公开(公告)号：US10763894B2
公开(公告)日：2020-09-01
申请号：US16402845
申请日：2019-05-03
申请人： Intel Corporation
发明人： Vinodh Gopal , James D. Guilford , Sudhir K. Satpathy , Sanu K. Mathew
IPC分类号： H03M7/34 , H03M7/30 , H03M7/40
摘要： Methods and apparatus to parallelize data decompression are disclosed. An example method selecting initial starting positions in a compressed data bitstream; adjusting a first one of the initial starting positions to determine a first adjusted starting position by decoding the bitstream starting at a training position in the bitstream, the decoding including traversing the bitstream from the training position as though first data located at the training position is a valid token; outputting first decoded data generated by decoding a first segment of the bitstream starting from the first adjusted starting position; and merging the first decoded data with second decoded data generated by decoding a second segment of the bitstream, the decoding of the second segment starting from a second position in the bitstream and being performed in parallel with the decoding of the first segment, and the second segment preceding the first segment in the bitstream.

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