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11. 发明申请

US20100029223A1 METHODS AND APPARATUS FOR IMPLEMENTING PHASE ROTATION AT BASEBAND FREQUENCY FOR TRANSMIT DIVERSITY 有权
标题翻译：用于实施基带频率的发射多径相位旋转的方法和装置
公开(公告)号：US20100029223A1
公开(公告)日：2010-02-04
申请号：US12185041
申请日：2008-08-01
申请人： Yiwu Tang , Christian Holenstein , Marco Cassia , Mahim Ranjan
发明人： Yiwu Tang , Christian Holenstein , Marco Cassia , Mahim Ranjan
IPC分类号： H04B7/02
CPC分类号： H04B7/0682 , H04L1/0618 , H04L1/08
摘要： An apparatus for implementing phase rotation at baseband frequency for transmit diversity may include a primary transmit signal path and a diversity transmit signal path. Both the primary transmit signal path and the diversity transmit signal path may receive a primary transmit signal. A signal selector within the diversity transmit signal path may perform phase rotation with respect to the primary transmit signal while the primary transmit signal is at a baseband frequency, thereby producing a diversity transmit signal.
摘要翻译：用于实现用于发射分集的基带频率的相位旋转的装置可以包括主发射信号路径和分集发射信号路径。主发射信号路径和分集发射信号路径都可以接收主发射信号。在主发射信号处于基带频率的同时，分集发射信号路径内的信号选择器可以执行相对于主发射信号的相位旋转，从而产生分集发射信号。

12. 发明授权

US08395435B2 Switches with bias resistors for even voltage distribution 有权
标题翻译：具有偏置电阻的开关，用于均匀的电压分配
公开(公告)号：US08395435B2
公开(公告)日：2013-03-12
申请号：US12615107
申请日：2009-11-09
申请人： Marco Cassia , Jeremy D. Dunworth
发明人： Marco Cassia , Jeremy D. Dunworth
IPC分类号： H03K17/687
CPC分类号： H03K17/102 , H03F3/72 , H03K17/693 , H03K2217/0018
摘要： Switches with connected bulk for improved switching performance and bias resistors for even voltage distribution to improve reliability are described. In an exemplary design, a switch may include a plurality of transistors coupled in a stack and at least one resistor coupled to at least one intermediate node in the stack. The transistors may have (i) a first voltage applied to a first transistor in the stack and (ii) a second voltage that is lower than the first voltage applied to bulk nodes of the transistors. The resistor(s) may maintain matching bias conditions for the transistors when they are turned off. In one exemplary design, one resistor may be coupled between the source and drain of each transistor. In another exemplary design, one resistor may be coupled between each intermediate node and the first voltage. The resistor(s) may maintain the source of each transistor at the first voltage.
摘要翻译：描述了具有连接体积的开关，用于提高开关性能和用于均匀电压分配的偏置电阻器以提高可靠性在示例性设计中，开关可以包括耦合在堆叠中的多个晶体管和耦合到堆叠中的至少一个中间节点的至少一个电阻器。晶体管可以具有（i）施加到堆叠中的第一晶体管的第一电压和（ii）低于施加到晶体管的体节点的第一电压的第二电压。当晶体管关断时，电阻可以保持晶体管的匹配偏置条件。在一个示例性设计中，一个电阻器可以耦合在每个晶体管的源极和漏极之间。在另一示例性设计中，一个电阻器可以耦合在每个中间节点和第一电压之间。电阻器可以将每个晶体管的源极保持在第一电压。

13. 发明授权

US08283964B2 Level shifters and high voltage logic circuits 有权
标题翻译：电平移位器和高压逻辑电路
公开(公告)号：US08283964B2
公开(公告)日：2012-10-09
申请号：US12633675
申请日：2009-12-08
申请人： Marco Cassia
发明人： Marco Cassia
IPC分类号： H03L5/00
CPC分类号： H03K3/35613 , H03K19/018528
摘要： Level shifters and high voltage logic circuits implemented with MOS transistors having a low breakdown voltage relative to the voltage swing of the input and output signals are described. In an exemplary design, a level shifter includes a driver circuit and a latch. The driver circuit receives an input signal having a first voltage range and provides a drive signal having a second voltage range. The first and second voltage ranges may cover positive and negative voltages or different ranges of positive voltages. The latch receives the drive signal and provides an output signal having the second voltage range. The driver circuit may generate a control signal having a full voltage range based on the input signal and may then generate the drive signal based on the control signal. The level shifter may be used to implement a high voltage logic circuit.
摘要翻译：描述了相对于输入和输出信号的电压摆幅具有低击穿电压的MOS晶体管实现的电平移位器和高电压逻辑电路。在示例性设计中，电平移位器包括驱动器电路和锁存器。驱动电路接收具有第一电压范围的输入信号，并提供具有第二电压范围的驱动信号。第一和第二电压范围可以覆盖正电压或负电压或不同范围的正电压。锁存器接收驱动信号并提供具有第二电压范围的输出信号。驱动器电路可以基于输入信号产生具有全电压范围的控制信号，然后可以基于控制信号产生驱动信号。电平移位器可以用于实现高压逻辑电路。

14. 发明授权

US08058922B2 Switch with improved biasing 有权
标题翻译：切换具有改进的偏置
公开(公告)号：US08058922B2
公开(公告)日：2011-11-15
申请号：US12623197
申请日：2009-11-20
申请人： Marco Cassia
发明人： Marco Cassia
IPC分类号： H03K3/01
CPC分类号： H03K17/102 , H03F3/72 , H03K17/693 , H03K2217/0018
摘要： Switches with improved biasing and having better isolation and reliability are described. In an exemplary design, a switch is implemented with a set of transistors, a set of resistors, and an additional resistor. The set of transistors is coupled in a stacked configuration, receives an input signal, and provides an output signal. The set of resistors is coupled to the gates of the set of transistors. The additional resistor is coupled to the set of resistors and receives a control signal for the set of transistors. The resistors reduce signal loss through parasitic capacitances of the transistors when they are turned on. The resistors also help split the signal swing of the input signal approximately evenly across the transistors when they are turned off, which may improve reliability of the transistors. The switch may be used in a switchplexer, a power amplifier (PA) module, etc.
摘要翻译：描述了具有改进的偏置并且具有更好的隔离和可靠性的开关。在示例性设计中，用一组晶体管，一组电阻器和附加电阻器来实现开关。晶体管组以堆叠配置耦合，接收输入信号，并提供输出信号。该组电阻器耦合到晶体管组的栅极。附加电阻器耦合到该组电阻器并且接收该组晶体管的控制信号。当晶体管导通时，电阻通过寄生电容减小信号损耗。电阻器还有助于在晶体管关断时大致均匀地分离输入信号的信号摆幅，这可以提高晶体管的可靠性。开关可用于交换机，功率放大器（PA）模块等。

15. 发明申请

US20110143697A1 SEPARATE I AND Q BASEBAND PREDISTORTION IN DIRECT CONVERSION TRANSMITTERS 审中-公开
标题翻译：直接转换发射机中的分离I和Q基带预测
公开(公告)号：US20110143697A1
公开(公告)日：2011-06-16
申请号：US12870576
申请日：2010-08-27
申请人： Sumit Verma , Marco Cassia , Brian Clarke Banister
发明人： Sumit Verma , Marco Cassia , Brian Clarke Banister
IPC分类号： H04B1/04
CPC分类号： H04L27/367
摘要： In-Phase (I) and Quadrature (Q) signals passing from a modem into a direct conversion transmitter are predistorted separately from, and independently of, one another. The I signal is predistorted to compensate for nonlinearities in the baseband I path circuitry between the modem and the upconverter. The Q signal is predistorted to compensate for nonlinearities in the baseband Q path circuitry between the modem and the upconverter. By employing the separate I and Q path baseband predistortion method, 4FMOD power in the upconverted and amplified signal as supplied to the transmitter antenna is reduced or eliminated. In one example, the transmitter employs single sideband modulation in the 777-787 MHz Verizon Band 13 while transmitting 23 dBm in a single LTE RB without emitting more than −57 dBm/6.25 kHz 4FMOD power into a nearby 763-775 MHz public safety band that starts only two megahertz away from the lower bound of Band 13.
摘要翻译：从调制解调器传送到直接转换发射机的同相（I）和正交（Q）信号是彼此独立地进行预失真的。 I信号被预失真以补偿调制解调器和上变频器之间的基带I路径电路中的非线性。 Q信号被预失真以补偿调制解调器和上变频器之间的基带Q路径电路中的非线性。通过采用单独的I和Q路径基带预失真方法，降低或消除了提供给发射机天线的上变频和放大信号中的4FMOD功率。在一个示例中，发射机在777-787MHz Verizon Band 13中采用单边带调制，同时在单个LTE RB中传输23 dBm，而不会在附近的763-775 MHz公共安全频段发射超过-57 dBm / 6.25 kHz 4FMOD功率它距离Band 13的下边缘只有两兆赫兹。

16. 发明申请

US20110018619A1 INTEGRATED NEGATIVE VOLTAGE GENERATOR 审中-公开
标题翻译：集成负电压发电机
公开(公告)号：US20110018619A1
公开(公告)日：2011-01-27
申请号：US12618544
申请日：2009-11-13
申请人： Marco Cassia
发明人： Marco Cassia
IPC分类号： G05F3/02
CPC分类号： H02M3/07
摘要： A negative voltage generator with AC coupled control signals is described. In an exemplary design, the generator includes four switches (which may be implemented with MOS transistors) and a capacitor. A first switch is coupled between a positive input voltage and a first end of the capacitor. A second switch is coupled between the first end of the capacitor and circuit ground. A third switch is coupled between a second end of the capacitor and circuit ground. A fourth switch is coupled between the second end of the capacitor and a negative output voltage. The first and second switches are controlled by first and second control signals, respectively. The third and fourth switches are controlled by first and second AC coupled control signals, respectively. The first and second AC coupled control signals may be generated by AC coupling the first and second control signals, respectively, and applying appropriate biasing.
摘要翻译：描述了具有AC耦合控制信号的负电压发生器。在示例性设计中，发生器包括四个开关（其可以用MOS晶体管实现）和电容器。第一开关耦合在正输入电压和电容器的第一端之间。第二开关耦合在电容器的第一端和电路接地之间。第三开关耦合在电容器的第二端和电路接地之间。第四开关耦合在电容器的第二端和负输出电压之间。第一和第二开关分别由第一和第二控制信号控制。第三和第四开关分别由第一和第二AC耦合控制信号控制。第一和第二AC耦合控制信号可以分别通过AC耦合第一和第二控制信号并施加适当的偏置来产生。

17. 发明申请

US20110018606A1 LEVEL SHIFTERS AND HIGH VOLTAGE LOGIC CIRCUITS 有权
标题翻译：水平变压器和高压逻辑电路
公开(公告)号：US20110018606A1
公开(公告)日：2011-01-27
申请号：US12633675
申请日：2009-12-08
申请人： Marco Cassia
发明人： Marco Cassia
IPC分类号： H03L5/00
CPC分类号： H03K3/35613 , H03K19/018528
摘要： Level shifters and high voltage logic circuits implemented with MOS transistors having a low breakdown voltage relative to the voltage swing of the input and output signals are described. In an exemplary design, a level shifter includes a driver circuit and a latch. The driver circuit receives an input signal having a first voltage range and provides a drive signal having a second voltage range. The first and second voltage ranges may cover positive and negative voltages or different ranges of positive voltages. The latch receives the drive signal and provides an output signal having the second voltage range. The driver circuit may generate a control signal having a full voltage range based on the input signal and may then generate the drive signal based on the control signal. The level shifter may be used to implement a high voltage logic circuit.
摘要翻译：描述了相对于输入和输出信号的电压摆幅具有低击穿电压的MOS晶体管实现的电平移位器和高电压逻辑电路。在示例性设计中，电平移位器包括驱动器电路和锁存器。驱动电路接收具有第一电压范围的输入信号，并提供具有第二电压范围的驱动信号。第一和第二电压范围可以覆盖正电压或负电压或不同的正电压范围。锁存器接收驱动信号并提供具有第二电压范围的输出信号。驱动器电路可以基于输入信号产生具有全电压范围的控制信号，然后可以基于控制信号产生驱动信号。电平移位器可以用于实现高压逻辑电路。

18. 发明授权

US08195119B2 Switchable input pair operational amplifiers 有权
标题翻译：可切换输入对运算放大器
公开(公告)号：US08195119B2
公开(公告)日：2012-06-05
申请号：US12465553
申请日：2009-05-13
申请人： Marco Cassia , Aleksandar M. Tasic
发明人： Marco Cassia , Aleksandar M. Tasic
IPC分类号： H04B1/18
CPC分类号： H03F3/72 , H03F3/19 , H03F3/211 , H03F3/45183 , H03F2200/111 , H03F2200/294 , H03F2200/429 , H03F2200/451 , H03F2203/21136 , H03F2203/21178 , H03F2203/45318 , H03F2203/45352 , H03F2203/45616 , H03F2203/45702 , H03F2203/7209 , H03F2203/7215 , H03F2203/7236 , H03F2203/7239
摘要： Techniques for designing a switchable amplifier are described. In one aspect, a switchable amplifier including a core amplifier circuit configured to selectively enable one or more parallel input transistor pairs is described. The core amplifier circuit comprises a permanently enabled input transistor pair. In another aspect, a device operable between a first mode of operation and a second mode of operation comprising a receiver logic circuit for selectably enabling and disabling a plurality of input transistor pairs within a switchable amplifier is described where the switchable amplifier also includes a core amplifier circuit coupled to the receiver logic circuit for selectably enabling and disabling a transistor pair therein. The described switchable amplifiers result in the ability to provide varying amplifier performance characteristics based upon the current mode of operation of the device.
摘要翻译：描述了用于设计可切换放大器的技术。在一个方面，描述了一种可切换放大器，其包括被配置为选择性地启用一个或多个并行输入晶体管对的核心放大器电路。核心放大器电路包括永久使能的输入晶体管对。在另一方面，描述了在第一操作模式和第二操作模式之间操作的装置，其包括用于可切换地启用和禁用可切换放大器内的多个输入晶体管对的接收器逻辑电路，其中可切换放大器还包括芯放大器耦合到接收器逻辑电路的电路，用于可选地启用和禁用其中的晶体管对。所描述的可切换放大器导致基于设备的当前操作模式来提供变化的放大器性能特征的能力。

19. 发明申请

US20110025404A1 SWITCHES WITH VARIABLE CONTROL VOLTAGES 审中-公开
标题翻译：具有可变控制电压的开关
公开(公告)号：US20110025404A1
公开(公告)日：2011-02-03
申请号：US12623232
申请日：2009-11-20
申请人： Marco Cassia
发明人： Marco Cassia
IPC分类号： H03K17/687
CPC分类号： H03K17/693 , H03K17/08122 , H03K17/102 , H03K2017/066 , H03K2217/0054
摘要： Switches with variable control voltages and having improved reliability and performance are described. In an exemplary design, an apparatus includes a switch, a peak voltage detector, and a control voltage generator. The switch may be implemented with stacked transistors. The peak voltage detector detects a peak voltage of an input signal provided to the switch. In an exemplary design, the control voltage generator generates a variable control voltage to turn off the switch based on the detected peak voltage. In another exemplary design, the control voltage generator generates a variable control voltage to turn on the switch based on the detected peak voltage. In yet another exemplary design, the control voltage generator generates a control voltage to turn on the switch and attenuate the input signal when the peak voltage exceeds a high threshold.
摘要翻译：描述了具有可变控制电压并具有改进的可靠性和性能的开关。在示例性设计中，装置包括开关，峰值电压检测器和控制电压发生器。开关可以用堆叠晶体管来实现。峰值电压检测器检测提供给开关的输入信号的峰值电压。在示例性设计中，控制电压发生器产生可变控制电压，以基于检测到的峰值电压来关断开关。在另一示例性设计中，控制电压发生器产生可变控制电压，以基于检测到的峰值电压来接通开关。在另一示例性设计中，当峰值电压超过高阈值时，控制电压发生器产生控制电压以接通开关并衰减输入信号。

20. 发明申请

US20110018583A1 HIGH VOLTAGE LOGIC CIRCUITS 有权
标题翻译：高电压逻辑电路
公开(公告)号：US20110018583A1
公开(公告)日：2011-01-27
申请号：US12619562
申请日：2009-11-16
申请人： Marco Cassia
发明人： Marco Cassia
IPC分类号： H03K19/0175
CPC分类号： H03K19/018521 , H03K19/0013 , H03K19/00315
摘要： High voltage logic circuits that can handle digital input and output signals having a larger voltage range are described. In an exemplary design, a high voltage logic circuit includes an input stage, a second stage, and an output stage. The input stage receives at least one input signal and provides (i) at least one first intermediate signal having a first voltage range and (ii) at least one second intermediate signal having a second voltage range. The second stage receives and processes the first and second intermediate signals based on a logic function and provides (i) a first drive signal having the first voltage range and (ii) a second drive signal having the second voltage range. The output stage receives the first and second drive signals and provides an output signal having a third voltage range, which may be larger than each of the first and second voltage ranges.
摘要翻译：描述了可以处理具有较大电压范围的数字输入和输出信号的高电压逻辑电路。在示例性设计中，高压逻辑电路包括输入级，第二级和输出级。输入级接收至少一个输入信号，并提供（i）具有第一电压范围的至少一个第一中间信号和（ii）具有第二电压范围的至少一个第二中间信号。第二级基于逻辑功能接收和处理第一和第二中间信号，并提供（i）具有第一电压范围的第一驱动信号和（ii）具有第二电压范围的第二驱动信号。输出级接收第一和第二驱动信号，并提供具有第三电压范围的输出信号，其可以大于第一和第二电压范围中的每一个。

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