专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US07863148B2 Method for integrating SiGe NPN and vertical PNP devices 有权
标题翻译： SiGe NPN和垂直PNP器件的集成方法
公开(公告)号：US07863148B2
公开(公告)日：2011-01-04
申请号：US12384937
申请日：2009-04-10
申请人： Paul D. Hurwitz , Kenneth M. Ring , Chun Hu , Amol M Kalburge
发明人： Paul D. Hurwitz , Kenneth M. Ring , Chun Hu , Amol M Kalburge
IPC分类号： H01L21/8228 , H01L21/331 , H01L21/8222 , H01L21/8238
CPC分类号： H01L21/82285 , H01L21/8228 , H01L27/0826
摘要： According to one exemplary embodiment, a method for forming an NPN and a vertical PNP device on a substrate comprises forming an insulating layer over an NPN region and a PNP region of the substrate. The method further comprises forming a buffer layer on the insulating layer and forming an opening in the buffer layer and the insulating layer in the NPN region, where the opening exposes the substrate. The method further comprises forming a semiconductor layer on the buffer layer and in the opening in the NPN region, where the semiconductor layer has a first portion situated in the opening and a second portion situated on the buffer layer in the PNP region. The first portion of the semiconductor layer forms a single crystal base of the NPN device and the second portion of the semiconductor layer forms a polycrystalline emitter of the vertical PNP device.
摘要翻译：根据一个示例性实施例，在衬底上形成NPN和垂直PNP器件的方法包括在衬底的NPN区域和PNP区域上形成绝缘层。该方法还包括在绝缘层上形成缓冲层，并在NPN区域中的缓冲层和绝缘层中形成开口，其中开口露出基板。所述方法还包括在所述NPN区域中的所述缓冲层和所述开口中形成半导体层，其中所述半导体层具有位于所述开口中的第一部分和位于所述PNP区域中的所述缓冲层上的第二部分。半导体层的第一部分形成NPN器件的单晶基底，半导体层的第二部分形成垂直PNP器件的多晶发射极。

22. 发明申请

US20090203183A1 Method for integrating SIGE NPN and Vertical PNP Devices 有权
标题翻译：集成SIGE NPN和垂直PNP器件的方法
公开(公告)号：US20090203183A1
公开(公告)日：2009-08-13
申请号：US12384937
申请日：2009-04-10
申请人： Paul D. Hurwitz , Kenneth M. Ring , Chun Hu , Amol M. Kalburge
发明人： Paul D. Hurwitz , Kenneth M. Ring , Chun Hu , Amol M. Kalburge
IPC分类号： H01L21/8228
CPC分类号： H01L21/82285 , H01L21/8228 , H01L27/0826
摘要： According to one exemplary embodiment, a method for forming an NPN and a vertical PNP device on a substrate comprises forming an insulating layer over an NPN region and a PNP region of the substrate. The method further comprises forming a buffer layer on the insulating layer and forming an opening in the buffer layer and the insulating layer in the NPN region, where the opening exposes the substrate. The method further comprises forming a semiconductor layer on the buffer layer and in the opening in the NPN region, where the semiconductor layer has a first portion situated in the opening and a second portion situated on the buffer layer in the PNP region. The first portion of the semiconductor layer forms a single crystal base of the NPN device and the second portion of the semiconductor layer forms a polycrystalline emitter of the vertical PNP device.
摘要翻译：根据一个示例性实施例，在衬底上形成NPN和垂直PNP器件的方法包括在衬底的NPN区域和PNP区域上形成绝缘层。该方法还包括在绝缘层上形成缓冲层，并在NPN区域中的缓冲层和绝缘层中形成开口，其中开口露出基板。所述方法还包括在所述NPN区域中的所述缓冲层和所述开口中形成半导体层，其中所述半导体层具有位于所述开口中的第一部分和位于所述PNP区域中的所述缓冲层上的第二部分。半导体层的第一部分形成NPN器件的单晶基底，半导体层的第二部分形成垂直PNP器件的多晶发射极。

23. 发明授权

US07541231B1 Integration of SiGe NPN and vertical PNP devices on a substrate 有权
标题翻译：将SiGe NPN和垂直PNP器件集成在衬底上
公开(公告)号：US07541231B1
公开(公告)日：2009-06-02
申请号：US11084391
申请日：2005-03-17
申请人： Paul D. Hurwitz , Kenneth M. Ring , Chun Hu , Amol Kalburge
发明人： Paul D. Hurwitz , Kenneth M. Ring , Chun Hu , Amol Kalburge
IPC分类号： H01L21/338 , H01L31/0328 , H01L31/0336 , H01L31/072 , H01L31/109
CPC分类号： H01L21/82285 , H01L21/8228 , H01L27/0826
摘要： According to one exemplary embodiment, a method for forming an NPN and a vertical PNP device on a substrate comprises forming an insulating layer over an NPN region and a PNP region of the substrate. The method further comprises forming a buffer layer on the insulating layer and forming an opening in the buffer layer and the insulating layer in the NPN region, where the opening exposes the substrate. The method further comprises forming a semiconductor layer on the buffer layer and in the opening in the NPN region, where the semiconductor layer has a first portion situated in the opening and a second portion situated on the buffer layer in the PNP region. The first portion of the semiconductor layer forms a single crystal base of the NPN device and the second portion of the semiconductor layer forms a polycrystalline emitter of the vertical PNP device.
摘要翻译：根据一个示例性实施例，在衬底上形成NPN和垂直PNP器件的方法包括在衬底的NPN区域和PNP区域上形成绝缘层。该方法还包括在绝缘层上形成缓冲层，并在NPN区域中的缓冲层和绝缘层中形成开口，其中开口露出基板。所述方法还包括在所述NPN区域中的所述缓冲层和所述开口中形成半导体层，其中所述半导体层具有位于所述开口中的第一部分和位于所述PNP区域中的所述缓冲层上的第二部分。半导体层的第一部分形成NPN器件的单晶基底，半导体层的第二部分形成垂直PNP器件的多晶发射极。

24. 发明授权

US06759729B1 Temperature insensitive resistor in an IC chip 有权
标题翻译： IC芯片中的温度不敏感电阻
公开(公告)号：US06759729B1
公开(公告)日：2004-07-06
申请号：US10272888
申请日：2002-10-16
申请人： Marco Racanelli , Chun Hu , Bruce Shen
发明人： Marco Racanelli , Chun Hu , Bruce Shen
IPC分类号： H01L2900
CPC分类号： H01L28/24 , H01L27/0802 , H01L28/20
摘要： According to one exemplary embodiment, an integrated circuit chip comprises an oxide region. The integrated circuit chip further comprises a poly resistor having a first terminal and second terminal, where the poly resistor is situated over the oxide region. According to this exemplary embodiment, the integrated circuit chip further comprises a metal resistor having a first terminal and a second terminal, where the metal resistor is situated over the poly resistor, and where the first terminal of the metal resistor is connected to the first terminal of the poly resistor. According to this exemplary embodiment, the integrated circuit chip may further comprise a first metal segment connected to the second terminal of the metal resistor and a second metal segment connected to the second terminal of the poly resistor. The integrated circuit chip may further comprise an inter-layer dielectric situated between the poly resistor and the metal resistor.
摘要翻译：根据一个示例性实施例，集成电路芯片包括氧化物区域。集成电路芯片还包括具有第一端子和第二端子的聚电阻器，其中多晶硅电阻器位于氧化物区域上方。根据该示例性实施例，集成电路芯片还包括具有第一端子和第二端子的金属电阻器，其中金属电阻器位于多晶硅电阻器上方，并且金属电阻器的第一端子连接到第一端子的聚电阻。根据该示例性实施例，集成电路芯片还可以包括连接到金属电阻器的第二端子的第一金属段和连接到多晶硅电阻器的第二端子的第二金属段。集成电路芯片还可以包括位于多个电阻器和金属电阻器之间的层间电介质。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式