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21. 发明申请

US20100085573A1 SPLIT FREQUENCY SENSING METHODS AND SYSTEMS 有权
标题翻译：分离频率感测方法和系统
公开(公告)号：US20100085573A1
公开(公告)日：2010-04-08
申请号：US12573009
申请日：2009-10-02
申请人： Tao Lu , Tsu-Te Judith Su , Kerry J. Vahala , Scott E. Fraser
发明人： Tao Lu , Tsu-Te Judith Su , Kerry J. Vahala , Scott E. Fraser
IPC分类号： G01B9/02
CPC分类号： G01N21/7746
摘要： Resonant sensors and molecule detection methods utilizing split frequency. Optical energy is introduced into a microcavity, such as a toroid-shaped or spherical microcavity. A portion of the optical energy is backscattered and interacts with the introduced optical energy to form first and second modes of optical energy at respective first and second frequencies, also referred to as split frequency or mode doublets. One or more molecules bind to an outer surface of the microcavity and interact with an evanescent field of optical energy resonating within the microcavity. Binding of one or more molecules to the outer surface is detected based at least in part upon a change of the split frequency relative to a baseline split frequency.
摘要翻译：谐振传感器和分子检测方法利用分频。将光能引入微腔中，例如环形或球形微腔。光能的一部分被反向散射并与引入的光能相互作用以在相应的第一和第二频率处形成第一和第二光能模式，也被称为分裂频率或模式双峰。一个或多个分子结合到微腔的外表面并与在微腔内共振的光能的消逝场相互作用。至少部分地基于分割频率相对于基线分割频率的变化来检测一个或多个分子与外表面的结合。

22. 发明申请

US20060050565A1 Method and apparatus for operating nonvolatile memory in a parallel arrangement 有权
标题翻译：以并联方式操作非易失性存储器的方法和装置
公开(公告)号：US20060050565A1
公开(公告)日：2006-03-09
申请号：US11191329
申请日：2005-07-28
申请人： Chih Yeh , Wen Tsai , Tao Lu
发明人： Chih Yeh , Wen Tsai , Tao Lu
IPC分类号： G11C16/04
CPC分类号： G11C16/0475
摘要： A memory cell with a charge storage structure is read by measuring current between the substrate region of the memory cell and one of the current carrying nodes of the memory cell. The read operation decreases the coupling between different parts of the charge storage structure when other parts of the charge storage structure store data that are not of interest. The sensing window of the memory cell can be greatly improved by this read operation. Example arrangements are a single memory cell, a column or NOR-connected memory cells, and a virtual ground array of memory cells.
摘要翻译：具有电荷存储结构的存储单元通过测量存储单元的衬底区域和存储单元的一个载流节点之间的电流来读取。当电荷存储结构的其他部分存储不感兴趣的数据时，读取操作减小了电荷存储结构的不同部分之间的耦合。通过该读取操作可以极大地改善存储单元的感测窗口。示例性布置是单个存储器单元，列或NOR连接的存储器单元，以及存储器单元的虚拟接地阵列。

23. 发明申请

US20050190601A1 Programmable resistor eraseless memory 审中-公开
标题翻译：可编程电阻器的无刷内存
公开(公告)号：US20050190601A1
公开(公告)日：2005-09-01
申请号：US11118309
申请日：2005-04-29
申请人： Chih Yeh , Han Lai , Wen Tsai , Tao Lu , Chih Lu
发明人： Chih Yeh , Han Lai , Wen Tsai , Tao Lu , Chih Lu
IPC分类号： G11C16/04 , G11C11/56 , H01L27/10
CPC分类号： G11C11/5692
摘要： An electrically programmable non-volatile memory cell comprises a first electrode, a second electrode and an inter-electrode layer, such as ultra-thin oxide, between the first and second electrodes which is characterized by progressive change in resistance in response to program stress of relatively low voltages. A programmable resistance representing stored data is established by stressing the inter-electrode layer between the electrodes. Embodiments of the memory cell are adapted to store multiple bits of data per cell and/or adapted for programming more than one time without an erase process.
摘要翻译：电可编程非易失性存储单元包括在第一和第二电极之间的第一电极，第二电极和诸如超薄氧化物之间的电极间层，其特征在于响应于程序应力的电阻逐渐变化电压相对较低通过施加电极之间的电极间层，建立表示存储数据的可编程电阻。存储器单元的实施例适于存储每个单元的多个数据位和/或适于在不进行擦除处理的情况下编程多于一次。

24. 发明申请

US20050036368A1 Method for programming programmable eraseless memory 有权
标题翻译：编程可编程擦除存储器的方法
公开(公告)号：US20050036368A1
公开(公告)日：2005-02-17
申请号：US10642249
申请日：2003-08-15
申请人： Chih Yeh , Han Lai , Wen Tsai , Tao Lu , Chih Lu
发明人： Chih Yeh , Han Lai , Wen Tsai , Tao Lu , Chih Lu
IPC分类号： G11C13/00 , G11C11/56 , G11C17/14 , H01L27/10 , G11C11/34
CPC分类号： G11C11/5692 , G11C17/14 , G11C2211/5634 , H01L23/5252 , H01L27/101 , H01L2924/0002 , H01L2924/00
摘要： A method for programming a memory cell is based on applying stress to a memory cell, comprising a first electrode, a second electrode and an inter-electrode layer, to induce a progressive change in a property of the inter-electrode layer. The method includes a verify step including generating a signal, such as a cell current, indicating the value of the property in the selected memory cell. Then, the signal is compared with a reference signal to verify programming of the desired data. Because of the progressive nature of the change, many levels of programming can be achieved. The many levels of programming can be applied for programming a single cell more than once, without an erase process, to programming multiple bits in a single cell, and to a combination of multiple bit and multiple time of programming.
摘要翻译：用于对存储单元进行编程的方法是基于向包括第一电极，第二电极和电极间层的存储单元施加应力，以引起电极间层的性能的逐渐变化。该方法包括验证步骤，包括生成指示所选择的存储单元中的属性的值的诸如单元电流的信号。然后，将信号与参考信号进行比较，以验证所需数据的编程。由于变革的渐进性，可以实现多层次的编程。多个编程级别可以应用于单个单元的编程，而不需要擦除处理，以编程单个单元中的多个位，以及多个位和多个编程时间的组合。

25. 发明申请

US20050035429A1 Programmable eraseless memory 审中-公开
标题翻译：可编程的无刷内存
公开(公告)号：US20050035429A1
公开(公告)日：2005-02-17
申请号：US10641846
申请日：2003-08-15
申请人： Chih Yeh , Han Lai , Wen Tsai , Tao Lu , Chih Lu
发明人： Chih Yeh , Han Lai , Wen Tsai , Tao Lu , Chih Lu
IPC分类号： G11C16/04 , G11C11/56 , H01L27/10 , H01L47/00
CPC分类号： G11C11/5692
摘要： An electrically programmable non-volatile memory cell comprises a first electrode, a second electrode and an inter-electrode layer, such as ultra-thin oxide, between the first and second electrodes which is characterized by progressive change in resistance in response to program stress of relatively low voltages. A programmable resistance representing stored data is established by stressing the inter-electrode layer between the electrodes. Embodiments of the memory cell are adapted to store multiple bits of data per cell and/or adapted for programming more than one time without an erase process.
摘要翻译：电可编程非易失性存储单元包括在第一和第二电极之间的第一电极，第二电极和诸如超薄氧化物之间的电极间层，其特征在于响应于程序应力的电阻逐渐变化电压相对较低通过施加电极之间的电极间层，建立表示存储数据的可编程电阻。存储器单元的实施例适于存储每个单元的多个数据位和/或适于在不进行擦除处理的情况下编程多于一次。

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