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31. 发明公开

EP0315268A2 A divider circuit arrangement and a dual branch receiver having such a divider circuit arrangement 失效
标题翻译： Teilerschaltungseinrichtung undDoppelzweigempfängermit einer solchen Teilerschaltungseinrichtung。
公开(公告)号：EP0315268A2
公开(公告)日：1989-05-10
申请号：EP88202427.6
申请日：1988-10-31
申请人： Philips Electronics N.V.
发明人： Chung, Kah-Seng
IPC分类号： G06G7/16
CPC分类号： G06G7/16
摘要： A divider circuit arrangement in which in order to avoid dividing by zero the divisor (V d ) is modified by the addition of an extra signal (X a ) to form a modified divisor V′ d = V d + X a and the dividend (V i ) is modified by the addition of the product of the quotient (V o ) and the extra signal (X a ) to form a modified dividend V′ i = V i + V o X a .
A particular but not exclusive application of this divider circuit arrangement is in normalising an output signal from a dual branch receiver (not shown).
摘要翻译：一种除法器电路装置，为了避免除数除数（Vd），通过添加额外的信号（Xa）来修改，以形成修正除数V min d = Vd + Xa，并且除数（Vi）被修改通过添加商（Vo）和额外信号（Xa）的乘积以形成修改的分红V min i = Vi + VoXa。该分频器电路装置的一个特殊的但并不排他的应用是将来自双分支接收器（未示出）的输出信号归一化。

32. 发明公开

EP3349092A1 SINE WAVE MULTIPLIER DEVICE AND INPUT DEVICE COMPRISING SAME 审中-公开
公开(公告)号：EP3349092A1
公开(公告)日：2018-07-18
申请号：EP16855474.9
申请日：2016-10-13
申请人： Alps Electric Co., Ltd.
发明人： ASAO, Akira , SASAI, Kiyoshi , FUJIYOSHI, Tatsumi
IPC分类号： G06F1/02 , G06F7/16 , G06G7/16
CPC分类号： H03K3/012 , G06F1/02 , G06F3/0416 , G06F3/044 , G06F7/16 , G06G7/16 , H03K5/00006
摘要： In a sine-wave multiplier, signal components included in an output signal Qu1 and corresponding to the product of a third-order harmonic component of a first square wave W1 and an input signal Vi and the product of a fifth-order harmonic component of the first square wave W1 and the input signal Vi are offset by a signal component included in an output signal Qu2 and corresponding to the product of a fundamental component of a second square wave W2 and the input signal Vi and a signal component included in an output signal Qu3 and corresponding to the product of a fundamental component of a second square wave W3 and the input signal Vi.

33. 发明公开

EP3284092A1 CROSSBAR ARRAYS FOR CALCULATING MATRIX MULTIPLICATION 审中-公开
标题翻译：用于计算矩阵乘法的交叉条阵列
公开(公告)号：EP3284092A1
公开(公告)日：2018-02-21
申请号：EP15904934.5
申请日：2015-09-25
申请人： Hewlett Packard Enterprise Development LP
发明人： HU, Miao , LI, Zhiyong , STRACHAN, John Paul
IPC分类号： G11C11/16
CPC分类号： G11C13/0007 , G06G7/16 , G11C5/05 , G11C13/0023 , G11C13/003 , G11C13/0069 , G11C2213/79
摘要： A crossbar array, comprises a plurality of row lines, a plurality of column lines intersecting the plurality of row lines at a plurality of intersections, a plurality of junctions coupled between the plurality of row lines and the plurality of column lines at a portion of the plurality of intersections, and a plurality of diagonal control lines coupled to the plurality of junctions. Each junction comprises a resistive memory element and a transistor, and the junctions are positioned to calculate a matrix multiplication of a first matrix and a second matrix.

34. 发明授权

EP2012250B1 Analog Dividierer 有权
标题翻译：模拟除法
公开(公告)号：EP2012250B1
公开(公告)日：2013-11-13
申请号：EP08103649.3
申请日：2008-04-22
申请人： Siemens Aktiengesellschaft
发明人： Hallak, Jalal
IPC分类号： G06G7/16 , G06G7/161
CPC分类号： G06G7/16 , G06G7/161

35. 发明公开

EP1450289A1 Analog Divider Circuit and Method 审中-公开
标题翻译：分析Teilerschaltung和Vefahren dazu
公开(公告)号：EP1450289A1
公开(公告)日：2004-08-25
申请号：EP03018878.3
申请日：2003-08-19
申请人： Agilent Technologies, Inc.
发明人： Karlquist, Richard K.
IPC分类号： G06G7/16
CPC分类号： G06G7/16
摘要： There is disclosed a computation circuit (10), working in the modulation domain to generate a signal having phase modulation proportional to the ratio of the dividend (numerator) signal to the divisor (denominator) signal. In one embodiment, the phase modulated signal is demodulated by a phase demodulator (104) to produce a baseband quotient signal. The divisor signal maintains inverse proportional control of the modulation gain of the modulator by varying the carrier injection level, resulting in higher bandwidth and accuracy, and lower drift and offset compared to traditional analog computation techniques. In one embodiment the circuit contains all linear components, even though the division function is a non-linear function. The circuit and method operate when the input signals are analog or one or both are in the modulation domain.
摘要翻译：公开了一种在调制域中工作的计算电路（10），以产生具有与分红（分子）信号与除数（分母）信号的比率成比例的相位调制的信号。在一个实施例中，相位调制信号由相位解调器（104）解调以产生基带商信号。除数信号通过改变载波注入电平来维持调制器的调制增益的反比例控制，导致与传统模拟计算技术相比更高的带宽和精度以及更低的漂移和偏移。在一个实施例中，电路包含所有线性分量，即使分割函数是非线性函数。当输入信号为模拟信号或者一个或两个处于调制域时，该电路和方法工作。

36. 发明授权

EP0807898B1 Schaltungsanordnung zur Parametereinstellung 失效
标题翻译：参数设置电路装置
公开(公告)号：EP0807898B1
公开(公告)日：2003-01-29
申请号：EP97107745.8
申请日：1997-05-12
申请人： Infineon Technologies AG
发明人： Weber, Stephan
IPC分类号： G06G7/16
CPC分类号： G06G7/16

37. 发明授权

EP0315268B1 A divider circuit arrangement and a dual branch receiver having such a divider circuit arrangement 失效
标题翻译：除法电路装置和与该分频电路布置的双分支的接收器。
公开(公告)号：EP0315268B1
公开(公告)日：1994-03-16
申请号：EP88202427.6
申请日：1988-10-31
申请人： Philips Electronics N.V.
发明人： Chung, Kah-Seng
IPC分类号： G06G7/16
CPC分类号： G06G7/16

38. 发明公开

EP3284092A4 CROSSBAR ARRAYS FOR CALCULATING MATRIX MULTIPLICATION 审中-公开
公开(公告)号：EP3284092A4
公开(公告)日：2018-04-25
申请号：EP15904934
申请日：2015-09-25
申请人： HEWLETT PACKARD ENTPR DEVELOPMENT LP
发明人： HU MIAO , LI ZHIYONG , STRACHAN JOHN PAUL
IPC分类号： G11C11/16 , G11C13/00
CPC分类号： G06G7/16 , G11C5/05 , G11C13/0007 , G11C13/0023 , G11C13/003 , G11C13/0069 , G11C2213/79
摘要： A crossbar array, comprises a plurality of row lines, a plurality of column lines intersecting the plurality of row lines at a plurality of intersections, a plurality of junctions coupled between the plurality of row lines and the plurality of column lines at a portion of the plurality of intersections, and a plurality of diagonal control lines coupled to the plurality of junctions. Each junction comprises a resistive memory element and a transistor, and the junctions are positioned to calculate a matrix multiplication of a first matrix and a second matrix.

39. 发明公开

EP3262651A4 CROSSBAR ARRAYS FOR CALCULATING MATRIX MULTIPLICATION 审中-公开
公开(公告)号：EP3262651A4
公开(公告)日：2018-03-21
申请号：EP15901108
申请日：2015-08-07
申请人： HEWLETT PACKARD ENTPR DEVELOPMENT LP
发明人： HU MIAO , STRACHAN JOHN PAUL , LI ZHIYONG , WILLIAMS STANLEY
IPC分类号： G11C13/00 , G11C11/15
CPC分类号： G11C13/0069 , G06G7/16 , G11C13/0002 , G11C13/0007 , G11C13/004 , G11C2213/77
摘要： A crossbar array, comprises a plurality of row lines, a plurality of column lines intersecting the plurality of row lines at a plurality of intersections, and a plurality of junctions coupled between the plurality of row lines and the plurality of column lines at a portion of the plurality of intersections. Each junction comprises a resistive memory element, and the junctions are positioned to calculate a matrix multiplication of a first matrix and a second matrix.

40. 发明公开

EP2339500A3 Analog multiplier 审中-公开
标题翻译：模拟乘法器
公开(公告)号：EP2339500A3
公开(公告)日：2012-02-29
申请号：EP10195124.2
申请日：2010-12-15
申请人： Macroblock, Inc.
发明人： Shih, Fu-Yang
IPC分类号： G06G7/16
CPC分类号： G06G7/16
摘要： An analog multiplier includes a bias circuit, a level shifter, a multiplying circuit, and a current mirror. The analog multiplying circuit is used for inputting a first voltage and a second voltage, and outputting a product current. The product current is proportional to a product of the first voltage and the second voltage. The analog multiplier is implemented by a few devices, thereby having a simple architecture and being capable of being driven by a small amount of power.

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