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1. 发明申请

WO1998043412A1 CONTOUR EMPHASIZING CIRCUIT 审中-公开
标题翻译： CONTOUR EMPHISISING CIRCUIT
公开(公告)号：WO1998043412A1
公开(公告)日：1998-10-01
申请号：PCT/JP1997000997
申请日：1997-03-25
申请人： FUJITSU GENERAL LIMITED , SUZUKI, Susumu , KURITA, Masanori
发明人： FUJITSU GENERAL LIMITED
IPC分类号： H04N05/208
CPC分类号： H04N9/646 , H04N5/142
摘要： A contour emphasizing circuit is provided with a number-of-pixels changing circuit (37) which changes the numbers of pixels of digital R, G, and B signals, a gamma correction circuit (39) which performs gamma correction on the output of the circuit (37), a Y-signal generating circuit (36) which generates luminance signals from the output of the circuit (37), an contour extracting circuit (38) which extracts contour components from the output of the circuit (36), a coefficient multiplying circuit (42) which outputs contour components for R, G, and B by multiplying the extracted contour components by coefficients Kr, Kg, and Kb, and contour adding circuits (34r), (34g), and (34b) which respectively add the outputs of the circuits (39 and 42). Thus, the contour emphasizing circuit makes contour emphasis on the digital R, G, and B signals.
摘要翻译：轮廓强调电路设置有数字像素改变电路（37），其改变数字R，G和B信号的像素数量;伽马校正电路（39），对伽马校正电路电路（37），从电路（37）的输出生成亮度信号的Y信号生成电路（36），从电路（36）的输出中提取轮廓成分的轮廓提取电路（38），系数乘法电路（42），其通过将提取的轮廓分量乘以系数Kr，Kg和Kb以及轮廓加法电路（34r），（34g）和（34b）分别输出用于R，G和B的轮廓分量添加电路的输出（39和42）。因此，轮廓强调电路使得轮廓强调数字R，G和B信号。

2. 发明申请

WO1998043411A1 CONTOUR EMPHASIZING CIRCUIT 审中-公开
标题翻译： CONTOUR EMPHISISR电路
公开(公告)号：WO1998043411A1
公开(公告)日：1998-10-01
申请号：PCT/JP1997000996
申请日：1997-03-25
申请人： FUJITSU GENERAL LIMITED , SUZUKI, Susumu , KURITA, Masanori
发明人： FUJITSU GENERAL LIMITED
IPC分类号： H04N05/208
CPC分类号： H04N9/646 , H04N5/208
摘要： A contour emphasizing circuit provided with a Y-signal generating circuit (36) which generates luminance signals from digital R, G, and B signals, a contour extracting circuit (38) which extracts contour components from the generated Y-signal, a coefficient multiplying circuit (42) which outputs contour components for R, G, and B by multiplying the extracted contour components by coefficients Kr, Kg, and Kb, addition circuits (34r, 34g, and 34b), and a contour emphasis enable circuit (39) which controls the period for which the contour components extracted by the extracting circuit (38) are supplied. Therefore, the contour emphasizing circuit prevents process errors in the peripheral portion of the screen of a display.
摘要翻译：一种具有从数字R，G和B信号产生亮度信号的Y信号发生电路（36）的轮廓强调电路，从生成的Y信号中提取轮廓分量的轮廓提取电路（38），系数乘法电路（42），其通过将提取的轮廓分量乘以系数Kr，Kg和Kb，加法电路（34r，34g和34b）和轮廓强调使能电路（39）来输出R，G和B的轮廓分量，其控制由提取电路（38）提取的轮廓分量的周期。因此，轮廓强调电路防止显示器的屏幕的周边部分的处理错误。

3. 发明申请

WO1998053439A1 OPTICAL FILTER FOR DISPLAY PANEL 审中-公开
标题翻译：显示面板用光滤波器
公开(公告)号：WO1998053439A1
公开(公告)日：1998-11-26
申请号：PCT/JP1997003533
申请日：1997-10-02
申请人： FUJITSU GENERAL LIMITED , SATO, Hiroki
发明人： FUJITSU GENERAL LIMITED
IPC分类号： G09F09/00
CPC分类号： G02B1/10 , G02B1/11 , G02B1/116 , G02B5/282 , H01J29/868 , H01J29/898 , H01J2211/446 , H05K9/0096
摘要： An optical filter comprising a filter substrate (11) and a transparent conductive film (12) for cutting off electromagnetic waves and infrared rays (for example, a transparent conductive film sputter film), provided on the filter substrate (11) by alternately forming silver thin films and zinc oxide thin films into a multilayer structure. The transmissivity of image light outputted from a PDP (1) is a predetermined value (e.g. 60 %) or more and the surface resistance of the transparent conductive film (12) is 3 OMEGA /cm or less. In this way, the cutoff quantity (damping) of electromagnetic waves of a frequency of 30 to 130 MHz leaking from the PDP (1) is a predetermined value (e.g. 10 dB) or more, and the transmissivity of infrared rays of a wavelength of 800 to 1,000 nm radiated from the PDP is predetermined value (e.g. 10 %) or less. Accordingly, the leakage level of electromagnetic waves leaking from the PDP (1) is below a restricted value, and interference with the operation of remote controllers, optical communication equipment, etc., disposed nearby is prevented by cutting off infrared rays radiated from the PDP (1). When warp of the filter substrate (11) (when it is a synthetic resin substrate, for example) due to heat generated by the discharge of the PDP (1) is a problem, the filter substrate (11) is made of glass (e.g. reinforced glass substrate) to prevent degradation of display quality due to the warp of the optical filter. When corrosion of the transparent conductive film (12) (particularly, a silver thin film) due to the water vapor in the open air is a problem, this corrosion can be prevented by covering the exposed surface of the transparent conductor film (12) with a moisture-proofing film. An AR film (13) is used to prevent reflection of external light so as to prevent the drop of contrast, and an AN film (14) is used to prevent the occurrence of Newton rings (bright and dark concentric circles).
摘要翻译：一种滤光器，包括滤光器基板（11）和用于切断电磁波和红外线的透明导电膜（12）（例如，透明导电膜溅射膜），所述透明导电膜（12）通过交替地形成银薄膜和氧化锌薄膜成多层结构。从PDP（1）输出的图像光的透射率为预定值（例如60％）以上，透明导电膜（12）的表面电阻为3Ω/ cm 2以下。以这种方式，从PDP（1）泄漏的频率为30〜130MHz的电磁波的截止量（阻尼）为预定值（例如10dB）以上，波长的红外线的透射率从PDP辐射的800〜1000nm是预定值（例如10％）以下。因此，从PDP（1）泄漏的电磁波的泄漏水平低于限制值，并且通过切断从PDP发射的红外线来防止设置在附近的遥控器，光通信设备等的操作的干扰（1）。当由于PDP（1）的放电而产生的热量时，当过滤器基板（11）（例如合成树脂基板为合成树脂基板）发生弯曲时，过滤基板11由玻璃（例如强化玻璃基板），以防止由于滤光器的翘曲引起的显示质量的劣化。当由于露天水蒸汽导致的透明导电膜（12）的腐蚀（特别是银薄膜）成为问题时，可以通过用透明导电膜（12）的露出表面覆盖来防止这种腐蚀防潮膜。使用AR膜（13）来防止外部光的反射，以防止对比度的下降，并且使用AN膜（14）来防止牛顿环（明暗的同心圆）的发生。

4. 发明申请

WO1998043409A1 CONTOUR EMPHASIZING CIRCUIT 审中-公开
标题翻译： CONTOUR EMPHISISR电路
公开(公告)号：WO1998043409A1
公开(公告)日：1998-10-01
申请号：PCT/JP1997000994
申请日：1997-03-25
申请人： FUJITSU GENERAL LIMITED , SUZUKI, Susumu , KURITA, Masanori
发明人： FUJITSU GENERAL LIMITED
IPC分类号： H04N05/208
CPC分类号： H04N5/208 , H04N9/646
摘要： A contour emphasizing circuit which has a Y-signal generator (36) which generates a luminance signal from digital R, G and B signals, a contour extracting circuit (38) which extracts the contour component from the generated Y signal, a factor multiplier (42) which multiplies the contour component by factors Kr, Kg and Kb and outputs contour components for R, G and B and contour adders (34r, 34g and 34b) which add the contour components for R, G and B to the R, G and B signals respectively and which emphasizes the contour for the digital R, G and B signals.
摘要翻译：一种轮廓强调电路，具有从数字R，G和B信号产生亮度信号的Y信号发生器（36），从生成的Y信号中提取轮廓分量的轮廓提取电路（38），因子乘数 42），其将轮廓分量乘以因子Kr，Kg和Kb，并输出R，G和B的轮廓分量和轮廓加法器（34r，34g和34b），其将R，G和B的轮廓分量添加到R，G 和B信号，并强调数字R，G和B信号的轮廓。

5. 发明申请

WO1998007272A1 PLL CIRCUIT FOR DIGITAL DISPLAY DEVICE 审中-公开
标题翻译：用于数字显示设备的PLL电路
公开(公告)号：WO1998007272A1
公开(公告)日：1998-02-19
申请号：PCT/JP1996003395
申请日：1996-11-20
申请人： FUJITSU GENERAL LIMITED , NISHIMURA, Eizo , KONDOU, Satoru , KURITA, Masanori
发明人： FUJITSU GENERAL LIMITED
IPC分类号： H04N05/12
CPC分类号： G09G5/008 , H03L7/0807 , H03L7/095 , H03L7/199 , H04N5/126 , H04N5/66
摘要： A PLL circuit is provided with a lock/unlock detecting circuit which detects the locked or unlocked state of the PLL circuit by comparing the phases of a horizontal synchronizing signal and a comparing signal with each other and an internal synchronizing signal generating circuit which outputs the comparing signal as an internal synchronizing signal when the locked state is detected or outputs the horizontal synchronizing signal as the internal synchronizing signal when the unlocked state is detected. Another mode of a PLL circuit is provided with a skew detecting circuit which resets a frequency dividing circuit upon detecting a skew which is deviated from a normal period in an external synchronizing signal, generates a dummy pulse upon detecting that no skew occurs in the external synchronizing signal in the normal period, and generates a reference signal in combination of the dummy pulse with the external synchronizing signal. When the skew detecting circuit detects a skew, the circuit also resets a phase comparator circuit. A digital display device having such a PLL circuit prevents distortion of the picture when the PLL circuit is in an unlocked state or a skew occurs.
摘要翻译： PLL电路具有锁定/解锁检测电路，其通过将水平同步信号和比较信号的相位进行比较来检测PLL电路的锁定或解锁状态，以及内部同步信号发生电路，其输出比较当检测到锁定状态时，将其作为内部同步信号，或者当检测到解锁状态时输出水平同步信号作为内部同步信号。 PLL电路的另一模式设置有偏斜检测电路，其在检测到在外部同步信号中与正常周期偏离的偏斜时复位分频电路，在检测到外部同步中不发生偏斜时产生虚拟脉冲在正常周期中产生信号，并且产生与虚拟脉冲和外部同步信号组合的参考信号。当偏斜检测电路检测到偏斜时，电路还复位相位比较器电路。具有这种PLL电路的数字显示装置防止当PLL电路处于解锁状态或发生偏斜时图像的失真。

6. 发明申请

WO1998043410A1 CONTOUR EMPHASIZING CIRCUIT 审中-公开
标题翻译： CONTOUR EMPHISISING CIRCUIT
公开(公告)号：WO1998043410A1
公开(公告)日：1998-10-01
申请号：PCT/JP1997000995
申请日：1997-03-25
申请人： FUJITSU GENERAL LIMITED , SUZUKI, Susumu , KURITA, Masanori
发明人： FUJITSU GENERAL LIMITED
IPC分类号： H04N05/208
CPC分类号： H04N9/646 , H04N5/142
摘要： A contour emphasizing circuit which has a first Y-signal generator (35) which generates a luminance signal from digital R, G, and B signals, line memories (31r, 31g and 31b) which delay the R, G and B signals by one line respectively, a second Y-signal generator (37) which generates a luminance signal from the outputs of the line memories, a contour extracting circuit (39) which extracts the vertical contour component and the horizontal contour component, a factor multiplier (42) which multiplies those contour components by factors Kr, Kg and Kb and outputs contour components for R, G and B and contour adders (34r, 34g and 34b) which add the contour components for R, G and B to the R, G and B signals respectively.
摘要翻译：一种轮廓强调电路，具有从数字R，G和B信号产生亮度信号的第一Y信号发生器（35），将R，G和B信号延迟一个的行存储器（31r，31g和31b）分别产生来自行存储器的输出的亮度信号的第二Y信号发生器（37），提取垂直轮廓分量和水平轮廓分量的轮廓提取电路（39），因子乘法器（42）它们将这些轮廓分量乘以因子Kr，Kg和Kb，并输出R，G和B的轮廓分量，以及将R，G和B的轮廓分量添加到R，G和B的轮廓加法器（34r，34g和34b）信号。

7. 发明申请

WO1997034313A1 FILTER FOR PREVENTING LEAKAGE OF ELECTROMAGNETIC WAVE 审中-公开
标题翻译：用于防止电磁波泄漏的过滤器
公开(公告)号：WO1997034313A1
公开(公告)日：1997-09-18
申请号：PCT/JP1996003123
申请日：1996-10-25
申请人： FUJITSU GENERAL LIMITED , GOTOH, Yukio , SATO, Hiroki
发明人： FUJITSU GENERAL LIMITED
IPC分类号： H01J11/02
CPC分类号： H01J11/10 , H01J29/868 , H01J2211/446 , H04N5/72
摘要： A filter (2A, 2C) which prevents the leakage of electromagnetic waves from a PDP (1), and is provided with a filter base (11) in front of the PDP (1) and a grounded conductive mesh (12) which transmits light on the base (11) on the PDP (1) side. A light scattering layer (13) is bonded to the mesh (12) with a conductive adhesive (14) which transmits light, and the spaces of the lattice (where the base (1) exists) of the mesh (12) are filled with the adhesive (14) so that, when electric charge is induced in the mesh (12) by a pulse voltage applied to the PDP (1) for write/erase, the voltage across the lattice of the mesh (12) is made nearly equal to the potential of the mesh (12) so as not to cause electric discharge and generate noise. Alternatively, a transparent antistatic layer (22) is provided between the PDP (1) and the mesh (12) so as not to generate noise by lowering the pulse voltage applied to the PDP (1) for write/erase to such a low value that no electric discharge occurs when electric charges are induced in the mesh (12) by the pulse voltage.
摘要翻译：一种防止来自PDP（1）的电磁波泄漏的滤波器（2A，2C），并且在PDP（1）的前面设置有过滤器基座（11），以及透光的接地导电网在PDP（1）侧的基座（11）上。光散射层（13）用导电粘合剂（14）粘合到网（12）上，导电粘合剂（14）透射光，网格（12）的格子（其中存在基底（1））的空间被填充粘合剂（14），使得当通过施加到PDP（1）的写入/擦除的脉冲电压在网格（12）中感生电荷时，网格（12）的网格两边的电压几乎相等到网状物（12）的电位，以便不引起放电并产生噪声。或者，在PDP（1）和网格（12）之间设置透明抗静电层（22），以便通过将施加到用于写入/擦除的PDP（1）的脉冲电压降低到这样的低值来产生噪声当通过脉冲电压在网（12）中感应电荷时，不发生放电。

8. 发明申请

WO1996031865A1 METHOD OF DRIVING DISPLAY DEVICE AND ITS CIRCUIT 审中-公开
标题翻译：驱动显示设备及其电路的方法
公开(公告)号：WO1996031865A1
公开(公告)日：1996-10-10
申请号：PCT/JP1996000899
申请日：1996-04-02
申请人： FUJITSU GENERAL LIMITED , DENDA, Hayato , NAKAJIMA, Masamichi , KOSAKAI, Asao , ONODERA, Junichi , KOBAYASHI, Masayuki , MATSUNAGA, Seiji
发明人： FUJITSU GENERAL LIMITED
IPC分类号： G09G03/28
CPC分类号： G09G3/2037 , G09G3/2803 , G09G2320/0266
摘要： A sub-field driving method for a display device in which two lowest-intensity sub-frames adjacent to each other are selectively turned ON in accordance with the change of image brightness along the time base. When the level of an original signal changes from 7 to 8 or vice versa, for example, SF3, SF2, and SF1 are selected as the sub-frames corresponding to the level 8, and SF3, SF2 and SF1 are selected as the sub-frames corresponding to the level 7. Therefore, since ON or OFF at the levels 7 and 8 does not continue, a great change of brightness does not occur at this time and image quality is maintained. A circuit for applying the above method includes a correction circuit comprising a frame memory (24) for providing one-frame delay, a correction constant setting circuit (26) for outputting correction data and an addition circuit (28) for adding correction data to original image signals to remove distortion of a dynamic image (false profile).
摘要翻译：根据沿着时基的图像亮度的变化，用于显示装置的子场驱动方法，其中彼此相邻的两个最低强度子帧被选择性地接通。当原始信号的电平从7变为8或反之亦然时，例如，选择SF3，SF2和SF1作为与电平8相对应的子帧，并且选择SF3，SF2和SF1作为子电平，因此，由于级别7和8上的ON或OFF不能继续，所以此时不会发生大的亮度变化，并保持图像质量。用于应用上述方法的电路包括校正电路，该校正电路包括用于提供一帧延迟的帧存储器（24），用于输出校正数据的校正常数设置电路（26）和用于将校正数据添加到原始数据的加法电路（28）图像信号去除动态图像的失真（假轮廓）。

9. 发明专利

TWI693367B 空氣淨化機有权
简体标题：空气净化机
公开(公告)号：TWI693367B
公开(公告)日：2020-05-11
申请号：TW104118540
申请日：2015-06-08
申请人：日商富士通將軍股份有限公司 , FUJITSU GENERAL LIMITED
发明人：喜内一彰 , KINAI, KAZUAKI , 永吉健太郎 , NAGAYOSHI, KENTARO , 大野克弘 , ONO, KATSUHIRO , 村田浩貴 , MURATA, HIROKI , 中矢裕二 , NAKAYA, YUJI
IPC分类号： F24F3/16

10. 发明专利

TWI669468B 空氣淨化機有权
简体标题：空气净化机
公开(公告)号：TWI669468B
公开(公告)日：2019-08-21
申请号：TW104128380
申请日：2015-08-28
申请人：日商富士通將軍股份有限公司 , FUJITSU GENERAL LIMITED
发明人：村田浩貴 , MURATA, HIROKI , 喜内一彰 , KINAI, KAZUAKI , 永吉健太郎 , NAGAYOSHI, KENTARO , 大野克弘 , ONO, KATSUHIRO , 中矢裕二 , NAKAYA, YUJI , 松田浩明 , MATSUDA, HIROAKI
IPC分类号： F24F3/16

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