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    • 2. 发明授权
    • Multi-protocol I/O interconnect flow control
    • 多协议I / O互连流控制
    • US08856420B2
    • 2014-10-07
    • US13338230
    • 2011-12-27
    • Prashant R. ChandraKevin C. Kahn
    • Prashant R. ChandraKevin C. Kahn
    • G06F13/36G06F13/00
    • G06F13/4022G06F13/385H04L45/52H04L47/39H04L49/505H04L49/602
    • Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for managing flow across the multi-protocol I/O interconnect may include providing, by a first port of a switching fabric of a multi-protocol interconnect to a second port of the switching fabric, a first credit grant packet and a second credit grant packet as indications of unoccupied space of a buffer associated with a path between the first port and a second port, and simultaneously routing a first data packet of a first protocol and a second data packet of a second protocol, different from the first protocol, on the path from the second port to the first port based at least in part on receipt by the second port of the first and second credit grant packets. Other embodiments may be described and claimed.
    • 描述了跨计算机设备的多协议I / O互连的多协议隧道传输的方法,装置和系统的实施例。 用于管理跨多协议I / O互连的流的方法可以包括通过多协议互连的交换结构的第一端口向交换结构的第二端口提供第一授信分组和第二信用 将分组作为与第一端口和第二端口之间的路径相关联的缓冲器的未占用空间的指示,并且同时路由与第一协议不同的第一协议的第一数据分组和第二协议的第二数据分组, 至少部分地由第二端口接收到第一和第二信用授权分组在从第二端口到第一端口的路径上。 可以描述和要求保护其他实施例。
    • 7. 发明授权
    • Physical address size selection and page size selection in an address
translator
    • 地址翻译器中的物理地址大小选择和页面大小选择
    • US5802605A
    • 1998-09-01
    • US756184
    • 1996-11-25
    • Donald B. AlpertKenneth D. ShoemakerKevin C. KahnKonrad K. Lai
    • Donald B. AlpertKenneth D. ShoemakerKevin C. KahnKonrad K. Lai
    • G06F12/10
    • G06F12/1009G06F2212/652
    • An address translator and a method for translating a linear address into a physical address for memory management in a computer is described herein. Different memory sizes, and different page sizes can be selected. The address translator can translate from a standard 32-bit linear address for compatibility with previous 32-bit architectures, and can also translate to a physical memory size with a larger physical address than linear address; i.e., greater than 32 bits (e.g. 36 bits and up), with no increase in access time. The address translator translates a linear address that includes an offset and a plurality of fields used to select entries in a plurality of tables. The format of the linear address into fields is dependent upon the selected memory size and the selected page size. For a large memory size, the tables include a directory pointer table that includes a group of directory pointers, a plurality of page table directories each of which includes a group of page directory entries, and a plurality of page tables each of which includes a group of page table entries. The size of the entries in the tables is dependent upon the selected memory size. The contents of the tables are stored in memory, and furthermore the pointer table is stored in both main memory and in dedicated pointer table registers.
    • 这里描述了地址转换器和用于将线性地址翻译成用于计算机中的存储器管理的物理地址的方法。 可以选择不同的内存大小和不同的页面大小。 地址转换器可以从标准的32位线性地址转换,以兼容以前的32位体系结构,并且还可以转换为具有比线性地址更大的物理地址的物理内存大小; 即大于32位(例如36位及以上),而不增加访问时间。 地址转换器翻译包括用于选择多个表中的条目的偏移和多个字段的线性地址。 线性地址到字段的格式取决于所选的内存大小和所选的页面大小。 对于大的存储器大小,表包括目录指针表,其包括一组目录指针,多个页表目录,每个页表目录包括一组页目录条目,以及多个页表,每个页表包括一组 的页表条目。 表中条目的大小取决于所选的内存大小。 表的内容存储在存储器中,此外,指针表存储在主存储器和专用指针表寄存器中。
    • 8. 发明授权
    • Multi-protocol I/O interconnect architecture
    • 多协议I / O互连体系结构
    • US09252970B2
    • 2016-02-02
    • US13338222
    • 2011-12-27
    • Prashant ChandraKevin C. Kahn
    • Prashant ChandraKevin C. Kahn
    • H04L12/28H04L12/46
    • H04L12/4625
    • Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for configuring a multi-protocol I/O interconnect may include identifying a plurality of switches of a switching fabric of a multi-protocol I/O interconnect, and configuring a path from a port of a first switch of the plurality of switches to a port of a second switch of the plurality of switches. Packets of a first protocol and packets of a second protocol, different from the first protocol, may be simultaneously routed over the path. Other embodiments may be described and claimed.
    • 描述了跨计算机设备的多协议I / O互连的多协议隧道传输的方法,装置和系统的实施例。 用于配置多协议I / O互连的方法可以包括识别多协议I / O互连的交换结构的多个交换机,以及配置从多个交换机的第一交换机的端口到 所述多个开关的第二开关的端口。 不同于第一协议的第一协议的分组和第二协议的分组可以在路径上同时路由。 可以描述和要求保护其他实施例。