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    • 1. 发明授权
    • Phase equalization system for a digital-to-analog converter utilizing
separate digital and analog sections
    • 使用单独的数字和模拟部分的数模转换器的相位均衡系统
    • US5061925A
    • 1991-10-29
    • US571376
    • 1990-08-22
    • Navdeep S. SoochDonald A. KerthEric J. SwansonTetsurou Sugimoto
    • Navdeep S. SoochDonald A. KerthEric J. SwansonTetsurou Sugimoto
    • H03M1/66H03H17/00H03H17/02H03H17/06H03M3/02H03M7/00H03M7/32
    • H03M3/37H03M3/50H03M7/3028H03M7/3035H03M7/3037
    • A phase equalization system for a digital-to-analog converter (DAC) includes a digital portion (10) having an interpolation section (14) for receiving a digital input and increasing the sampling frequency thereof for input to a delta-sigma modulator (16). A summing junction (24) is disposed between the interpolation circuit (14) and the delta-sigma modudlator (16) to allow an offset voltage to be summed therewith. This provides for D.C. offset, this offset being controlled by a calibration control (40). The output of the digital section (10) is input in an analog section (12), which has a one-bit DAC 21) that is input to an analog filter (22) for converting and filtering the one-bit digital stream output by the delta-sigma modulator (16). The interpolation circuit (14) includes a three stage interpolation filter comprising a first stage (50), a second stage (52) and a third stage (54). The second stage (52) is comprised of a finite impulse response filter (FIR) that has a nonlinear phase response. The nonlinear phase response of the interpolation filter (52) compensates for the phase deviation of the analog filter (22) from a linear phase response. Therefore, the composite phase provided by the combination of the phase equalization in the digital section (10) and the phase nonlinearity in the analog section (12) will result in a linear overall phase relationship for the DAC.
    • 用于数模转换器(DAC)的相位均衡系统包括具有插值部分(14)的数字部分(10),用于接收数字输入并增加其采样频率以输入到Δ-Σ调制器(16 )。 在插值电路(14)和Δ-Σ调制器(16)之间设置加法结(24),以允许偏移电压与其相加。 这提供直流偏移,该偏移由校准控制(40)控制。 数字部分(10)的输出被输入到模拟部分(12)中,模拟部分(12)具有一个比特DAC21),该模拟部分(12)被输入到模拟滤波器(22),用于转换和滤波由 Δ-Σ调制器(16)。 内插电路(14)包括三级内插滤波器,包括第一级(50),第二级(52)和第三级(54)。 第二级(52)由具有非线性相位响应的有限脉冲响应滤波器(FIR)组成。 内插滤波器(52)的非线性相位响应补偿模拟滤波器(22)与线性相位响应的相位偏差。 因此,通过数字部分(10)中的相位均衡和模拟部分(12)中的相位非线性的组合提供的复合相位将导致DAC的线性整体相位关系。
    • 3. 发明申请
    • Information Processing Terminal
    • 信息处理终端
    • US20080059158A1
    • 2008-03-06
    • US11574899
    • 2005-09-09
    • Hideaki MatsuoTakaaki NishiTomoko ObamaYasuki YamakawaTetsurou Sugimoto
    • Hideaki MatsuoTakaaki NishiTomoko ObamaYasuki YamakawaTetsurou Sugimoto
    • G10L19/12
    • H04M1/72544H04M1/21H04M1/22H04M2250/60
    • The present invention is to provide an information processing terminal which can use another expression means to indicate undesirable emotions directly transmitted to a party by a method of directly expressing talking person's emotions in real time, so that the whole image of a calling status can be reviewed afterward and grasped. An information processing terminal 1 including: a voice signal output portion 102 for inputting a voice; an emotion estimation portion 201 for generating parameters of emotions from the inputted voice; and a notification portion 30, 40, 50 for giving notice of various kinds of information, wherein the information processing terminal 1 further includes an emotion specifying portion 203 for specifying an emotion expressed by a distinctive parameter of the generated parameters, and the notification portion 30, 40, 50 gives notice of the specified emotion.
    • 本发明提供一种信息处理终端,其可以使用另一表达手段来通过直接表达谈话者的情绪的方法来直接传送给一方的不良情绪,从而可以对呼叫状态的整个图像进行审查 以后抓住。 一种信息处理终端1,包括:用于输入语音的语音信号输出部分102; 用于从输入的语音生成情绪参数的情绪估计部分201; 以及用于通知各种信息的通知部分30,40,50,其中信息处理终端1还包括用于指定由所生成的参数的特征参数表达的情绪的情感指定部分203和通知部分30 ,40,50给出指定情感的通知。