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1. 发明授权

US08995498B2 Apparatus and method for two-stage linear/nonlinear interference cancellation 有权
标题翻译：两级线性/非线性干扰消除的装置和方法
公开(公告)号：US08995498B2
公开(公告)日：2015-03-31
申请号：US12906328
申请日：2010-10-18
申请人： Yingqun Yu , Farrokh Abrishamkar , Wenjun Li , Andrew K. Kan
发明人： Yingqun Yu , Farrokh Abrishamkar , Wenjun Li , Andrew K. Kan
IPC分类号： H04B1/00 , H04B1/7107 , H04B1/7105 , H04J11/00
CPC分类号： H04B1/7107 , H04B1/71052 , H04J11/0046 , H04J11/0056
摘要： An apparatus and method for a two-stage linear/nonlinear interference cancellation comprising processing a receive signal to produce a first descrambled signal; and processing the first descrambled signal to produce a detected signal. In one aspect, a first interference canceller module is used for processing the received signal and a second interference canceller module is used for processing the first descrambled signal. In one aspect, the first interference canceller is a linear interference canceller (IC) and the second interference canceller is a linear/nonlinear interference canceller (IC).
摘要翻译：一种用于两级线性/非线性干扰消除的装置和方法，包括处理接收信号以产生第一解扰信号; 以及处理第一解扰信号以产生检测信号。一方面，第一干扰消除器模块用于处理接收的信号，第二干扰消除器模块用于处理第一解扰信号。一方面，第一干扰消除器是线性干扰消除器（IC），第二干扰消除器是线性/非线性干扰消除器（IC）。

2. 发明授权

US08779510B2 Semiconductor power devices manufactured with self-aligned processes and more reliable electrical contacts 有权
标题翻译：采用自对准工艺制造的半导体功率器件和更可靠的电触点
公开(公告)号：US08779510B2
公开(公告)日：2014-07-15
申请号：US12802185
申请日：2010-06-01
申请人： Hamza Yilmaz , John Chen , Daniel Ng , Wenjun Li
发明人： Hamza Yilmaz , John Chen , Daniel Ng , Wenjun Li
IPC分类号： H01L29/66
CPC分类号： H01L29/7813 , H01L29/0619 , H01L29/0692 , H01L29/0696 , H01L29/407 , H01L29/4236 , H01L29/4238 , H01L29/456 , H01L29/47 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7808 , H01L29/7811 , H01L29/866 , H01L29/872 , H01L29/8725
摘要： This invention discloses semiconductor power device that includes a plurality of top electrical terminals disposed near a top surface of a semiconductor substrate. Each and every one of the top electrical terminals comprises a terminal contact layer formed as a silicide contact layer near the top surface of the semiconductor substrate. The trench gates of the semiconductor power device are opened from the top surface of the semiconductor substrate and each and every one of the trench gates comprises the silicide layer configured as a recessed silicide contact layer disposed on top of every on of the trench gates slightly below a top surface of the semiconductor substrate surround the trench gate.
摘要翻译：本发明公开了一种半导体功率器件，其包括设置在半导体衬底的顶表面附近的多个顶部电端子。顶部电气端子中的每一个包括在半导体衬底的顶表面附近形成为硅化物接触层的端子接触层。半导体功率器件的沟槽栅极从半导体衬底的顶表面打开，并且每个沟槽栅极包括被配置为硅化物接触层的硅化物层，硅化物层设置在略微低于半导体衬底的顶表面围绕沟槽栅极。

3. 发明申请

US20120205737A1 SHIELDED GATE TRENCH MOSFET DEVICE AND FABRICATION 有权
标题翻译： SHIELDED GATE TRENCH MOSFET器件和制造
公开(公告)号：US20120205737A1
公开(公告)日：2012-08-16
申请号：US13456406
申请日：2012-04-26
申请人： John Chen , Il Kwan Lee , Hong Chang , Wenjun Li , Anup Bhalla , Hamza Yilmaz
发明人： John Chen , Il Kwan Lee , Hong Chang , Wenjun Li , Anup Bhalla , Hamza Yilmaz
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L29/407 , H01L29/41766 , H01L29/42368 , H01L29/42372 , H01L29/4238 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7811
摘要： A semiconductor device includes a substrate, an active gate trench in the substrate, the active gate trench has a first top gate electrode and a first bottom source electrode, and a gate runner trench comprising a second top gate electrode and a second bottom source electrode. The second top gate electrode is narrower than the second bottom source electrode.
摘要翻译：半导体器件包括衬底，衬底中的有源栅极沟槽，有源栅极沟槽具有第一顶部栅电极和第一底部源极电极以及包括第二顶部栅电极和第二底部源极电极的栅极流道沟槽。第二顶栅电极比第二底源电极窄。

4. 发明授权

US08193580B2 Shielded gate trench MOSFET device and fabrication 有权
标题翻译：屏蔽栅沟槽MOSFET器件和制造
公开(公告)号：US08193580B2
公开(公告)日：2012-06-05
申请号：US12583191
申请日：2009-08-14
申请人： John Chen , Il Kwan Lee , Hong Chang , Wenjun Li , Anup Bhalla , Hamza Yilmaz
发明人： John Chen , Il Kwan Lee , Hong Chang , Wenjun Li , Anup Bhalla , Hamza Yilmaz
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L29/407 , H01L29/41766 , H01L29/42368 , H01L29/42372 , H01L29/4238 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7811
摘要： A semiconductor device embodiment includes a substrate, an active gate trench in the substrate, and an asymmetric trench in the substrate. The asymmetric trench has a first trench wall and a second trench wall, the first trench wall is lined with oxide having a first thickness, and the second trench wall is lined with oxide having a second thickness that is different from the first thickness. Another semiconductor device embodiment includes a substrate, an active gate trench in the substrate; and a source polysilicon pickup trench in the substrate. The source polysilicon pickup trench includes a polysilicon electrode, and top surface of the polysilicon electrode is below a bottom of a body region. Another semiconductor device includes a substrate, an active gate trench in the substrate, the active gate trench has a first top gate electrode and a first bottom source electrode, and a gate runner trench comprising a second top gate electrode and a second bottom source electrode. The second top gate electrode is narrower than the second bottom source electrode.
摘要翻译：半导体器件实施例包括衬底，衬底中的有源栅极沟槽和衬底中的不对称沟槽。非对称沟槽具有第一沟槽壁和第二沟槽壁，第一沟槽壁衬有具有第一厚度的氧化物，并且第二沟槽壁衬有具有不同于第一厚度的第二厚度的氧化物。另一半导体器件实施例包括衬底，衬底中的有源栅极沟槽; 以及衬底中的源极多晶硅拾取沟槽。源多晶硅拾取沟槽包括多晶硅电极，并且多晶硅电极的顶表面在身体区域的底部之下。另一个半导体器件包括衬底，衬底中的有源栅极沟槽，有源栅极沟槽具有第一顶部栅电极和第一底部源极电极，以及包括第二顶部栅电极和第二底部源极电极的栅极流道沟槽。第二顶栅电极比第二底源电极窄。

5. 发明申请

US20110220990A1 SHIELDED GATE TRENCH MOS WITH IMPROVED SOURCE PICKUP LAYOUT 有权
标题翻译： SHIELDED GATE TRENCH MOS与改进的来源PICKUP布局
公开(公告)号：US20110220990A1
公开(公告)日：2011-09-15
申请号：US12722384
申请日：2010-03-11
申请人： Hong Chang , Yi Su , Wenjun Li , Limin Weng , Gary Chen , Jongoh Kim , John Chen
发明人： Hong Chang , Yi Su , Wenjun Li , Limin Weng , Gary Chen , Jongoh Kim , John Chen
IPC分类号： H01L29/78 , H01L21/336 , H01L21/28
CPC分类号： H01L29/7811 , H01L21/26586 , H01L21/283 , H01L27/088 , H01L29/1095 , H01L29/402 , H01L29/407 , H01L29/41741 , H01L29/4236 , H01L29/42368 , H01L29/42372 , H01L29/4238 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7813 , H01L29/7827
摘要： A method for fabricating a semiconductor device includes forming a plurality of trenches using a first mask. The trenches include source pickup trenches located in outside a termination area and between two adjacent active areas. First and second conductive regions separated by an intermediate dielectric region are formed using a second mask. A first electrical contact to the first conductive region and a second electrical contact to the second conductive region are formed using a third mask and forming a source metal region. Contacts to a gate metal region are formed using a fourth mask. A semiconductor device includes a source pickup contact located outside a termination region and outside an active region of the device.
摘要翻译：一种制造半导体器件的方法包括使用第一掩模形成多个沟槽。沟槽包括位于终端区域外部和两个相邻有效区域之间的源拾取沟槽。使用第二掩模形成由中间介电区分隔的第一和第二导电区域。使用第三掩模形成到第一导电区域的第一电接触和到第二导电区域的第二电接触，并形成源极金属区域。使用第四掩模形成与栅极金属区域的接触。半导体器件包括位于端子区域外部并位于器件的有源区域外部的源极拾取触点。

6. 发明申请

US20110039383A1 Shielded gate trench MOSFET device and fabrication 有权
标题翻译：屏蔽栅沟槽MOSFET器件和制造
公开(公告)号：US20110039383A1
公开(公告)日：2011-02-17
申请号：US12583192
申请日：2009-08-14
申请人： John Chen , Il Kwan Lee , Hong Chang , Wenjun Li , Anup Bhalla , Hamza Yilmaz
发明人： John Chen , Il Kwan Lee , Hong Chang , Wenjun Li , Anup Bhalla , Hamza Yilmaz
IPC分类号： H01L21/8234
CPC分类号： H01L29/7811 , H01L21/26586 , H01L29/1095 , H01L29/407 , H01L29/41741 , H01L29/41766 , H01L29/4236 , H01L29/42372 , H01L29/4238 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7813
摘要： A method for fabricating a semiconductor device includes forming a plurality of trenches, including applying a first mask, forming a first polysilicon region in at least some of the plurality of trenches, forming a inter-polysilicon dielectric region and a termination protection region, including applying a second mask, forming a second polysilicon region in the at least some of the plurality of trenches, forming a first electrical contact to the first polysilicon region and forming a second electrical contact to the second polysilicon region, including applying a third mask, disposing a metal layer, and forming a source metal region and a gate metal region, including applying a fourth mask.
摘要翻译：一种制造半导体器件的方法包括形成多个沟槽，包括施加第一掩模，在多个沟槽中的至少一些沟槽中形成第一多晶硅区域，形成多晶硅间介质区域和端接保护区域，包括施加第二掩模，在所述多个沟槽中的所述至少一些沟槽中形成第二多晶硅区域，形成到所述第一多晶硅区域的第一电接触并且形成到所述第二多晶硅区域的第二电接触，包括施加第三掩模，金属层，并且形成源极金属区域和栅极金属区域，包括施加第四掩模。

7. 发明申请

US20100278284A1 METHOD AND SYSTEM FOR SYMBOL DETECTION USING SUB-CONSTELLATIONS 失效
标题翻译：使用辅助信号进行符号检测的方法和系统
公开(公告)号：US20100278284A1
公开(公告)日：2010-11-04
申请号：US12435120
申请日：2009-05-04
申请人： Farrokh Abrishamkar , Wenjun Li , Yingqun Yu , Prashant Udupa Sripathi
发明人： Farrokh Abrishamkar , Wenjun Li , Yingqun Yu , Prashant Udupa Sripathi
IPC分类号： H04L25/08 , H04L27/06 , H03D1/24 , H04L27/22
CPC分类号： H04L25/03063 , H04B1/7107 , H04B2201/70703 , H04J11/0036 , H04J13/0044 , H04J13/0048 , H04J13/12 , H04L27/3488 , H04L27/38
摘要： Systems and methods for symbol detection using sub-constellations are provided. In one aspect of the disclosure, an apparatus is provided. The apparatus comprises a processing unit configured to process received chips into received symbols for a plurality of users, a first detection unit configured to detect first components of user symbols for the plurality of users based on the received symbols and a computation unit configured to compute a portion of the received symbols due to the first components of the user symbols. The apparatus further comprises a second detection unit configured to detect second components of the user symbols based on the received symbols with the computed portion removed and a combining unit configured to detect the user symbols by combining the first components of the user symbols with the respective second components of the user symbols.
摘要翻译：提供了使用子星座进行符号检测的系统和方法。在本公开的一个方面，提供一种装置。该装置包括：处理单元，被配置为将接收到的码片处理为多个用户的接收符号;第一检测单元，被配置为基于接收的符号检测多个用户的用户符号的第一分量;以及计算单元，由于用户符号的第一分量，接收到的符号的部分。所述装置还包括：第二检测单元，被配置为基于所接收的符号检测所述用户符号的第二成分，所述接收到的符号被删除;以及组合单元，被配置为通过将所述用户符号的第一分量与相应的第二用户符号的组成部分。

8. 发明申请

US20100278216A1 METHOD AND SYSTEM FOR INTER-CELL INTERFERENCE CANCELLATION 失效
标题翻译：用于细胞间干扰消除的方法和系统
公开(公告)号：US20100278216A1
公开(公告)日：2010-11-04
申请号：US12435085
申请日：2009-05-04
申请人： Farrokh Abrishamkar , Yingqun Yu , Wenjun Li
发明人： Farrokh Abrishamkar , Yingqun Yu , Wenjun Li
IPC分类号： H04B1/707 , H04B15/00
CPC分类号： H04B1/7107
摘要： Systems and methods for inter-cell interference cancellation are provided. In one aspect of the disclosure, an apparatus is provided. The apparatus comprises a cell computation unit configured to compute receive chips for a first interfering cell and a subtraction unit configured to remove the computed receive chips for the first interfering cell from received chips at a receiver. The apparatus further comprises a processing unit configured to process the received chips with the computed receive chips for the first interfering cell removed into received symbols and a detection unit configured to detect user symbols for a target cell from the received symbols.
摘要翻译：提供了小区间干扰消除的系统和方法。在本公开的一个方面，提供一种装置。所述装置包括：单元计算单元，被配置为计算第一干扰小区的接收码片;以及减法单元，被配置为从所述接收机的接收码片中去除所计算出的所述第一干扰小区的接收码片。所述装置还包括：处理单元，被配置为处理所接收的码片，所计算出的接收码片用于将所述第一干扰信元移除到接收符号中;以及检测单元，被配置为从所接收的符号检测目标小区的用户符号。

9. 发明授权

US07322801B2 Compact linear air pump and valve package 有权
标题翻译：紧凑型线性气泵和阀门包装
公开(公告)号：US07322801B2
公开(公告)日：2008-01-29
申请号：US10649843
申请日：2003-08-26
申请人： Wenjun Li , Steven D. Heidenreich , Randall M. Blindauer
发明人： Wenjun Li , Steven D. Heidenreich , Randall M. Blindauer
IPC分类号： F04B35/04 , F04B39/06 , F04B39/08
CPC分类号： A47C27/082 , A47C27/10 , F04B35/045 , F04B45/047
摘要： A compact air pump and valve package includes pump and valve assemblies integral with a pressure housing defining inlet ports and a plurality of fittings for connecting air lines to an interior of the pressure housing. The linear diaphragm pump assembly has a permanent magnetic shuttle mounting two diaphragms reciprocated by an electromagnet. The valve assembly has a plurality of solenoid valves disposed within the pressure housing, each solenoid valve being operable to control flow into or out of the pressure housing through an associated one of the plurality of fittings. Thus, no tubes or hoses are required to transfer air from the pump assembly to the valves. The housing has special mounts to isolate vibration arising from movement of the shuttle.
摘要翻译：紧凑的空气泵和阀包装包括泵和阀组件，其与限定入口的压力壳体和用于将空气管线连接到压力壳体的内部的多个配件成一体。线性隔膜泵组件具有安装由电磁体往复运动的两个隔膜的永久磁性梭。阀组件具有设置在压力壳体内的多个电磁阀，每个电磁阀可操作以通过多个配件中的相关联的一个来控制流入或流出压力壳体的流体。因此，不需要管或软管将空气从泵组件传送到阀。外壳具有特殊的安装座，用于隔离由梭子移动引起的振动。

10. 发明申请

US20050047923A1 Compact linear air pump and valve package 有权
标题翻译：紧凑型线性气泵和阀门包装
公开(公告)号：US20050047923A1
公开(公告)日：2005-03-03
申请号：US10649843
申请日：2003-08-26
申请人： Wenjun Li , Steven Heidenreich , Randall Blindauer
发明人： Wenjun Li , Steven Heidenreich , Randall Blindauer
IPC分类号： A47C27/10 , F04B35/04 , F04B45/047 , F04B49/06
CPC分类号： A47C27/082 , A47C27/10 , F04B35/045 , F04B45/047
摘要： A compact air pump and valve package includes pump and valve assemblies integral with a pressure housing defining inlet ports and a plurality of fittings for connecting air lines to an interior of the pressure housing. The linear diaphragm pump assembly has a permanent magnetic shuttle mounting two diaphragms reciprocated by an electromagnet. The valve assembly has a plurality of solenoid valves disposed within the pressure housing, each solenoid valve being operable to control flow into or out of the pressure housing through an associated one of the plurality of fittings. Thus, no tubes or hoses are required to transfer air from the pump assembly to the valves. The housing has special mounts to isolate vibration arising from movement of the shuttle.
摘要翻译：紧凑的空气泵和阀包装包括泵和阀组件，其与限定入口的压力壳体和用于将空气管线连接到压力壳体的内部的多个配件成一体。线性隔膜泵组件具有安装由电磁体往复运动的两个隔膜的永久磁性梭。阀组件具有设置在压力壳体内的多个电磁阀，每个电磁阀可操作以通过多个配件中的相关联的一个来控制流入或流出压力壳体的流体。因此，不需要管或软管将空气从泵组件传送到阀。外壳具有特殊的安装座，用于隔离由梭子移动引起的振动。

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