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1. 发明申请

WO2005101778A1 APPARATUS FOR AND METHOD OF CONTROLLING A SAMPLING FREQUENCY OF A SAMPLING DEVICE 审中-公开
标题翻译：用于控制采样装置的采样频率的装置和方法
公开(公告)号：WO2005101778A1
公开(公告)日：2005-10-27
申请号：PCT/US2005/012056
申请日：2005-04-08
申请人： MICRONAS SEMICONDUCTORS, INC. , XIAOJUN, Yang , CITTA, Richard, W. , LOPRESTO, Scott, M.
发明人： XIAOJUN, Yang , CITTA, Richard, W. , LOPRESTO, Scott, M.
IPC分类号： H04L27/06
CPC分类号： H04L25/03057 , H04L7/0062 , H04L25/0212 , H04L2025/0342 , H04L2025/0349
摘要： A method of controlling sampling frequency of a sampling device (40), where the sampling device (40) generates samples (62) in response to the receipt of a signal (20) resulting from a transmission of a series of symbols through a channel, the method including the steps of estimating (46) a channel impulse response of the channel from the samples, calculating a characteristic of the channel impulse response estimate, and determining (52) the sampling frequency in accordance with the characteristic.
摘要翻译：一种控制采样设备（40）的采样频率的方法，其中采样设备（40）响应于通过信道传输一系列符号而产生的信号（20）而产生采样（62）该方法包括以下步骤：从样本估计（46）信道的信道脉冲响应，计算信道脉冲响应估计的特性，以及根据特性确定（52）采样频率。

2. 发明申请

WO2005101656A1 APPARATUS FOR AND METHOD OF CONTROLLING THE OPERATION OF AN EQUALIZER 审中-公开
标题翻译：控制均衡器操作的装置和方法
公开(公告)号：WO2005101656A1
公开(公告)日：2005-10-27
申请号：PCT/US2005/012125
申请日：2005-04-08
申请人： MICRONAS SEMICONDUCTORS, INC. , XIAOJUN, Yang , KRISHNAMURTHY, Gopalan , XIA, Jingsong
发明人： XIAOJUN, Yang , KRISHNAMURTHY, Gopalan , XIA, Jingsong
IPC分类号： H03H7/40
CPC分类号： H04L25/03057 , H04L7/0062 , H04L25/0212 , H04L2025/0342 , H04L2025/0349
摘要： A method of controlling the operation of an equalizer (210, 216), wherein the equalizer is adapted to receive a transmitted signal (76, 78) comprising at least one predetermined sequence of symbols, includes the step of developing a set of samples from a received signal. At least one plurality of samples is identified, wherein the at least one plurality of samples corresponds to the at least one predetermined sequence of symbols. The equalizer is then operated in a selected one of three modes. A first mode is selected if the at least one plurality of samples is identified, wherein the first mode includes the step of developing a signal-to-noise ratio (SNR) (100). A second mode is selected if the at least one plurality of samples is identified and the SNR is greater than a first predetermined threshold. A third mode is selected if the at least one plurality of samples is identified and the SNR is greater than a second predetermined threshold.
摘要翻译：一种控制均衡器（210,216）的操作的方法，其中所述均衡器适于接收包括至少一个预定符号序列的发送信号（76,78），所述方法包括步骤从接收信号开发一组样本。识别至少一个多个样本，其中至少一个多个样本对应于至少一个预定符号序列。然后均衡器以三种模式中的选定模式运行。如果至少一个多个采样被识别，则选择第一模式，其中第一模式包括产生信噪比（SNR）（100）的步骤。如果至少一个多个采样被识别并且SNR大于第一预定阈值，则选择第二模式。如果至少一个多个采样被识别并且SNR大于第二预定阈值，则选择第三模式。

3. 发明申请

WO2012089724A1 METHOD FOR IMPROVING PLANT QUALITY 审中-公开
标题翻译：改善植物品质的方法
公开(公告)号：WO2012089724A1
公开(公告)日：2012-07-05
申请号：PCT/EP2011/074075
申请日：2011-12-27
申请人： BAYER CROPSCIENCE AG , DIAS, Lino, Miguel , VAUPEL, Martin , OSHIMA, Akihisa , XIAOJUN, Yang , VILA MAIOR, Joao, Eduardo
发明人： DIAS, Lino, Miguel , VAUPEL, Martin , OSHIMA, Akihisa , XIAOJUN, Yang , VILA MAIOR, Joao, Eduardo
IPC分类号： C05D9/02 , C05G3/02 , A01N47/14
CPC分类号： C05D9/02 , A01N47/14 , C05G3/02
摘要： The present invention relates to a method for improving plant quality, which method comprises treating the crop plant and/or the locus where the crop plant is growing or is intended to grow and/or the plant propagules with a plant quality improving amount of a micronutrient containing active ingredient.
摘要翻译：本发明涉及一种提高植物品质的方法，该方法包括处理作物植物和/或作物植物正在生长或预期生长的场所和/或植物繁殖体，其中植物质量提高量的微量营养素含有活性成分。

4. 发明申请

WO2005101656B1 APPARATUS FOR AND METHOD OF CONTROLLING THE OPERATION OF AN EQUALIZER 审中-公开
标题翻译：控制均衡器操作的装置和方法
公开(公告)号：WO2005101656B1
公开(公告)日：2005-12-08
申请号：PCT/US2005012125
申请日：2005-04-08
申请人： MICRONAS SEMICONDUCTORS INC , XIAOJUN YANG , KRISHNAMURTHY GOPALAN , XIA JINGSONG
发明人： XIAOJUN YANG , KRISHNAMURTHY GOPALAN , XIA JINGSONG
IPC分类号： H03D1/06 , H03H7/30 , H03H7/40 , H03K5/159 , H04L25/02 , H04L25/03 , H04L27/06 , H04L27/10 , H04L27/22 , H04N7/12
CPC分类号： H04L25/03057 , H04L7/0062 , H04L25/0212 , H04L2025/0342 , H04L2025/0349
摘要： A method of controlling the operation of an equalizer (210, 216), wherein the equalizer is adapted to receive a transmitted signal (76, 78) comprising at least one predetermined sequence of symbols, includes the step of developing a set of samples from a received signal. At least one plurality of samples is identified, wherein the at least one plurality of samples corresponds to the at least one predetermined sequence of symbols. The equalizer is then operated in a selected one of three modes. A first mode is selected if the at least one plurality of samples is identified, wherein the first mode includes the step of developing a signal-to-noise ratio (SNR) (100). A second mode is selected if the at least one plurality of samples is identified and the SNR is greater than a first predetermined threshold. A third mode is selected if the at least one plurality of samples is identified and the SNR is greater than a second predetermined threshold.
摘要翻译：一种控制均衡器（210,216）的操作的方法，其中所述均衡器适于接收包括至少一个预定符号序列的发射信号（76,78），包括从一个接收信号。识别至少一个多个样本，其中所述至少一个多个样本对应于所述至少一个预定符号序列。然后，均衡器以三种模式中的一种选择操作。如果识别出至少一个多个样本，则选择第一模式，其中第一模式包括开发信噪比（SNR）（100）的步骤。如果识别出至少一个多个样本并且SNR大于第一预定阈值，则选择第二模式。如果识别出至少一个多个样本并且SNR大于第二预定阈值，则选择第三模式。

5. 外观设计

USD959611S1 Faucet 有权
公开(公告)号：USD959611S1
公开(公告)日：2022-08-02
申请号：US29785254
申请日：2021-05-25
申请人： Xiaojun Yang
设计人： Xiaojun Yang

6. 发明授权

US09846625B2 Method and device for debugging a MIPS-structure CPU with southbridge and northbridge chipsets 有权
公开(公告)号：US09846625B2
公开(公告)日：2017-12-19
申请号：US13806784
申请日：2011-05-20
申请人： Zongyou Shao , Xinchun Liu , Xiaojun Yang , Chenming Zheng , Ying Wang , Hui Wang , Shengjie Liu , Zhibin Hao , Faqing Liang , Wenhao Yao
发明人： Zongyou Shao , Xinchun Liu , Xiaojun Yang , Chenming Zheng , Ying Wang , Hui Wang , Shengjie Liu , Zhibin Hao , Faqing Liang , Wenhao Yao
IPC分类号： G06F11/22 , G06F11/36
CPC分类号： G06F11/2236 , G06F11/221 , G06F11/3648
摘要： The present invention discloses a method and a device to debug the Loongson CPU (a MIPS-structure CPU) and bridge chips. The device, including HT bus interfaces and the corresponding switches, connects the Loongson CPU and bridge chips through HT bus interfaces. Southbridge chips and northbridge chips with HT buses are selected in the following order: introducing the pins on the Loongson CPU and bridge chips into the debug device; debugging the pins on the Loongson CPU to identify whether there are any bugs with the pins; connecting the pins from the CPU and bridge chips to debug them. If the HT bus of the Loongson CPU fails to accord with the standard protocol, the problematic signal can be identified and further adjusted to improve the CPU. With the help of FPGA, multiple HT bus interfaces can be simulated. As a result, multiple chipsets can be linked to the Loongson CPU, which may be debugged simultaneously.

7. 发明申请

US20140157051A1 METHOD AND DEVICE FOR DEBUGGING A MIPS-STRUCTURE CPU WITH SOUTHBRIDGE AND NORTHBRIDGE CHIPSETS 有权
标题翻译：用于调整MIPS结构CPU的方法和装置，其中包括南瓜和北极巧克力
公开(公告)号：US20140157051A1
公开(公告)日：2014-06-05
申请号：US13806784
申请日：2011-05-20
申请人： Zongyou Shao , Xinchun Liu , Xiaojun Yang , Chenming Zheng , Ying Wang , Hui Wang , Zhibin Hao , Faqing Liang , Wenhao Yao
发明人： Zongyou Shao , Xinchun Liu , Xiaojun Yang , Chenming Zheng , Ying Wang , Hui Wang , Zhibin Hao , Faqing Liang , Wenhao Yao
IPC分类号： G06F11/22
CPC分类号： G06F11/2236 , G06F11/221 , G06F11/3648
摘要： The present invention discloses a method and a device to debug the Loongson CPU (a MIPS-structure CPU) and bridge chips. The device, including HT bus interfaces and the corresponding switches, connects the Loongson CPU and bridge chips through HT bus interfaces. Southbridge chips and northbridge chips with HT buses are selected in the following order: introducing the pins on the Loongson CPU and bridge chips into the debug device; debugging the pins on the Loongson CPU to identify whether there are any bugs with the pins; connecting the pins from the CPU and bridge chips to debug them. If the HT bus of the Loongson CPU fails to accord with the standard protocol, the problematic signal can be identified and further adjusted to improve the CPU. With the help of FPGA, multiple HT bus interfaces can be simulated. As a result, multiple chipsets can be linked to the Loongson CPU, which may be debugged simultaneously.
摘要翻译：本发明公开了一种用于调试龙芯CPU（MIPS结构CPU）和桥芯片的方法和装置。该器件包括HT总线接口和相应的交换机，通过HT总线接口连接龙芯CPU和桥芯片。南桥芯片和HT总线的北桥芯片按以下顺序选择：将龙芯CPU引脚和桥芯片引入调试设备; 调试龙芯CPU上的引脚，以确定引脚是否有任何错误; 连接CPU和桥接芯片的引脚进行调试。如果龙芯CPU的HT总线不符合标准协议，则可以识别并进一步调整有问题的信号以改善CPU。借助FPGA，可以模拟多个HT总线接口。因此，多个芯片组可以连接到可以同时调试的龙芯CPU。

8. 发明申请

US20120005393A1 ELECTRICAL AND ELECTRONIC SYSTEM HAVING AN ELECTRICAL CENTER FOR A VEHICLE 有权
标题翻译：具有用于车辆的电气中心的电气和电子系统
公开(公告)号：US20120005393A1
公开(公告)日：2012-01-05
申请号：US13175003
申请日：2011-07-01
申请人： HAWKING HU , XIAOJUN YANG , JUNJIE XU
发明人： HAWKING HU , XIAOJUN YANG , JUNJIE XU
IPC分类号： G06F13/20
CPC分类号： G06F13/385 , H04L12/40006 , H04L2012/40215 , H04L2012/40234 , H04L2012/40273
摘要： An electrical and electronic system having a control unit connected to a remotely located electrical center by way of a data bus. The electrical center includes a bus interface unit and a main printed circuit board having a plurality of control devices such as relays, which selectively activate vehicle electrical circuits based on instructions from the control unit. The bus interface unit is that of a daughter board configured to be plugged into the main board of the electrical center, such as a Local Interconnect Network (LIN) interface board, and the data bus may be a LIN bus.
摘要翻译：一种具有通过数据总线连接到远程位置的电气中心的控制单元的电气和电子系统。电气中心包括总线接口单元和具有多个控制装置（例如继电器）的主印刷电路板，其基于来自控制单元的指令选择性地激活车辆电路。总线接口单元是被配置为插入电气中心主板的子板的总线接口单元，例如本地互连网络（LIN）接口板，并且数据总线可以是LIN总线。

9. 发明申请

US20080107168A1 Advanced Digital Receiver 有权
标题翻译：高级数字接收机
公开(公告)号：US20080107168A1
公开(公告)日：2008-05-08
申请号：US11547816
申请日：2005-04-08
申请人： Jingsong Xia , Shidong Chen , Richard W. Citta , Gopalan Krishnamurthy , Scott M. Lopresto , David A. Willming , Xiaojun Yang , Jilian Zhu
发明人： Jingsong Xia , Shidong Chen , Richard W. Citta , Gopalan Krishnamurthy , Scott M. Lopresto , David A. Willming , Xiaojun Yang , Jilian Zhu
IPC分类号： H04L27/01
CPC分类号： H04L25/03057 , H04L1/006 , H04L7/0062 , H04L7/042 , H04L25/0212
摘要： A digital receiver for processing a signal received from a channel includes a digital demodulator and an equalizer coupled to the digital demodulator. The equalizer includes a feedforward filter and a decision feedback equalizer (DFE), wherein the feedforward filter includes a plurality of feedforward filter taps. Coefficients are associated with the plurality of feedforward filter taps and the values of all of the coefficients associated with the plurality of feedforward filter taps are dynamically determined.
摘要翻译：用于处理从信道接收的信号的数字接收机包括耦合到数字解调器的数字解调器和均衡器。均衡器包括前馈滤波器和判决反馈均衡器（DFE），其中前馈滤波器包括多个前馈滤波器抽头。系数与多个前馈滤波器抽头相关联，并且动态地确定与多个前馈滤波器抽头相关联的所有系数的值。

10. 发明授权

US09527849B2 Salt and polymorph of pyrazolopyrimidinone compound, and pharmaceutical composition containing the same, preparation method and use thereof 有权
标题翻译：吡唑并嘧啶酮化合物的盐和多晶型物，以及含有它们的药物组合物，其制备方法和用途
公开(公告)号：US09527849B2
公开(公告)日：2016-12-27
申请号：US14238790
申请日：2012-08-14
申请人： Jianfeng Li , Guanghui Tian , Zhen Wang , Jin Suo , Xiangrui Jiang , Zheng Liu , Xiaojun Yang , Zhu Xie , Xianguo Zhao , Weiliang Zhu , Hualiang Jiang , Jingshan Shen
发明人： Jianfeng Li , Guanghui Tian , Zhen Wang , Jin Suo , Xiangrui Jiang , Zheng Liu , Xiaojun Yang , Zhu Xie , Xianguo Zhao , Weiliang Zhu , Hualiang Jiang , Jingshan Shen
IPC分类号： C07D487/04 , A61K31/519 , A61P15/10 , A61P13/10 , A61P9/10 , A61P9/04 , A61P13/12 , A61P11/06 , A61P29/00 , A61P27/06 , A61P9/12
CPC分类号： C07D487/04 , C07B2200/13
摘要： The present invention relates to new salts of pyrazolopyrimidinone represented by formula (I), and pharmaceutically acceptable polymorph, solvate, hydrate, dehydrate, co-crystallization, anhydrous, or amorphous form thereof, the pharmaceutical compositions, and a pharmaceutical unit dosage form containing the same, wherein x represents organic or inorganic acids, preferable maleic acid, succinic acid, methanesulfonic acid, hydrochloric acid, etc. The invention further relates to co-crystals or complexes of compounds of pyrazolopyrimidinone and pharmaceutical compositions containing the same. The present invention also relates to a process for the preparation, use thereof and pharmaceutical preparation containing the salts or crystalline forms.
摘要翻译：本发明涉及由式（I）表示的吡唑并嘧啶酮的新盐及其药学上可接受的多晶型物，溶剂化物，水合物，脱水，共结晶，无水或无定形形式，药物组合物和含有相同的，其中x表示有机或无机酸，优选的马来酸，琥珀酸，甲磺酸，盐酸等。本发明还涉及吡唑并嘧啶酮化合物的共晶或络合物和含有它们的药物组合物。本发明还涉及其制备方法，使用方法和含有盐或结晶形式的药物制剂。

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