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1. 发明申请

US20120250669A1 OPEN WIRELESS ARCHITECTURE (OWA) MOBILE CLOUD INFRASTRUCTURE AND METHOD 审中-公开
标题翻译：开放无线架构（OWA）移动云基础设施和方法
公开(公告)号：US20120250669A1
公开(公告)日：2012-10-04
申请号：US13313766
申请日：2011-12-07
申请人： Dexi LU , Wei LU , Jianhong HU , Michael LU
发明人： Dexi LU , Wei LU , Jianhong HU , Michael LU
IPC分类号： H04W56/00 , H04W84/12
CPC分类号： H04W60/00 , H04W4/60 , H04W72/04 , H04W72/087 , H04W80/00 , H04W84/00 , H04W84/10 , H04W84/12 , H04W88/06
摘要： A future mobile terminal converging multiple wireless transmission technologies by utilizing a cost-effective and spectrum-efficient mobile cloud solution by introducing the Virtual Mobile Server (VMS) and Virtual Register and Call Switch (VR/CS) systems and methods based on the innovative open wireless architecture (OWA) technology platform.
摘要翻译：未来的移动终端通过引入基于创新开放的虚拟移动服务器（VMS）和虚拟注册和呼叫交换（VR / CS）系统和方法，通过利用具有成本效益和频谱效率的移动云解决方案来融合多种无线传输技术无线架构（OWA）技术平台。

2. 发明申请

US20160044508A1 METHOD FOR PROVIDING APPLICATION SERVICE 审中-公开
公开(公告)号：US20160044508A1
公开(公告)日：2016-02-11
申请号：US14886587
申请日：2015-10-19
申请人： Minsheng WANG , Wei LU , Xiaojun LIU , Wuqiang LIN
发明人： Minsheng WANG , Wei LU , Xiaojun LIU , Wuqiang LIN
IPC分类号： H04W12/04 , H04L29/06 , H04W12/06
CPC分类号： H04W12/04 , H04L9/0861 , H04L9/3231 , H04L63/0281 , H04L63/0428 , H04L63/061 , H04L63/0861 , H04L2209/80 , H04L2463/062 , H04W12/02 , H04W12/06 , H04W12/08 , H04W80/12
摘要： A method for providing application service is provided. The method discloses that a user is authenticated according to a received application service acquisition request from a user mobile phone, and when the user authentication is passed, the application service acquisition request is sent to an application server, so that the application server provides an application service to the user mobile phone according to the application service acquisition request. The application server does not need to authenticate the user mobile phone by performing an authentication operation on the user mobile phone through a wireless application protocol gateway, thus being capable of reducing the workload of the application server.

3. 发明申请

US20090250764A1 STRESSED DIELECTRIC LAYER WITH STABLE STRESS 有权
标题翻译：具有稳定应力的应力介电层
公开(公告)号：US20090250764A1
公开(公告)日：2009-10-08
申请号：US12062535
申请日：2008-04-04
申请人： Huang LIU , Jeff SHU , Luona GOH , Wei LU
发明人： Huang LIU , Jeff SHU , Luona GOH , Wei LU
IPC分类号： H01L29/06 , H01L21/762
CPC分类号： H01L29/78 , H01L21/76224 , H01L29/665 , H01L29/7843
摘要： An integrated circuit is provided having a substrate and a transistor in an active region of the substrate. The substrate also has an isolation region having a dielectric material. In one embodiment, a pre-metal dielectric layer is disposed over the substrate and the transistor. At least one of the isolation region or the pre-metal dielectric layer includes a O3 TEOS oxide having a stress retaining dopant. The O3 TEOS oxide induces a stress in a channel region of the transistor.
摘要翻译：提供了一种集成电路，其具有衬底和在衬底的有源区域中的晶体管。衬底还具有具有电介质材料的隔离区域。在一个实施例中，预先金属介电层设置在衬底和晶体管的上方。隔离区域或预金属介电层中的至少一个包括具有应力保持掺杂剂的O 3 TEOS氧化物。 O 3 TEOS氧化物在晶体管的沟道区域中引起应力。

4. 发明申请

US20170070885A1 Cloud Server 有权
标题翻译：云服务器
公开(公告)号：US20170070885A1
公开(公告)日：2017-03-09
申请号：US15355268
申请日：2016-11-18
申请人： Minsheng WANG , Wei LU , Dongxuan GAO , Xiaojun LIU
发明人： Minsheng WANG , Wei LU , Dongxuan GAO , Xiaojun LIU
IPC分类号： H04W12/06 , H04L29/08 , G06K9/62 , H04L29/06 , G06K9/00
CPC分类号： H04W12/06 , G06F21/32 , G06F21/40 , G06F21/44 , G06K9/00221 , G06K9/00228 , G06K9/00281 , G06K9/00288 , G06K9/00979 , G06K9/22 , G06K9/6201 , G06K9/6215 , H04L63/083 , H04L63/0861 , H04L63/10 , H04L67/10 , H04L67/42 , H04L2463/082
摘要： A method for authenticating the identity of a handset user in a cloud-computing environment is provided. The method includes: obtaining, a login account and a password from the user; judging whether the login account and the password are correct; if the login account or the password is incorrect, refusing the user to access an operating system of the handset; if the login account and the password are correct, sending the login account and the password to a cloud server, wherein the login account and the password correspond to a face sample image library of the user stored on the cloud server; acquiring an input face image of the user; sending the input face image to the cloud server; authenticating, by the cloud server, the identity of the user according to the login account, the password and the input face image.
摘要翻译：提供了一种用于在云计算环境中认证手机用户的身份的方法。该方法包括：从用户获取登录帐号和密码; 判断登录帐号和密码是否正确; 如果登录帐号或密码不正确，拒绝用户访问手机的操作系统; 如果登录帐户和密码正确，则将登录帐户和密码发送到云服务器，其中登录帐户和密码对应于存储在云服务器上的用户的面部样本图像库; 获取所述用户的输入面部图像; 将输入的面部图像发送到云服务器; 根据登录帐户，密码和输入的脸部图像，由云服务器认证用户的身份。

5. 发明申请

US20080042782A1 INTEGRATED NARROW BANDPASS FILTER ARRAY AND A METHOD FOR FABRICATION THEREOF 有权
标题翻译：一体化窄带滤波器阵列及其制作方法
公开(公告)号：US20080042782A1
公开(公告)日：2008-02-21
申请号：US11924640
申请日：2007-10-26
申请人： Shaowei WANG , Wei LU , Xiaoshuang CHEN , Ning LI , Bo ZHANG , Zhifeng LI , Pingping CHEN
发明人： Shaowei WANG , Wei LU , Xiaoshuang CHEN , Ning LI , Bo ZHANG , Zhifeng LI , Pingping CHEN
IPC分类号： H03H9/00
CPC分类号： G02B5/28
摘要： Taught herein is an integragted narrow bandpass filter array and a method of its fabrication. The filter array is a Fabry-Perot type of filter array, wherein the pass band changes with the thickness of the spacer layer. The integrated filter array comprises a substrate, a lower mirror stack, a spacer array, and an upper mirror stack. The spacer array is an array of varied thicknesses formed using a combinatorial deposition technique. The spacer array is used to control the pass band of each mini-size narrow bandpass filter and realizes the integration of narrow bandpass filters with different pass bands on a single substrate. The merit of this technique lies in its fabrication efficiency and finished product rate which are much higher than for conventional methods. The filter array is completely matched with detector arrays and functional in most of the important optical ranges.
摘要翻译：这里介绍的是一个集成窄带通滤波器阵列及其制造方法。滤波器阵列是法布里 - 珀罗型的滤波器阵列，其中通带随间隔层的厚度而变化。集成滤波器阵列包括衬底，下反射镜叠层，间隔物阵列和上反射镜叠层。间隔物阵列是使用组合沉积技术形成的各种厚度的阵列。间隔阵列用于控制每个小尺寸窄带通滤波器的通带，实现了单个衬底上具有不同通带的窄带通滤波器的集成。这种技术的优点在于其制造效率和成品率都远高于传统方法。滤波器阵列与检测器阵列完全匹配，并且在大多数重要的光学范围中起作用。

6. 发明申请

US20120166169A1 MODELING TECHNIQUE FOR RESISTIVE RANDOM ACCESS MEMORY (RRAM) CELLS 有权
标题翻译：电阻随机存取存储器（RRAM）细胞的建模技术
公开(公告)号：US20120166169A1
公开(公告)日：2012-06-28
申请号：US13077941
申请日：2011-03-31
申请人： Wei LU
发明人： Wei LU
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , G06F17/5022 , G06F17/5027 , G11C13/0007 , G11C13/0009
摘要： Accurate simulation of two-terminal resistive random access memory (RRAM) behavior is accomplished by solving equations including state variables for filament length growth, filament width growth, and temperature. Such simulations are often run in a SPICE environment. Highly accurate models simulate the dynamic nature of filament propagation and multiple resistive states by using a sub-circuit to represent an RRAM cell. In the sub-circuit, voltages on floating nodes control current output while the voltage dropped across the sub-circuit controls growth and temperature characteristics. Properly executed, such a sub-circuit can accurately model filament growth at all phases of conductance including dynamic switching and a plurality of resistive states.
摘要翻译：两端电阻随机存取存储器（RRAM）行为的精确仿真是通过求解包括灯丝长度生长，灯丝宽度生长和温度的状态变量的方程来实现的。这种模拟通常在SPICE环境中运行。高精度模型通过使用子电路来表示RRAM单元来模拟灯丝传播和多个电阻状态的动态特性。在子电路中，浮动节点上的电压控制电流输出，而跨越子电路的电压控制生长和温度特性。正确地执行，这样的子电路可以在包括动态切换和多个电阻状态的所有电导阶段中精确地模拟长丝生长。

7. 发明申请

US20110316085A1 INTEGRATED CIRCUIT INCLUDING A STRESSED DIELECTRIC LAYER WITH STABLE STRESS 审中-公开
标题翻译：集成电路，包括具有稳定应力的压电介质层
公开(公告)号：US20110316085A1
公开(公告)日：2011-12-29
申请号：US13225483
申请日：2011-09-05
申请人： Huang LIU , Jeff SHU , Luona GOH , Wei LU
发明人： Huang LIU , Jeff SHU , Luona GOH , Wei LU
IPC分类号： H01L29/78
CPC分类号： H01L29/78 , H01L21/76224 , H01L29/665 , H01L29/7843
摘要： An integrated circuit is provided having a substrate and a transistor in an active region of the substrate. The substrate also has an isolation region having a dielectric material. In one embodiment, a pre-metal dielectric layer is disposed over the substrate and the transistor. At least one of the isolation region or the pre-metal dielectric layer includes a O3 TEOS oxide having a stress retaining dopant. The O3 TEOS oxide induces a stress in a channel region of the transistor.
摘要翻译：提供了一种集成电路，其具有衬底和在衬底的有源区域中的晶体管。衬底还具有具有电介质材料的隔离区域。在一个实施例中，预先金属介电层设置在衬底和晶体管的上方。隔离区域或预金属介电层中的至少一个包括具有应力保持掺杂剂的O 3 TEOS氧化物。 O 3 TEOS氧化物在晶体管的沟道区域中引起应力。

8. 发明申请

US20110266688A1 PLANARIZED PASSIVATION LAYER FOR SEMICONDUCTOR DEVICES 有权
标题翻译：用于半导体器件的平面钝化层
公开(公告)号：US20110266688A1
公开(公告)日：2011-11-03
申请号：US13179573
申请日：2011-07-11
申请人： Sin Leng LIM , In Ki KIM , Jong Sung PARK , Min Hwan KIM , Wei LU
发明人： Sin Leng LIM , In Ki KIM , Jong Sung PARK , Min Hwan KIM , Wei LU
IPC分类号： H01L23/48
CPC分类号： G02F1/1333 , G02F1/136277 , G02F2001/133357 , Y10S438/954
摘要： A semiconductor device includes a substrate having a dielectric layer and a device layer on the substrate. The device layer has an opening. First and second sublayers are disposed on the device layer and line the opening. The second sublayer serves as a stop layer for planarization to provide a substantially planarized top surface for the semiconductor device.
摘要翻译：半导体器件包括在衬底上具有电介质层和器件层的衬底。设备层具有开口。第一和第二子层设置在器件层上并对开口进行排列。第二子层用作平坦化的停止层，以为半导体器件提供基本平坦化的顶表面。

9. 发明申请

US20090289309A1 METHOD FOR REDUCING SILICIDE DEFECTS IN INTEGRATED CIRCUITS 有权
标题翻译：降低集成电路中硅氧化物缺陷的方法
公开(公告)号：US20090289309A1
公开(公告)日：2009-11-26
申请号：US12124177
申请日：2008-05-21
申请人： Jianhui YE , Huang LIU , Alex KH SEE , Wei LU , Hai CONG , Hui Peng KOH , Mei Sheng ZHOU , Liang Choo HSIA
发明人： Jianhui YE , Huang LIU , Alex KH SEE , Wei LU , Hai CONG , Hui Peng KOH , Mei Sheng ZHOU , Liang Choo HSIA
IPC分类号： H01L29/00 , H01L21/311
CPC分类号： H01L29/665 , H01L21/31116 , H01L29/6653 , H01L29/78
摘要： A method for forming silicide contacts in integrated circuits (ICs) is described. A spacer pull-back etch is performed during the salicidation process to reduce the stress between the spacer and source/drain silicide contact at the spacer undercut. This prevents the propagation of surface defects into the substrate, thereby minimizing the occurrence of silicide pipe defects. The spacer pull-back etch can be performed after a first annealing step to form the silicide contacts.
摘要翻译：描述了在集成电路（IC）中形成硅化物触点的方法。在水解过程期间进行间隔物拉回蚀刻以减少间隔物与间隔物底切下的源/漏硅化物接触之间的应力。这样可以防止表面缺陷进入衬底，从而使硅化物管缺陷的发生最小化。间隔物拉回蚀刻可以在第一退火步骤之后进行以形成硅化物接触。

10. 发明申请

US20210312977A1 MEMORY PROCESSING UNIT ARCHITECTURE 有权
公开(公告)号：US20210312977A1
公开(公告)日：2021-10-07
申请号：US16841544
申请日：2020-04-06
申请人： Mohammed A. ZIDAN , Wei LU , Fan-hsuan MENG , Timothy Alan Wesley
发明人： Mohammed A. ZIDAN , Wei LU , Fan-hsuan MENG , Timothy Alan Wesley
IPC分类号： G11C11/406 , G11C11/407 , G06N3/08 , G06N5/04
摘要： A memory processing unit architecture can include a plurality of memory regions and a plurality of processing regions interleaved between the plurality of memory regions. The plurality of processing regions can be configured to perform computation functions of a model such as an artificial neural network. Data can be transferred between the computation functions in respective memory processing regions. In addition, the memory regions can be utilized to transfer data between a computation function in one processing region and a computation function in another processing region adjacent to the given memory region.

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