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1. 发明授权

US08705212B2 Magnetic element with enhanced coupling portion 有权
标题翻译：具有增强耦合部分的磁性元件
公开(公告)号：US08705212B2
公开(公告)日：2014-04-22
申请号：US13093536
申请日：2011-04-25
申请人： Jason Bryce Gadbois , Michael Christopher Kautzky , Mark William Covington , Dian Song , Dimitar Velikov Dimitrov , Qing He , Wei Tian , Thomas Boonstra , Sunita Gangopadhyay
发明人： Jason Bryce Gadbois , Michael Christopher Kautzky , Mark William Covington , Dian Song , Dimitar Velikov Dimitrov , Qing He , Wei Tian , Thomas Boonstra , Sunita Gangopadhyay
IPC分类号： G11B5/33 , H01L29/82
CPC分类号： G11B5/398 , B82Y40/00 , G01R33/093 , G01R33/098 , G11B5/3912 , H01F10/325 , H01F10/3254 , H01F41/303 , Y10T29/49021 , Y10T29/49034
摘要： An apparatus and associated method may be used to produce a magnetic element capable of detecting changes in magnetic states. Various embodiments of the present invention are generally directed to a magnetically responsive lamination of layers with a first portion and a laterally adjacent second portion. The second portion having a predetermined roughness between at least two layers capable of producing orange-peel coupling.
摘要翻译：可以使用装置和相关联的方法来产生能够检测磁状态变化的磁性元件。本发明的各种实施例通常涉及具有第一部分和横向相邻的第二部分的层的磁响应层压。第二部分在至少两层之间具有能够产生橙皮耦合的预定粗糙度。

2. 发明申请

US20120268846A1 Magnetic Element With Enhanced Coupling Portion 有权
标题翻译：增强耦合部分的磁性元件
公开(公告)号：US20120268846A1
公开(公告)日：2012-10-25
申请号：US13093536
申请日：2011-04-25
申请人： Jason Bryce Gadbois , Michael Christopher Kautzky , Mark William Covington , Dian Song , Dimitar Velikov Dimitrov , Qing He , Wei Tian , Thomas Boonstra , Sunita Gangopadhyay
发明人： Jason Bryce Gadbois , Michael Christopher Kautzky , Mark William Covington , Dian Song , Dimitar Velikov Dimitrov , Qing He , Wei Tian , Thomas Boonstra , Sunita Gangopadhyay
IPC分类号： G11B5/39 , H04R31/00
CPC分类号： G11B5/398 , B82Y40/00 , G01R33/093 , G01R33/098 , G11B5/3912 , H01F10/325 , H01F10/3254 , H01F41/303 , Y10T29/49021 , Y10T29/49034
摘要： An apparatus and associated method may be used to produce a magnetic element capable of detecting changes in magnetic states. Various embodiments of the present invention are generally directed to a magnetically responsive lamination of layers with a first portion and a laterally adjacent second portion. The second portion having a predetermined roughness between at least two layers capable of producing orange-peel coupling.
摘要翻译：可以使用装置和相关联的方法来产生能够检测磁状态变化的磁性元件。本发明的各种实施例通常涉及具有第一部分和横向相邻的第二部分的层的磁响应层压。第二部分在至少两层之间具有能够产生橙皮耦合的预定粗糙度。

3. 发明授权

US6121156A Contact monitor, method of forming same and method of analyzing contact-, via-and/or trench-forming processes in an integrated circuit 有权
标题翻译：接触式监测器，其形成方法以及在集成电路中分析接触式，通孔式和/或沟槽形成方法的方法
公开(公告)号：US6121156A
公开(公告)日：2000-09-19
申请号：US204215
申请日：1998-12-02
申请人： Edward M. Shamble , Thomas Boonstra , David J. Brownell , David A. Crow
发明人： Edward M. Shamble , Thomas Boonstra , David J. Brownell , David A. Crow
IPC分类号： H01L21/60 , H01L21/66 , H01L21/768 , H01L21/00
CPC分类号： H01L21/76897 , H01L21/76802 , H01L21/76807 , H01L22/24
摘要： Methods for monitoring defects in a process for forming a contact hole, via or trench in a layer of a device in an integrated circuit includes the steps of forming a sacrificial topology on a substrate by duplicating at least a portion of a structure of the device while substituting a material substantially free of elemental silicon for any elemental silicon present in the device to be monitored, etching the sacrificial topology at least to the substrate, removing at least a portion of the sacrificial topology, and inspecting the substrate using a wafer surface inspection tool. The substituted material, such as a dielectric material, can be easily etched and removed from the substrate, as compared to polysilicon. The etching step preferably creates an indentation in the substrate that is readily detectable by the wafer surface inspection tool. The etching step is preferably a selective etching step, having a selectivity of at least 10:1. The actual devices are then formed using the same or substantially the same process parameters as were used in forming the sacrificial topology of the monitor according to the present invention, thus insuring that properly formed contact holes, vias and/or trenches will also be formed in the actual device or devices.
摘要翻译：用于在集成电路中的器件层中形成接触孔，通孔或沟槽的工艺中的缺陷监测的方法包括以下步骤：通过复制器件结构的至少一部分而在衬底上形成牺牲拓扑，同时将基本上不含元素硅的材料替换为要监测的器件中存在的任何元素硅，至少蚀刻牺牲拓扑至衬底，去除牺牲拓扑的至少一部分，并使用晶片表面检查工具检查衬底。与多晶硅相比，诸如介电材料的取代材料可以容易地从衬底中蚀刻和去除。蚀刻步骤优选地在衬底中产生可由晶片表面检查工具容易地检测到的凹陷。蚀刻步骤优选为具有至少10:1选择性的选择性蚀刻步骤。然后使用与形成根据本发明的监视器的牺牲拓扑结构相同或基本上相同的工艺参数形成实际装置，从而确保也将形成适当形成的接触孔，通路和/或沟槽实际的设备或设备。

4. 发明授权

US06518591B1 Contact monitor, method of forming same and method of analizing contact-, via- and/or trench-forming processes in an integrated circuit 失效
标题翻译：接触式监测器，其形成方法以及在集成电路中分析接触，通孔和/或沟槽形成工艺的方法
公开(公告)号：US06518591B1
公开(公告)日：2003-02-11
申请号：US09561293
申请日：2000-04-28
申请人： Edward M. Shamble , Thomas Boonstra , David J. Brownell , David A. Crow
发明人： Edward M. Shamble , Thomas Boonstra , David J. Brownell , David A. Crow
IPC分类号： H01L2358
CPC分类号： H01L21/76897 , H01L21/76802 , H01L21/76805 , H01L21/76807 , H01L22/24
摘要： Methods for monitoring defects in a process for forming a contact hole, via or trench in a layer of a device in an integrated circuit includes the steps of forming a sacrificial topology on a substrate by duplicating at least a portion of a structure of the device while substituting a material substantially free of elemental silicon for any elemental silicon present in the device to be monitored, etching the sacrificial topology at least to the substrate, removing at least a portion of the sacrificial topology, and inspecting the substrate using a wafer surface inspection tool. The substituted material, such as a dielectric material, can be easily etched and removed from the substrate, as compared to polysilicon. The etching step preferably creates an indentation in the substrate that is readily detectable by the wafer surface inspection tool. The etching step is preferably a selective etching step, having a selectivity of at least 10:1. The actual devices are then formed using the same or substantially the same process parameters as were used in forming the sacrificial topology of the monitor according to the present invention, thus insuring that properly formed contact holes, vias and/or trenches will also be formed in the actual device or devices.
摘要翻译：用于在集成电路中的器件层中形成接触孔，通孔或沟槽的工艺中的缺陷监测的方法包括以下步骤：通过复制器件结构的至少一部分而在衬底上形成牺牲拓扑，同时将基本上不含元素硅的材料替换为要监测的器件中存在的任何元素硅，至少蚀刻牺牲拓扑至衬底，去除牺牲拓扑的至少一部分，并使用晶片表面检查工具检查衬底。与多晶硅相比，诸如介电材料的取代材料可以容易地从衬底中蚀刻和去除。蚀刻步骤优选地在衬底中产生可由晶片表面检查工具容易地检测到的凹陷。蚀刻步骤优选为具有至少10:1选择性的选择性蚀刻步骤。然后使用与形成根据本发明的监视器的牺牲拓扑结构相同或基本上相同的工艺参数形成实际装置，从而确保也将形成适当形成的接触孔，通路和/或沟槽实际的设备或设备。

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