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    • 10. 发明授权
    • Method and structure of an one time programmable memory device in an embedded EEPROM
    • 嵌入式EEPROM中的一次可编程存储器件的方法和结构
    • US07736967B2
    • 2010-06-15
    • US11502129
    • 2006-08-09
    • YiPeng ChanShengHe HuangJing Lu
    • YiPeng ChanShengHe HuangJing Lu
    • H01L21/8238
    • H01L27/115H01L27/11519H01L27/11521H01L27/11524
    • A structure and a manufacturing method for an OTP-EPROM in an embedded EEPROM integrated circuit structure. The structure has a substrate that includes a surface region. The structure has a gate dielectric is overlying the surface region. The structure also a first OTP-EPROM gate overlying the gate dielectric layer in a first cell region, and an EEPROM floating gate and a select gate overlying the gate dielectric layer in a second cell region. An insulating layer is overlying the first OTP-EPROM gate, the EEPROM floating gate and the select gate. An OTP-EPROM control gate is overlying the insulating layer and coupled to the first OTP-EPROM gate. An EEPROM control gate is overlying the insulating layer and coupled to the EEPROM floating gate.
    • 嵌入式EEPROM集成电路结构中OTP-EPROM的结构和制造方法。 该结构具有包括表面区域的基板。 该结构具有覆盖表面区域的栅极电介质。 该结构还包括覆盖第一单元区域中的栅极介电层的第一OTP-EPROM门,以及覆盖第二单元区域中的栅极介电层的EEPROM浮置栅极和选择栅极。 绝缘层覆盖着第一个OTP-EPROM门,EEPROM浮栅和选择门。 OTP-EPROM控制栅极覆盖绝缘层并耦合到第一个OTP-EPROM门。 EEPROM控制栅极覆盖绝缘层并耦合到EEPROM浮动栅极。