专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07006019B2 Rate-7/8 maximum transition run code encoding and decoding method and apparatus 失效
标题翻译： Rate-7/8最大过渡码编码和解码方法及装置
公开(公告)号：US07006019B2
公开(公告)日：2006-02-28
申请号：US10973831
申请日：2004-10-27
申请人： Jun Lee , Joo-hyun Lee , Jae-jin Lee , Byung-kyu Lee
发明人： Jun Lee , Joo-hyun Lee , Jae-jin Lee , Byung-kyu Lee
IPC分类号： H03M7/00
CPC分类号： H03M5/145 , G11B20/1426
摘要： A rate 7/8 MTR code encoding/decoding method and apparatus. The encoding method includes: generating a rate-7/8 MTR code for inputting 7-bit data and outputting a predetermined 8-bit codeword; checking whether codewords satisfy a predetermined constraint condition by connecting the 8-bit codeword and a subsequent 8-bit codeword; and if the codewords do not violate the constraint condition, not converting the codewords. The decoding method includes: checking whether the codewords satisfy a predetermined MTR constraint condition by connecting a current 8-bit codeword c(k) and a subsequent 8-bit codeword c(k+1); if the codewords violate the constraint condition, converting the codewords, and if the codewords do not violate the constraint condition, not converting the codewords; and decoding each converted 8-bit codeword into 7-bit data using a predetermined MTR code. Data is reliably reproduced with high write density, and large amounts of data are stored in and reproduced from a magnetic recording information storage medium.
摘要翻译：速率7/8 MTR码编码/解码方法和装置。编码方法包括：生成用于输入7位数据并输出预定8位码字的速率-7 / 8MTR码; 通过连接8位码字和随后的8位码字来检查码字是否满足预定约束条件; 并且如果码字不违反约束条件，则不转换码字。解码方法包括：通过连接当前的8位码字c（k）和随后的8位码字c（k + 1）来检查码字是否满足预定的MTR约束条件; 如果码字违反约束条件，转换码字，并且如果码字不违反约束条件，则不转换码字; 以及使用预定的MTR码将每个转换的8位码字解码为7位数据。数据以高写入密度被可靠地再现，并且大量数据被存储在磁记录信息存储介质中并从磁记录信息存储介质再现。

2. 发明申请

US20050116843A1 Rate-7/8 maximum transition run code encoding and decoding method and apparatus 失效
标题翻译： Rate-7/8最大过渡码编码和解码方法及装置
公开(公告)号：US20050116843A1
公开(公告)日：2005-06-02
申请号：US10973831
申请日：2004-10-27
申请人： Jun Lee , Joo-hyun Lee , Jae-jin Lee , Byung-kyu Lee
发明人： Jun Lee , Joo-hyun Lee , Jae-jin Lee , Byung-kyu Lee
IPC分类号： G11B20/14 , G11B20/10 , G11B20/18 , H03M5/14 , H03M7/14 , H03M7/00
CPC分类号： H03M5/145 , G11B20/1426
摘要： A rate 7/8 MTR code encoding/decoding method and apparatus. The encoding method includes: generating a rate-7/8 MTR code for inputting 7-bit data and outputting a predetermined 8-bit codeword; checking whether codewords satisfy a predetermined constraint condition by connecting the 8-bit codeword and a subsequent 8-bit codeword; and if the codewords do not violate the constraint condition, not converting the codewords. The decoding method includes: checking whether the codewords satisfy a predetermined MTR constraint condition by connecting a current 8-bit codeword c(k) and a subsequent 8-bit codeword c(k+1); if the codewords violate the constraint condition, converting the codewords, and if the codewords do not violate the constraint condition, not converting the codewords; and decoding each converted 8-bit codeword into 7-bit data using a predetermined MTR code. Data is reliably reproduced with high write density, and large amounts of data are stored in and reproduced from a magnetic recording information storage medium.
摘要翻译：速率7/8 MTR码编码/解码方法和装置。编码方法包括：生成用于输入7位数据并输出预定8位码字的速率-7 / 8MTR码; 通过连接8位码字和随后的8位码字来检查码字是否满足预定约束条件; 并且如果码字不违反约束条件，则不转换码字。解码方法包括：通过连接当前的8位码字c（k）和随后的8位码字c（k + 1）来检查码字是否满足预定的MTR约束条件; 如果码字违反约束条件，转换码字，并且如果码字不违反约束条件，则不转换码字; 以及使用预定的MTR码将每个转换的8位码字解码为7位数据。数据以高写入密度被可靠地再现，并且大量数据被存储在磁记录信息存储介质中并从磁记录信息存储介质再现。

3. 发明授权

US07057536B2 Rate-13/15 maximum transition run code encoding and decoding method and apparatus 失效
标题翻译： Rate-13/15最大过渡码编码和解码方法及装置
公开(公告)号：US07057536B2
公开(公告)日：2006-06-06
申请号：US11031529
申请日：2005-01-10
申请人： Jun Lee , Joo-hyun Lee , Kyu-suk Lee , Jae-jin Lee
发明人： Jun Lee , Joo-hyun Lee , Kyu-suk Lee , Jae-jin Lee
IPC分类号： H03M7/00
CPC分类号： H03M5/145 , G11B20/1426 , G11B2020/1434 , G11B2020/1446
摘要： Provided are a rate 13/15 MTR code encoding/decoding method and apparatus. The encoding method includes: generating a predetermined rate-13/15 MTR code in which 13-bit data corresponds to 15-bit data; outputting input 13-bit data as a 15-bit codeword according to the rate-13/15 MTR code; checking whether codewords satisfy a predetermined constraint condition by connecting the 15-bit codeword and a subsequent 15-bit codeword; and converting specific bits of the codewords if the codewords violate the constraint condition and not converting the codewords if the codewords do not violate the constraint condition. The rate-13/15 MTR (j=2, k=8) code includes: 8192 codewords obtained to prevent the number of consecutive transitions from becoming 3 at code boundaries in a modulation coding process. Data can be reliably reproduced with high write density, and a large amount of data can be stored in and reproduced from a magnetic recording information storage medium.
摘要翻译：提供了一种速率13/15的MTR码编码/解码方法和装置。编码方法包括：生成13比特数据对应于15比特数据的预定速率-13 / 15MTR码; 根据速率-13 / 15MTR码输出13位数据作为15位码字; 通过连接15位码字和随后的15位码字来检查码字是否满足预定约束条件; 以及如果所述码字违反所述约束条件并且如果所述码字不违反所述约束条件则不转换所述码字，则转换所述码字的特定比特。速率-13 / 15MTR（j = 2，k = 8）码包括：8192个码字，用于防止在调制编码过程中连续转换的数目在码边界处变为3。可以以高写入密度可靠地再现数据，并且可以将大量数据存储在磁记录信息存储介质中并从磁记录信息存储介质再现。

4. 发明申请

US20050174262A1 Rate-13/15 maximum transition run code encoding and decoding method and apparatus 失效
标题翻译： Rate-13/15最大过渡码编码和解码方法及装置
公开(公告)号：US20050174262A1
公开(公告)日：2005-08-11
申请号：US11031529
申请日：2005-01-10
申请人： Jun Lee , Joo-hyun Lee , Kyu-suk Lee , Jae-jin Lee
发明人： Jun Lee , Joo-hyun Lee , Kyu-suk Lee , Jae-jin Lee
IPC分类号： G11B20/10 , G11B20/14 , H03M5/14 , H03M7/00
CPC分类号： H03M5/145 , G11B20/1426 , G11B2020/1434 , G11B2020/1446
摘要： Provided are a rate 13/15 MTR code encoding/decoding method and apparatus. The encoding method includes: generating a predetermined rate-13/15 MTR code in which 13-bit data corresponds to 15-bit data; outputting input 13-bit data as a 15-bit codeword according to the rate-13/15 MTR code; checking whether codewords satisfy a predetermined constraint condition by connecting the 15-bit codeword and a subsequent 15-bit codeword; and converting specific bits of the codewords if the codewords violate the constraint condition and not converting the codewords if the codewords do not violate the constraint condition. The rate-13/15 MTR (j=2, k=8) code includes: 8192 codewords obtained to prevent the number of consecutive transitions from becoming 3 at code boundaries in a modulation coding process. Data can be reliably reproduced with high write density, and a large amount of data can be stored in and reproduced from a magnetic recording information storage medium.
摘要翻译：提供了一种速率13/15的MTR码编码/解码方法和装置。编码方法包括：生成13比特数据对应于15比特数据的预定速率-13 / 15MTR码; 根据速率-13 / 15MTR码输出13位数据作为15位码字; 通过连接15位码字和随后的15位码字来检查码字是否满足预定约束条件; 以及如果所述码字违反所述约束条件并且如果所述码字不违反所述约束条件则不转换所述码字，则转换所述码字的特定比特。速率-13 / 15MTR（j = 2，k = 8）码包括：8192个码字，用于防止在调制编码过程中在码边界处连续转换的数量变为3。可以以高写入密度可靠地再现数据，并且可以将大量数据存储在磁记录信息存储介质中并从磁记录信息存储介质再现。

5. 发明授权

US07924522B2 Apparatus and method of detecting error symbol, and disk drive apparatus using the same 失效
标题翻译：检测误差符号的装置和方法，以及使用其的磁盘驱动装置
公开(公告)号：US07924522B2
公开(公告)日：2011-04-12
申请号：US11751843
申请日：2007-05-22
申请人： Joo-hyun Lee , Jong-yun Yun , Jae-jin Lee
发明人： Joo-hyun Lee , Jong-yun Yun , Jae-jin Lee
IPC分类号： G11B5/09
CPC分类号： H04L25/03006 , G11B20/10009 , G11B20/10046 , G11B20/10425
摘要： An apparatus and a method of detecting an error symbol in a data storage apparatus so that an error correcting performance of an error correction decoder. The error symbol detecting apparatus includes an equalizer equalizing a signal transmitted to a channel using a channel equalization characteristic that is suitable for a corresponding system, a data detector to detect data from the signal output from the equalizer, a modeling tool designed to have the same characteristics corresponding to a partial response (PR) target polynomial applied to the system, a correlation evaluation information generating unit to generate correlation evaluation information based on a correlation degree between an actual output of the equalizer and a target output of the modeling tool, and an error symbol determination unit to determine an order of probability of error generation of the symbols based on the correlation evaluation information, and to determine a predetermined number of symbols having a high probability of generating errors corresponding to the order of probability of error generation as error generating symbols.
摘要翻译：一种检测数据存储装置中的错误符号以便纠错解码器的纠错性能的装置和方法。误差符号检测装置包括均衡器，其使用适合于对应系统的信道均衡特性来均衡发送到信道的信号;数据检测器，用于从均衡器输出的信号中检测数据;建模工具，被设计为具有相同的对应于应用于系统的部分响应（PR）目标多项式的特征的相关性评估信息生成单元，基于均衡器的实际输出与建模工具的目标输出之间的相关度生成相关性评价信息，以及误差符号确定单元，用于基于所述相关性评估信息来确定符号的错误产生概率的顺序，并且确定具有高概率地产生与所述错误产生的概率的顺序相对应的错误的预定数量的符号作为错误产生符号。

6. 发明申请

US20070274419A1 APPARATUS AND METHOD OF DETECTING ERROR SYMBOL, AND DISK DRIVE APPARATUS USING THE SAME 失效
标题翻译：检测错误符号的装置和方法以及使用其的盘驱动装置
公开(公告)号：US20070274419A1
公开(公告)日：2007-11-29
申请号：US11751843
申请日：2007-05-22
申请人： Joo-Hyun Lee , Jong-yun Yun , Jae-jin Lee
发明人： Joo-Hyun Lee , Jong-yun Yun , Jae-jin Lee
IPC分类号： H04L27/06
CPC分类号： H04L25/03006 , G11B20/10009 , G11B20/10046 , G11B20/10425
摘要： An apparatus and a method of detecting an error symbol in a data storage apparatus so that an error correcting performance of an error correction decoder. The error symbol detecting apparatus includes an equalizer equalizing a signal transmitted to a channel using a channel equalization characteristic that is suitable for a corresponding system, a data detector to detect data from the signal output from the equalizer, a modeling tool designed to have the same characteristics corresponding to a partial response (PR) target polynomial applied to the system, a correlation evaluation information generating unit to generate correlation evaluation information based on a correlation degree between an actual output of the equalizer and a target output of the modeling tool, and an error symbol determination unit to determine an order of probability of error generation of the symbols based on the correlation evaluation information, and to determine a predetermined number of symbols having a high probability of generating errors corresponding to the order of probability of error generation as error generating symbols.
摘要翻译：一种检测数据存储装置中的错误符号以便纠错解码器的纠错性能的装置和方法。误差符号检测装置包括均衡器，其使用适合于对应系统的信道均衡特性来均衡发送到信道的信号;数据检测器，用于从均衡器输出的信号中检测数据;建模工具，被设计为具有相同的对应于应用于系统的部分响应（PR）目标多项式的特征的相关性评估信息生成单元，基于均衡器的实际输出与建模工具的目标输出之间的相关度生成相关性评价信息，以及误差符号确定单元，用于基于所述相关性评估信息来确定符号的错误产生概率的顺序，并且确定具有高概率地产生与所述错误产生的概率的顺序相对应的错误的预定数量的符号作为错误产生符号。

7. 发明授权

US07443932B2 Method and apparatus for adjusting data recorded on optical disc 有权
标题翻译：用于调整记录在光盘上的数据的方法和装置
公开(公告)号：US07443932B2
公开(公告)日：2008-10-28
申请号：US10747312
申请日：2003-12-30
申请人： Hyun-soo Park , Jae-jin Lee , Jae-seong Shim , You-pyo Hong , Ju-han Bae , Jae-hoon Seo
发明人： Hyun-soo Park , Jae-jin Lee , Jae-seong Shim , You-pyo Hong , Ju-han Bae , Jae-hoon Seo
IPC分类号： H03D1/00
CPC分类号： G11B20/10203 , G11B20/10009 , G11B20/10046 , G11B20/10212 , G11B20/10296 , G11B20/10425
摘要： A method and an apparatus which adjusts a signal read from an optical disc in order to obtain stable binary data. The signal adjustment method comprises (a) detecting a period of an input signal of a predetermined code; (b) determining whether the detected period is smaller than a predetermined value; and (c) if the detected period is determined to be smaller than the predetermined value, adjusting the input signal so that its period equals the predetermined value, and outputting the input signal. The signal adjustment method and apparatus of the present invention reduce errors and improve system performance, when a signal input to the binary processor does not meet its code feature.
摘要翻译：调整从光盘读取的信号以获得稳定的二进制数据的方法和装置。信号调整方法包括：（a）检测预定码的输入信号的周期; （b）确定所检测的周期是否小于预定值; 以及（c）如果所述检测周期被确定为小于所述预定值，则调整所述输入信号使其周期等于所述预定值，并输出所述输入信号。当输入到二进制处理器的信号不符合其代码特征时，本发明的信号调整方法和装置减少误差并提高系统性能。

8. 发明申请

US20070115746A1 Internal Voltage Generation Circuit of Semiconductor Memory Device 有权
标题翻译：半导体存储器件的内部电压产生电路
公开(公告)号：US20070115746A1
公开(公告)日：2007-05-24
申请号：US11623569
申请日：2007-01-16
申请人： Jae Im , Jae-jin Lee
发明人： Jae Im , Jae-jin Lee
IPC分类号： G11C5/14
CPC分类号： G11C5/14 , G11C11/406 , G11C11/4074 , G11C2211/4068
摘要： Disclosed herein is an internal voltage generation circuit of a semiconductor memory device which is capable of supplying voltages of different levels to a column path & control logic and data path & control logic in the memory device according to different operation modes of the memory device. The column path & control logic and data path & control logic are applied with a normal operating voltage when they are involved in the current operation mode of the memory device, whereas with a lower voltage when they are not involved. Therefore, the present invention has the effect of efficiently managing internal voltages of the semiconductor memory device and reducing current leakage of the memory device and, in turn, unnecessary power consumption thereof.
摘要翻译：本文公开了一种半导体存储器件的内部电压产生电路，其能够根据存储器件的不同操作模式向存储器件中的列路径和控制逻辑以及数据路径和控制逻辑提供不同电平的电压。列路径和控制逻辑以及数据路径和控制逻辑在其参与存储器件的当前操作模式时被应用于正常工作电压，而当它们不涉及时具有较低的电压。因此，本发明具有有效地管理半导体存储器件的内部电压并且减少存储器件的电流泄漏的效果，并且反过来又导致其不必要的功耗。

9. 发明授权

US06970027B2 Apparatus for generating clock signal in optical disk and method thereof 失效
标题翻译：用于在光盘中产生时钟信号的装置及其方法
公开(公告)号：US06970027B2
公开(公告)日：2005-11-29
申请号：US10765183
申请日：2004-01-28
申请人： Hyun-soo Park , Jae-jin Lee , You-pyo Hong , Jae-seong Shim , Ju-han Bae
发明人： Hyun-soo Park , Jae-jin Lee , You-pyo Hong , Jae-seong Shim , Ju-han Bae
IPC分类号： G11B20/10 , H03L7/085 , H03L7/087 , H03L7/113 , H03L7/06
CPC分类号： H03L7/085 , H03L7/087 , H03L7/113
摘要： A clock generator for reproducing data recorded onto an optical disk, and more particularly, an apparatus for stably generating a clock signal synchronized with an input signal and a method of generating a clock signal. The apparatus generating a clock signal includes a voltage controlled oscillator, a phase compensator, a frequency compensator, and an adder. The voltage controlled oscillator generates a clock signal of a frequency that varies with a control voltage signal. The phase compensator receives an input signal and the clock signal, detects a phase difference between the input signal and the clock signal, and generates a first control voltage corresponding to the phase difference. The frequency compensator receives the input signal and the clock signal, detects a frequency difference between the input signal and the clock signal, and generates a second control voltage corresponding to the frequency difference. The adder sums the first control voltage and the second control voltage and generates the control voltage signal.
摘要翻译：一种用于再现记录在光盘上的数据的时钟发生器，更具体地说，一种用于稳定地产生与输入信号同步的时钟信号的装置和产生时钟信号的方法。产生时钟信号的装置包括压控振荡器，相位补偿器，频率补偿器和加法器。压控振荡器产生随着控制电压信号而变化的频率的时钟信号。相位补偿器接收输入信号和时钟信号，检测输入信号和时钟信号之间的相位差，并产生对应于相位差的第一控制电压。频率补偿器接收输入信号和时钟信号，检测输入信号和时钟信号之间的频率差，并产生对应于频率差的第二控制电压。加法器将第一控制电压和第二控制电压相加并产生控制电压信号。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式