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1. 外观设计

USD505964S1 Image sensor 失效
公开(公告)号：USD505964S1
公开(公告)日：2005-06-07
申请号：US29194887
申请日：2003-12-03
申请人： Masanori Minamio , Yoshinobu Kunitomo , Mutsuo Tsuji , Koichi Yamauchi
设计人： Masanori Minamio , Yoshinobu Kunitomo , Mutsuo Tsuji , Koichi Yamauchi

2. 发明授权

US07154156B2 Solid-state imaging device and method for producing the same 有权
标题翻译：固态成像装置及其制造方法
公开(公告)号：US07154156B2
公开(公告)日：2006-12-26
申请号：US10676135
申请日：2003-09-30
申请人： Masanori Minamio , Mutsuo Tsuji , Kouichi Yamauchi
发明人： Masanori Minamio , Mutsuo Tsuji , Kouichi Yamauchi
IPC分类号： H01L27/14 , H01L31/00
CPC分类号： H01L27/14618 , H01L2224/16225 , H01L2924/00014 , Y10T29/49121 , Y10T29/49158 , Y10T29/49167 , Y10T29/49176 , Y10T29/49204 , Y10T29/4922 , H01L2224/0401
摘要： A solid-state imaging device includes: a base made of an insulation material and having a frame form in planar shape with an aperture formed at an inner region; a plurality of wirings provided on one surface of the base and extending toward an outer periphery of the base from a region along the aperture; and an imaging element mounted on the surface of the base with wirings provided thereon so that a light-receptive region of the imaging element faces the aperture. An end portion on the aperture side of each of the plurality of wirings forms an internal terminal portion and an end portion on the outer peripheral side of each of the plurality of wirings forms an external terminal portion, the internal terminal portion of the wiring being connected electrically with an electrode of the imaging element. The wirings are made of thin metal plate leads, the base is made up of a resin molded member in which the thin metal plate leads are embedded, and at least a part of a side edge face of the thin metal plate leads is embedded in the base. The rigidity of the base is enhanced by the thin metal plate leads, thus reducing a curl and a warp of the base.
摘要翻译：一种固态成像装置，包括：由绝缘材料制成的底座，具有平面形状的框架形状，其内部形成有孔; 多个布线设置在基座的一个表面上，并沿着孔径从基座的外周延伸; 以及安装在基座表面上的成像元件，其上设置有布线，使得成像元件的光接收区域面向孔。多个布线中的每一个的开口侧的端部形成内部端子部，多个布线的外周侧的端部形成外部端子部，布线的内部端子部分被连接与成像元件的电极电连接。所述布线由薄金属板引线构成，所述基座由嵌入所述薄金属板引线的树脂模制构件构成，并且所述薄金属板引线的侧边缘的至少一部分嵌入所述基础。通过薄金属板引线增强基座的刚性，从而减小基部的卷曲和翘曲。

3. 发明授权

US07367120B2 Method for producing a solid-state imaging device 有权
标题翻译：固态成像装置的制造方法
公开(公告)号：US07367120B2
公开(公告)日：2008-05-06
申请号：US11599125
申请日：2006-11-14
申请人： Masanori Minamio , Mutsuo Tsuji , Kouichi Yamauchi
发明人： Masanori Minamio , Mutsuo Tsuji , Kouichi Yamauchi
IPC分类号： H01K3/22
CPC分类号： H01L27/14618 , H01L2224/16225 , H01L2924/00014 , Y10T29/49121 , Y10T29/49158 , Y10T29/49167 , Y10T29/49176 , Y10T29/49204 , Y10T29/4922 , H01L2224/0401
摘要： A method of manufacturing a solid-state imaging device. An end portion on the aperture side of each of the plurality of wirings forms an internal terminal portion and an end portion on the outer peripheral side of each of the plurality of wirings forms an external terminal portion, the internal terminal portion of the wiring being connected electrically with an electrode of the imaging element. The wirings are made of thin metal plate leads, the base is made up of a resin molded member in which the thin metal plate leads are embedded, and at least a part of a side edge face of the thin metal plate leads is embedded in the base. The rigidity of the base is enhanced by the thin metal plate leads, thus reducing a curl and a warp of the base.
摘要翻译：一种制造固态成像装置的方法。多个布线中的每一个的开口侧的端部形成内部端子部，多个布线的外周侧的端部形成外部端子部，布线的内部端子部分被连接与成像元件的电极电连接。所述布线由薄金属板引线构成，所述基座由嵌入所述薄金属板引线的树脂模制构件构成，并且所述薄金属板引线的侧边缘的至少一部分嵌入所述基础。通过薄金属板引线增强基座的刚性，从而减小基部的卷曲和翘曲。

4. 发明申请

US20070069319A1 Solid-state imaging device and method for producing the same 有权
标题翻译：固态成像装置及其制造方法
公开(公告)号：US20070069319A1
公开(公告)日：2007-03-29
申请号：US11599125
申请日：2006-11-14
申请人： Masanori Minamio , Mutsuo Tsuji , Kouichi Yamauchi
发明人： Masanori Minamio , Mutsuo Tsuji , Kouichi Yamauchi
IPC分类号： H01L31/0203 , H01K3/22 , H01R43/00
CPC分类号： H01L27/14618 , H01L2224/16225 , H01L2924/00014 , Y10T29/49121 , Y10T29/49158 , Y10T29/49167 , Y10T29/49176 , Y10T29/49204 , Y10T29/4922 , H01L2224/0401
摘要： A solid-state imaging device includes: a base made of an insulation material and having a frame form in planar shape with an aperture formed at an inner region; a plurality of wirings provided on one surface of the base and extending toward an outer periphery of the base from a region along the aperture; and an imaging element mounted on the surface of the base with wirings provided thereon so that a light-receptive region of the imaging element faces the aperture. An end portion on the aperture side of each of the plurality of wirings forms an internal terminal portion and an end portion on the outer peripheral side of each of the plurality of wirings forms an external terminal portion, the internal terminal portion of the wiring being connected electrically with an electrode of the imaging element. The wirings are made of thin metal plate leads, the base is made up of a resin molded member in which the thin metal plate leads are embedded, and at least a part of a side edge face of the thin metal plate leads is embedded in the base. The rigidity of the base is enhanced by the thin metal plate leads, thus reducing a curl and a warp of the base.
摘要翻译：一种固态成像装置，包括：由绝缘材料制成的底座，具有平面形状的框架形状，其内部形成有孔; 多个布线设置在基座的一个表面上，并沿着孔径从基座的外周延伸; 以及安装在基座表面上的成像元件，其上设置有布线，使得成像元件的光接收区域面向孔。多个布线中的每一个的开口侧的端部形成内部端子部，多个布线的外周侧的端部形成外部端子部，布线的内部端子部分被连接与成像元件的电极电连接。所述布线由薄金属板引线构成，所述基座由嵌入所述薄金属板引线的树脂模制构件构成，并且所述薄金属板引线的侧边缘的至少一部分嵌入所述基础。通过薄金属板引线增强基座的刚性，从而减小基部的卷曲和翘曲。

5. 发明申请

US20060079023A1 Semiconductor device and manufacturing method for the same 审中-公开
公开(公告)号：US20060079023A1
公开(公告)日：2006-04-13
申请号：US11281366
申请日：2005-11-18
申请人： Toshiyuki Fukuda , Hiroaki Fujimoto , Mutsuo Tsuji , Takashi Yui , Yoshiaki Takeoka
发明人： Toshiyuki Fukuda , Hiroaki Fujimoto , Mutsuo Tsuji , Takashi Yui , Yoshiaki Takeoka
IPC分类号： H01L21/60
CPC分类号： H01L21/561 , H01L21/563 , H01L23/3121 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/97 , H01L25/0657 , H01L29/0657 , H01L2224/0401 , H01L2224/05553 , H01L2224/05554 , H01L2224/05624 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/13099 , H01L2224/13144 , H01L2224/16225 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48471 , H01L2224/48624 , H01L2224/4943 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/78301 , H01L2224/83191 , H01L2224/83855 , H01L2224/85181 , H01L2224/85186 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06555 , H01L2225/06586 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01204 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/10162 , H01L2924/12042 , H01L2924/14 , H01L2924/15787 , H01L2924/181 , H01L2924/19103 , H01L2924/19105 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/351 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2924/01046 , H01L2924/00012 , H01L2924/00011 , H01L2924/3512 , H01L2224/92247 , H01L2224/4554
摘要： A semiconductor device and a manufacturing method for the same are provided wherein the reliability of connections of fine metal wires connecting a second semiconductor chip to a wiring board can be improved in the case wherein the second semiconductor chip, which is located above the lower, first semiconductor chip, is significantly larger than the first semiconductor chip in a configuration wherein two semiconductor chips are stacked and mounted on a wiring board. In this semiconductor device the rear surface of the first semiconductor chip and the rear surface of the second semiconductor chip are adhered to each other by means of adhesive and the side of the adhesive is inclined from the edge portions of the first semiconductor chip toward the portions of the second semiconductor chip extending from the side of the first semiconductor chip. Therefore, it becomes possible to prevent the occurrence of microcracks in the second semiconductor chip and to prevent the occurrence of defective fine metal wire connections caused by the impact at the time of electrical connection of the second semiconductor chip to the wiring board.

6. 发明授权

US5264726A Chip-carrier 失效
标题翻译：芯片载体
公开(公告)号：US5264726A
公开(公告)日：1993-11-23
申请号：US962074
申请日：1992-10-16
申请人： Yukio Yamaguchi , Mutsuo Tsuji
发明人： Yukio Yamaguchi , Mutsuo Tsuji
IPC分类号： H01L23/053 , H01L23/16 , H01L23/556 , H01L23/02 , H01L23/12
CPC分类号： H01L23/053 , H01L23/16 , H01L23/556 , H01L24/01 , H01L2224/73253 , H01L2924/01014 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/16152
摘要： In a chip-carrier provided with a chip-carrier substrate, a chip-carrier cover and an IC chip, said IC chip being arranged at a distance from a circuit surface of the IC chip being directed toward the chip-carrier substrate, an .alpha.-ray shielding film made of film material containing few radioactive elements, and adhered to a surface of the chip-carrier substrate facing the IC chip or to the circuit surface of the IC chip is provided for protecting the IC chip from the IC chip.
摘要翻译：在设置有芯片载体基板，芯片载体盖和IC芯片的芯片载体中，所述IC芯片布置在与IC芯片的朝向芯片载体基板的电路表面一定距离处，包含少量放射性元素的薄膜材料制成的并且贴在面向IC芯片的芯片载体衬底或IC芯片的电路表面的表面屏蔽膜用于保护IC芯片免受IC芯片的影响。

7. 发明授权

US4748538A Semiconductor module 失效
标题翻译：半导体模块
公开(公告)号：US4748538A
公开(公告)日：1988-05-31
申请号：US881656
申请日：1986-07-03
申请人： Mutsuo Tsuji
发明人： Mutsuo Tsuji
IPC分类号： H01L21/60 , H01L23/367 , H05K7/20
CPC分类号： H01L24/81 , H01L23/367 , H01L2224/81801 , H01L2924/01013 , H01L2924/01032 , H01L2924/01033 , H01L2924/01052 , H01L2924/01075 , H01L2924/01082 , H01L2924/014 , H01L2924/12044
摘要： A semiconductor module includes a multi-layer wiring substrate provided at a first surface with a plurality of input/output terminals and at a second surface with lead terminals connected to the input/output terminals. A cap is provided above the multi-layer wiring substrate by means of leg members which forms a space between the cap and the multi-layer wiring substrate. A semiconductor chip is fixed to the side exposed to the space of the cap, and lead wires are provided, each having one end attached to a terminal of the semiconductor chip. The lead wires are drawn out in advance so that they can be visually confirmed from an upper direction of the cap and have their other ends connected to the lead terminals.
摘要翻译：半导体模块包括在第一表面上设置有多个输入/输出端子的多层布线基板，以及在与输入/输出端子连接的引线端子的第二表面上。在多层布线基板的上方，通过在盖和多层布线基板之间形成空间的支腿构件设置盖。半导体芯片固定在暴露于盖的空间的一侧，并且提供引线，每个引线的一端连接到半导体芯片的端子。引线被提前拉出，从而可以从盖的上方目视确认引线，并将其另一端连接到引线端。

8. 发明申请

US20060208349A1 Semiconductor device and manufacturing method for the same 审中-公开
公开(公告)号：US20060208349A1
公开(公告)日：2006-09-21
申请号：US11392853
申请日：2006-03-30
申请人： Toshiyuki Fukuda , Hiroaki Fujimoto , Mutsuo Tsuji , Takashi Yui , Yoshiaki Takeoka
发明人： Toshiyuki Fukuda , Hiroaki Fujimoto , Mutsuo Tsuji , Takashi Yui , Yoshiaki Takeoka
IPC分类号： H01L23/12
CPC分类号： H01L21/561 , H01L21/563 , H01L23/3121 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/97 , H01L25/0657 , H01L29/0657 , H01L2224/0401 , H01L2224/05553 , H01L2224/05554 , H01L2224/05624 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/13099 , H01L2224/13144 , H01L2224/16225 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48471 , H01L2224/48624 , H01L2224/4943 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/78301 , H01L2224/83191 , H01L2224/83855 , H01L2224/85181 , H01L2224/85186 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06555 , H01L2225/06586 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01204 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/10162 , H01L2924/12042 , H01L2924/14 , H01L2924/15787 , H01L2924/181 , H01L2924/19103 , H01L2924/19105 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/351 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2924/01046 , H01L2924/00012 , H01L2924/00011 , H01L2924/3512 , H01L2224/92247 , H01L2224/4554
摘要： A semiconductor device and a manufacturing method for the same are provided wherein the reliability of connections of fine metal wires connecting a second semiconductor chip to a wiring board can be improved in the case wherein the second semiconductor chip, which is located above the lower, first semiconductor chip, is significantly larger than the first semiconductor chip in a configuration wherein two semiconductor chips are stacked and mounted on a wiring board. In this semiconductor device the rear surface of the first semiconductor chip and the rear surface of the second semiconductor chip are adhered to each other by means of adhesive and the side of the adhesive is inclined from the edge portions of the first semiconductor chip toward the portions of the second semiconductor chip extending from the side of the first semiconductor chip. Therefore, it becomes possible to prevent the occurrence of microcracks in the second semiconductor chip and to prevent the occurrence of defective fine metal wire connections caused by the impact at the time of electrical connection of the second semiconductor chip to the wiring board.

9. 发明授权

US07087455B2 Semiconductor device and manufacturing method for the same 有权
标题翻译：半导体器件及其制造方法相同
公开(公告)号：US07087455B2
公开(公告)日：2006-08-08
申请号：US10636595
申请日：2003-08-08
申请人： Toshiyuki Fukuda , Hiroaki Fujimoto , Mutsuo Tsuji , Takashi Yui , Yoshiaki Takeoka
发明人： Toshiyuki Fukuda , Hiroaki Fujimoto , Mutsuo Tsuji , Takashi Yui , Yoshiaki Takeoka
IPC分类号： H01L21/44
CPC分类号： H01L21/561 , H01L21/563 , H01L23/3121 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/97 , H01L25/0657 , H01L29/0657 , H01L2224/0401 , H01L2224/05553 , H01L2224/05554 , H01L2224/05624 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/13099 , H01L2224/13144 , H01L2224/16225 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48471 , H01L2224/48624 , H01L2224/4943 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/78301 , H01L2224/83191 , H01L2224/83855 , H01L2224/85181 , H01L2224/85186 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06555 , H01L2225/06586 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01204 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/10162 , H01L2924/12042 , H01L2924/14 , H01L2924/15787 , H01L2924/181 , H01L2924/19103 , H01L2924/19105 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/351 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2924/01046 , H01L2924/00012 , H01L2924/00011 , H01L2924/3512 , H01L2224/92247 , H01L2224/4554
摘要： A semiconductor device and a manufacturing method for the same are provided wherein the reliability of connections of fine metal wires connecting a second semiconductor chip to a wiring board can be improved in the case wherein the second semiconductor chip, which is located above the lower, first semiconductor chip, is significantly larger than the first semiconductor chip in a configuration wherein two semiconductor chips are stacked and mounted on a wiring board. In this semiconductor device the rear surface of the first semiconductor chip and the rear surface of the second semiconductor chip are adhered to each other by means of adhesive and the side of the adhesive is inclined from the edge portions of the first semiconductor chip toward the portions of the second semiconductor chip extending from the side of the first semiconductor chip. Therefore, it becomes possible to prevent the occurrence of microcracks in the second semiconductor chip and to prevent the occurrence of defective fine metal wire connections caused by the impact at the time of electrical connection of the second semiconductor chip to the wiring board.
摘要翻译：提供了一种半导体器件及其制造方法，其中在第二半导体芯片位于下部第一半导体芯片的情况下，可以提高连接第二半导体芯片到布线板的细金属线的连接的可靠性半导体芯片明显大于其中两个半导体芯片堆叠并安装在布线板上的配置中的第一半导体芯片。在该半导体器件中，第一半导体芯片的后表面和第二半导体芯片的后表面通过粘合剂彼此粘合，并且粘合剂的侧面从第一半导体芯片的边缘部朝向部分的第二半导体芯片从第一半导体芯片的侧面延伸。因此，可以防止第二半导体芯片中的微裂纹的发生，并且防止由于第二半导体芯片与布线板的电连接时的冲击而引起的细小金属线连接不良的发生。

10. 发明授权

US4855869A Chip carrier 失效
标题翻译：芯片载体
公开(公告)号：US4855869A
公开(公告)日：1989-08-08
申请号：US98218
申请日：1987-09-18
申请人： Mutsuo Tsuji
发明人： Mutsuo Tsuji
IPC分类号： H01L23/36 , H01L21/58 , H01L21/60 , H01L23/04 , H01L23/053 , H01L23/498
CPC分类号： H01L24/83 , H01L23/053 , H01L23/49827 , H01L24/29 , H01L2224/16 , H01L2224/2919 , H01L2224/73253 , H01L2224/83136 , H01L2224/8319 , H01L2224/8385 , H01L2924/01004 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/14 , H01L2924/15173 , H01L2924/15184 , H01L2924/15311 , H01L2924/15787
摘要： A chip carrier including a substrate having a plurality of pads formed on the upper and lower surfaces thereof and wirings to connect the pads. The chip carrier also includes an integrated circuit chip having a plurality of leads connected to corresponding ones of the pads. A first metal frame is included which is soldered to the upper surface of the substrate so as to surround the integrated circuit chip. The chip carrier also includes a second metal frame which is seam-welded to the upper end of the first metal frame so as to surround the integrated circuit chip and a plate is soldered to the upper end of the second metal frame so as to cover the integrated circuit chip.

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