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1. 发明专利

GB2602114A Digital radio communications 未知
公开(公告)号：GB2602114A
公开(公告)日：2022-06-22
申请号：GB202020110
申请日：2020-12-18
申请人： NORDIC SEMICONDUCTOR ASA
发明人： PAL HALAND
IPC分类号： H04W28/18 , H04W4/80
摘要： A digital radio transmitter device operates in accordance with a predetermined communication protocol that defines a default inter-frame spacing. The device has a minimum inter-frame spacing that is shorter than said default inter-frame spacing. The device is configured to: transmit 22 a first data packet indicating that the device is able to support an inter-frame spacing shorter than said default inter-frame spacing; receive 30, 36 a second data packet from a peer device after said default inter-frame spacing; if said second data packet indicates that said peer device is able to support an inter-frame spacing shorter than said default inter-frame spacing, transmit a third data packet using an inter-frame spacing shorter than said default inter-frame spacing; and if said second data packet does not indicate that said peer device is able to support an inter-frame spacing shorter than said default interframe spacing, transmit said third packet using said default inter-frame spacing.

2. 发明专利

GB2601735A Peripheral interconnect controller 未知
公开(公告)号：GB2601735A
公开(公告)日：2022-06-15
申请号：GB202018921
申请日：2020-12-01
申请人： NORDIC SEMICONDUCTOR ASA
发明人： PAL HALAND , CARSTEN WULFF
IPC分类号： G06F13/12 , G05B19/05 , G06F9/30 , G06F9/448 , G06F13/38 , G06F13/40 , H04L41/0813 , H04L67/125
摘要： There is disclosed an electronic device 100 and a method of operating an electronic device 100. It has peripherals 134 which each have one or more event outputs or task inputs, connected to a peripheral interconnect 140.The device also has a controller 142 for configuring the peripheral interconnect and a memory 131,132, which are communicatively coupled to a bus system 135. The peripheral interconnect 140 receives configuration data from the controller 142, which selectively connects peripheral event outputs and task inputs. The controller 142 uses the bus system 135 to access a sequence of instructions in a script 20 stored in the memory 131,132. Each instruction in the sequence identifies a peripheral task input, event output and a second peripheral event output. Each subsequent instruction in the sequence is implemented in response to detecting an event signalled from the second peripheral event output identified by the preceding instruction in the sequence.

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