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1. 发明授权

CN104617056B 半导体结构有权
公开(公告)号：CN104617056B
公开(公告)日：2019-06-11
申请号：CN201410825904.8
申请日：2010-11-16
申请人：台湾积体电路制造股份有限公司
发明人：卢祯发 , 刘重希 , 余振华 , 陈威宇 , 陈正庭
IPC分类号： H01L23/29 , H01L21/48
CPC分类号： H01L24/13 , H01L23/293 , H01L23/3171 , H01L23/498 , H01L23/49816 , H01L23/49822 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0362 , H01L2224/03831 , H01L2224/03901 , H01L2224/0401 , H01L2224/05572 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/1147 , H01L2224/11622 , H01L2224/1181 , H01L2224/1183 , H01L2224/11849 , H01L2224/11901 , H01L2224/13111 , H01L2224/13116 , H01L2224/93 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/12044 , H01L2924/14 , H01L2924/1434 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H05K3/28 , H05K3/3478 , H05K3/4007 , H01L2224/11 , H01L2224/05552 , H01L2924/00 , H01L2924/1082
摘要：本发明提供一种半导体结构，该半导体结构包括：一基材，具有一接触垫形成于其上；以及一聚合物层位于该基材上，该聚合物层被圖案化以暴露至少一部分的该接触垫，该聚合物层的钛表面污染物小于约1％、氟表面污染物小于约1％、锡表面污染物小于约1.5％、及铅表面污染物小于约0.4％。本发明可避免及/或减少来自例如胶带工艺的污染物。

2. 发明公开

CN103477420A 永久性粘合晶片的方法有权
公开(公告)号：CN103477420A
公开(公告)日：2013-12-25
申请号：CN201180069932.6
申请日：2011-04-08
申请人： EV集团E·索尔纳有限责任公司
发明人： T.普拉赫 , K.欣格尔 , M.温普林格 , C.弗勒特根
IPC分类号： H01L21/20 , H01L21/762
CPC分类号： H01L24/83 , H01L21/0223 , H01L21/02255 , H01L21/187 , H01L21/2007 , H01L21/3105 , H01L21/76251 , H01L24/27 , H01L24/29 , H01L24/32 , H01L2224/27444 , H01L2224/278 , H01L2224/29188 , H01L2224/32145 , H01L2224/8309 , H01L2224/83896 , H01L2924/01013 , H01L2924/10252 , H01L2924/1032 , H01L2924/10328 , H01L2924/10329 , H01L2924/1033 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10334 , H01L2924/10335 , H01L2924/10336 , H01L2924/10346 , H01L2924/1082 , H01L2924/10821 , H01L2924/10823 , H01L2924/20106
摘要：本发明涉及第一衬底(1)的第一接触面(3)与第二衬底(2)的第二接触面(4)的粘合方法，所述方法具有下列步骤，尤其是下列过程：-在第一接触面(3)上的表面层(6)中形成储库(5)，其中表面层(6)至少主要由天然氧化物材料组成，-用第一原料物或第一组原料物至少部分填充储库(5)，-使第一接触面(3)与第二接触面(4)接触以形成预粘合连接，-在第一和第二接触面(3,4)之间形成永久粘合，其通过第一原料物与第二衬底的反应层(7)中所含的第二原料物的反应至少部分增强。

3. 发明授权

CN102290379B 半导体结构及半导体装置的制造方法有权
公开(公告)号：CN102290379B
公开(公告)日：2015-02-25
申请号：CN201010551927.6
申请日：2010-11-16
申请人：台湾积体电路制造股份有限公司
发明人：卢祯发 , 刘重希 , 余振华 , 陈威宇 , 陈正庭
IPC分类号： H01L23/29 , H01L21/48
CPC分类号： H01L24/13 , H01L23/293 , H01L23/3171 , H01L23/498 , H01L23/49816 , H01L23/49822 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0362 , H01L2224/03831 , H01L2224/03901 , H01L2224/0401 , H01L2224/05572 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/1147 , H01L2224/11622 , H01L2224/1181 , H01L2224/1183 , H01L2224/11849 , H01L2224/11901 , H01L2224/13111 , H01L2224/13116 , H01L2224/93 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/12044 , H01L2924/14 , H01L2924/1434 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H05K3/28 , H05K3/3478 , H05K3/4007 , H01L2224/11 , H01L2224/05552 , H01L2924/00 , H01L2924/1082
摘要：本发明提供具有聚合物层的半导体装置及其制造方法。用于聚合物表面的两步骤等离子体处理包含一第一等离子体工艺用以使聚合物层表面粗糙化并释放出使结构松散一产生的松散结构污染物，及一第二等离子体工艺用以使聚合物层光滑或较不粗糙。可在第一等离子体工艺及第二等离子体工艺之间使用一蚀刻工艺以移除由第一等离子体工艺所释放的污染物。在一实施例中，聚合物层的由原子力显微镜及表面积差异比率系数所量测得到的粗糙度介于约1％及约8％，且/或该聚合物层的钛表面污染物小于1％、氟表面污染物小于约1％、锡表面污染物小于约1.5％、及铅表面污染物小于约0.4％。本发明可避免及/或减少来自例如胶带工艺的污染物。

4. 发明公开

CN102290379A 半导体结构及半导体装置的制造方法有权
公开(公告)号：CN102290379A
公开(公告)日：2011-12-21
申请号：CN201010551927.6
申请日：2010-11-16
申请人：台湾积体电路制造股份有限公司
发明人：卢祯发 , 刘重希 , 余振华 , 陈威宇 , 陈正庭
IPC分类号： H01L23/29 , H01L21/48
CPC分类号： H01L24/13 , H01L23/293 , H01L23/3171 , H01L23/498 , H01L23/49816 , H01L23/49822 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0362 , H01L2224/03831 , H01L2224/03901 , H01L2224/0401 , H01L2224/05572 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/1147 , H01L2224/11622 , H01L2224/1181 , H01L2224/1183 , H01L2224/11849 , H01L2224/11901 , H01L2224/13111 , H01L2224/13116 , H01L2224/93 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/12044 , H01L2924/14 , H01L2924/1434 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H05K3/28 , H05K3/3478 , H05K3/4007 , H01L2224/11 , H01L2224/05552 , H01L2924/00 , H01L2924/1082
摘要：本发明提供具有聚合物层的半导体装置及其制造方法。用于聚合物表面的两步骤等离子体处理包含一第一等离子体工艺用以使聚合物层表面粗糙化并释放出使结构松散一产生的松散结构污染物，及一第二等离子体工艺用以使聚合物层光滑或较不粗糙。可在第一等离子体工艺及第二等离子体工艺之间使用一蚀刻工艺以移除由第一等离子体工艺所释放的污染物。在一实施例中，聚合物层的由原子力显微镜及表面积差异比率系数所量测得到的粗糙度介于约1％及约8％，且/或该聚合物层的钛表面污染物小于1％、氟表面污染物小于约1％、锡表面污染物小于约1.5％、及铅表面污染物小于约0.4％。本发明可避免及/或减少来自例如胶带工艺的污染物。

5. 发明授权

CN103477420B 永久性粘合晶片的方法有权
公开(公告)号：CN103477420B
公开(公告)日：2016-11-16
申请号：CN201180069932.6
申请日：2011-04-08
申请人： EV集团E·索尔纳有限责任公司
发明人： T.普拉赫 , K.欣格尔 , M.温普林格 , C.弗勒特根
IPC分类号： H01L21/20 , H01L21/762
CPC分类号： H01L24/83 , H01L21/0223 , H01L21/02255 , H01L21/187 , H01L21/2007 , H01L21/3105 , H01L21/76251 , H01L24/27 , H01L24/29 , H01L24/32 , H01L2224/27444 , H01L2224/278 , H01L2224/29188 , H01L2224/32145 , H01L2224/8309 , H01L2224/83896 , H01L2924/01013 , H01L2924/10252 , H01L2924/1032 , H01L2924/10328 , H01L2924/10329 , H01L2924/1033 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10334 , H01L2924/10335 , H01L2924/10336 , H01L2924/10346 , H01L2924/1082 , H01L2924/10821 , H01L2924/10823 , H01L2924/20106
摘要：本发明涉及第一衬底(1)的第一接触面(3)与第二衬底(2)的第二接触面(4)的粘合方法，所述方法具有下列步骤，尤其是下列过程：‑ 在第一接触面(3)上的表面层(6)中形成储库(5)，其中表面层(6)至少主要由天然氧化物材料组成，‑ 用第一原料物或第一组原料物至少部分填充储库(5)，‑使第一接触面(3)与第二接触面(4)接触以形成预粘合连接，‑在第一和第二接触面(3,4)之间形成永久粘合，其通过第一原料物与第二衬底的反应层(7)中所含的第二原料物的反应至少部分增强。

6. 发明公开

CN104617056A 半导体结构有权
公开(公告)号：CN104617056A
公开(公告)日：2015-05-13
申请号：CN201410825904.8
申请日：2010-11-16
申请人：台湾积体电路制造股份有限公司
发明人：卢祯发 , 刘重希 , 余振华 , 陈威宇 , 陈正庭
IPC分类号： H01L23/29 , H01L21/48
CPC分类号： H01L24/13 , H01L23/293 , H01L23/3171 , H01L23/498 , H01L23/49816 , H01L23/49822 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0362 , H01L2224/03831 , H01L2224/03901 , H01L2224/0401 , H01L2224/05572 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/1147 , H01L2224/11622 , H01L2224/1181 , H01L2224/1183 , H01L2224/11849 , H01L2224/11901 , H01L2224/13111 , H01L2224/13116 , H01L2224/93 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/12044 , H01L2924/14 , H01L2924/1434 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H05K3/28 , H05K3/3478 , H05K3/4007 , H01L2224/11 , H01L2224/05552 , H01L2924/00 , H01L2924/1082
摘要：本发明提供一种半导体结构，该半导体结构包括：一基材，具有一接触垫形成于其上；以及一聚合物层位于该基材上，该聚合物层被圖案化以暴露至少一部分的该接触垫，该聚合物层的钛表面污染物小于约1％、氟表面污染物小于约1％、锡表面污染物小于约1.5％、及铅表面污染物小于约0.4％。本发明可避免及/或减少来自例如胶带工艺的污染物。

7. 发明申请

US20120083084A1 Method of fabrication and device configuration of asymmetrical DMOSFET with schottky barrier source 审中-公开
标题翻译：具有肖特基势垒源的非对称DMOSFET的制造方法和器件配置
公开(公告)号：US20120083084A1
公开(公告)日：2012-04-05
申请号：US13199795
申请日：2011-09-08
申请人： Yongzhong Hu , Sung-Shan Tai
发明人： Yongzhong Hu , Sung-Shan Tai
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L21/28518 , H01L21/823418 , H01L29/41766 , H01L29/456 , H01L29/665 , H01L29/66507 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7839 , H01L29/7845 , H01L2924/0002 , H01L2924/00 , H01L2924/1082
摘要： A trenched semiconductor power device includes a trenched gate insulated by a gate insulation layer and surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a semiconductor substrate. The source region surrounding the trenched gate includes a metal of low barrier height to function as a Schottky source and that may include a PtSi, ErSi layer and may be a metal silicide layer having the low barrier height. A top oxide layer is disposed under a silicon nitride spacer on top of the trenched gate for insulating the trenched gate from the source region. A source contact disposed in a trench opened into the body region for contacting a body-contact dopant region and covering with a conductive metal layer such as a Ti/TiN layer.
摘要翻译：沟槽半导体功率器件包括由栅极绝缘层绝缘并被包围在设置在半导体衬底的底表面上的漏极区域上方的体区中的源极区包围的沟槽栅极。围绕沟槽栅极的源极区域包括低势垒高度的金属，用作肖特基源，并且可以包括PtSi，ErSi层，并且可以是具有低势垒高度的金属硅化物层。顶部氧化物层设置在沟槽栅极顶部的氮化硅间隔物下方，用于使沟槽栅极与源极区域绝缘。源极接触件，设置在沟槽内，开口到体区，用于接触体接触掺杂区域并用诸如Ti / TiN层的导电金属层覆盖。

8. 发明授权

US08865527B2 Lid attach process 有权
标题翻译：盖附件过程
公开(公告)号：US08865527B2
公开(公告)日：2014-10-21
申请号：US13952392
申请日：2013-07-26
申请人： Seah Sun Too , Maxat Touzelbaev , Janet Kirkland
发明人： Seah Sun Too , Maxat Touzelbaev , Janet Kirkland
IPC分类号： H01L21/00 , H01L21/50 , H01L23/10 , H01L23/42 , H01L23/00
CPC分类号： H01L21/50 , H01L23/10 , H01L23/42 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/83 , H01L24/92 , H01L2224/16225 , H01L2224/29109 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2224/83191 , H01L2224/83192 , H01L2224/83815 , H01L2224/9205 , H01L2224/92225 , H01L2924/1082 , H01L2924/15312 , H01L2924/16152 , H01L2924/16251 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
摘要： Various methods of attaching a lid to an integrated circuit substrate are provided. In one aspect, a method of attaching a lid to a substrate that has an integrated circuit positioned thereon is provided. An adhesive is applied to the substrate and an indium film is applied to the integrated circuit. The lid is positioned on the adhesive. The adhesive is partially hardened and the indium film is reflowed. The adhesive is cured.
摘要翻译：提供了将盖附接到集成电路基板的各种方法。一方面，提供了将盖附着到具有位于其上的集成电路的基板的方法。将粘合剂施加到基板上，并将铟膜施加到集成电路。盖子位于粘合剂上。粘合剂被部分硬化并且铟膜被回流。粘合剂固化。

9. 发明申请

US20070187751A1 Method of fabrication and device configuration of asymmetrical DMOSFET with Schottky barrier source 有权
标题翻译：具有肖特基势垒源的非对称DMOSFET的制造方法和器件配置
公开(公告)号：US20070187751A1
公开(公告)日：2007-08-16
申请号：US11355128
申请日：2006-02-14
申请人： Yongzhong Hu , Sung-Shan Tai
发明人： Yongzhong Hu , Sung-Shan Tai
IPC分类号： H01L29/94
CPC分类号： H01L29/7813 , H01L21/28518 , H01L21/823418 , H01L29/41766 , H01L29/456 , H01L29/665 , H01L29/66507 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7839 , H01L29/7845 , H01L2924/0002 , H01L2924/00 , H01L2924/1082
摘要： A trenched semiconductor power device includes a trenched gate insulated by a gate insulation layer and surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a semiconductor substrate. The source region surrounding the trenched gate includes a metal of low barrier height to function as a Schottky source. The metal of low barrier height further may include a PtSi or ErSi layer. In a preferred embodiment, the metal of low barrier height further includes an ErSi layer. The metal of low barrier height further may be a metal silicide layer having the low barrier height. A top oxide layer is disposed under a silicon nitride spacer on top of the trenched gate for insulating the trenched gate from the source region. A source contact disposed in a trench opened into the body region for contacting a body-contact dopant region and covering with a conductive metal layer such as a Ti/TiN layer. In a preferred embodiment, the semiconductor power device constitutes an asymmetrical double diffusion metal oxide semiconductor field effect transistor (DMOSFET) device.
摘要翻译：沟槽半导体功率器件包括由栅极绝缘层绝缘并被包围在设置在半导体衬底的底表面上的漏极区域上方的体区中的源极区包围的沟槽栅极。围绕沟槽栅极的源极区域包括具有低势垒高度的金属，用作肖特基源。低阻挡高度的金属还可以包括PtSi或ErSi层。在优选实施例中，低势垒高度的金属还包括ErSi层。低势垒高度的金属还可以是具有低势垒高度的金属硅化物层。顶部氧化物层设置在沟槽栅极顶部的氮化硅间隔物下方，用于使沟槽栅极与源极区域绝缘。源极接触件，设置在沟槽内，开口到体区，用于接触体接触掺杂区域并用诸如Ti / TiN层的导电金属层覆盖。在优选实施例中，半导体功率器件构成非对称双扩散金属氧化物半导体场效应晶体管（DMOSFET）器件。

10. 发明公开

EP2695183A1 VERFAHREN ZUM PERMANENTEN BONDEN VON WAFERN 审中-公开
标题翻译：方法永久性粘结WAFERS
公开(公告)号：EP2695183A1
公开(公告)日：2014-02-12
申请号：EP11714257.0
申请日：2011-04-08
申请人： Ev Group E. Thallner GmbH
发明人： PLACH, Thomas , HINGERL, Kurt , WIMPLINGER, Markus , FLÖTGEN, Christoph
IPC分类号： H01L21/20 , H01L21/762
CPC分类号： H01L24/83 , H01L21/0223 , H01L21/02255 , H01L21/187 , H01L21/2007 , H01L21/3105 , H01L21/76251 , H01L24/27 , H01L24/29 , H01L24/32 , H01L2224/27444 , H01L2224/278 , H01L2224/29188 , H01L2224/32145 , H01L2224/8309 , H01L2224/83896 , H01L2924/01013 , H01L2924/10252 , H01L2924/1032 , H01L2924/10328 , H01L2924/10329 , H01L2924/1033 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10334 , H01L2924/10335 , H01L2924/10336 , H01L2924/10346 , H01L2924/1082 , H01L2924/10821 , H01L2924/10823 , H01L2924/20106
摘要： The invention relates to a method for bonding a first contact surface (3) of a first substrate (1) to a second contact surface (4) of a second substrate (2), having the following steps, in particular in the following sequence: - forming a reservoir (5) in a surface layer (6) on the first contact surface (3), said surface layer (6) consisting at least predominantly of a native oxide material, - at least partly filling the reservoir (5) with a first reactant or a first group of reactants, - contacting the first contact surface (3) with the second contact surface (4) in order to form a pre-bonding connection, and - forming a permanent bond between the first and second contact surfaces (3, 4), said bond being at least partially reinforced by reacting the first reactant with a second reactant contained in a reaction layer (7) of the second substrate.

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