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    • 6. 发明申请
    • Receiving band switching circuit with reduced signal loss upon switching receiving band
    • 接收频带切换电路,在切换接收频带时信号损耗减小
    • US20060040626A1
    • 2006-02-23
    • US11205612
    • 2005-08-16
    • Masaki Yamamoto
    • Masaki Yamamoto
    • H04B1/18
    • H03J5/244H03F3/191H03F3/45085H03F3/72H03F2200/111H03F2203/45142H03F2203/7215
    • A receiving band switching circuit includes a first high frequency circuit through which a first frequency band signal passes, a second high frequency circuit through which a second frequency band signal passes, and a third high frequency circuit that is provided in the back of the first and second high frequency circuits. The third high frequency circuit is constituted by a balanced circuit having balanced input terminals. The first high frequency circuit is coupled to one of the balanced input terminals, and the second high frequency circuit is coupled to the other of the balanced input terminals. When the first frequency band signal outputted from the first high frequency circuit is inputted to the third high frequency circuit, the other of the balanced input terminals is grounded. When the second frequency band signal outputted from the second high frequency circuit is inputted to the third high frequency circuit, one of the balanced input terminals is grounded.
    • 接收频带切换电路包括第一频带信号通过的第一高频电路,第二频带信号通过的第二高频电路和设置在第一频带信号的后面的第三高频电路, 第二高频电路。 第三高频电路由具有平衡输入端子的平衡电路构成。 第一高频电路耦合到平衡输入端之一,第二高频电路耦合到平衡输入端中的另一个。 当从第一高频电路输出的第一频带信号输入到第三高频电路时,平衡输入端子中的另一个接地。 当从第二高频电路输出的第二频带信号输入到第三高频电路时,平衡输入端子之一接地。
    • 7. 发明公开
    • Frequency band switching circuit with reduced signal loss
    • Schaltkreis zur Frequenzbandumschaltung mit reduziertem Signalverlust
    • EP1628398A1
    • 2006-02-22
    • EP05017591.8
    • 2005-08-12
    • ALPS ELECTRIC CO., LTD.
    • Yamamoto, Masaki c/o Alps Electric Co., Ltd.
    • H03J5/24H03D7/14
    • H03J5/244H03F3/191H03F3/45085H03F3/72H03F2200/111H03F2203/45142H03F2203/7215
    • A receiving band switching circuit includes a first high frequency circuit through which a first frequency band signal passes, a second high frequency circuit through which a second frequency band signal passes, and a third high frequency circuit that is provided in the back of the first and second high frequency circuits. The third high frequency circuit is constituted by a balanced circuit having balanced input terminals. The first high frequency circuit is coupled to one of the balanced input terminals, and the second high frequency circuit is coupled to the other of the balanced input terminals. When the first frequency band signal outputted from the first high frequency circuit is inputted to the third high frequency circuit, the other of the balanced input terminals is grounded. When the second frequency band signal outputted from the second high frequency circuit is inputted to the third high frequency circuit, one of the balanced input terminals is grounded.
    • 接收频带切换电路包括第一频带信号通过的第一高频电路,第二频带信号通过的第二高频电路和设置在第一频带信号的后面的第三高频电路, 第二高频电路。 第三高频电路由具有平衡输入端子的平衡电路构成。 第一高频电路耦合到平衡输入端之一,第二高频电路耦合到平衡输入端中的另一个。 当从第一高频电路输出的第一频带信号输入到第三高频电路时,平衡输入端子中的另一个接地。 当从第二高频电路输出的第二频带信号输入到第三高频电路时,平衡输入端子之一接地。
    • 10. 发明授权
    • Operational amplifier compensation circuit for preventing phase reversal
and maintaining performance for inputs outside the common mode range
    • 运算放大器补偿电路,用于防止相位反转并保持输入超出共模范围的性能
    • US5418491A
    • 1995-05-23
    • US272252
    • 1994-07-07
    • Derek F. Bowers
    • Derek F. Bowers
    • H03F3/45
    • H03F3/45071H03F3/45479H03F2203/45018H03F2203/45028H03F2203/45142H03F2203/45151H03F2203/45346
    • An operational amplifier input circuit for preventing phase reversal and maintaining performance for inputs outside the common mode range includes a pair of differentially connected transistors for receiving respective differential inputs, and a folded cascode pair of transistors that are coupled to the differential transistors. A pair of resistors are connected between a reference potential and the current circuits of the differential and cascode transistors to produce resistor voltages that control the respective cascode transistors' currents. The differential transistors respond to an input by producing a forward biased parasitic diode in one of the differential transistors. A phase compensation circuit responds to the input by shifting the resistor voltage for the other differential transistor to prevent a phase reversal of the resistor voltages. A current compensation circuit responds to the input by shifting the cascode transistors' base-emitter voltages to decrease their bias currents, and thereby limit their currents to a range within which the operational amplifier does not latch up.
    • 用于防止在共模范围之外的输入的相位反转和维持性能的运算放大器输入电路包括一对差分连接的晶体管,用于接收相应的差分输入,以及耦合到差分晶体管的折叠共源共栅晶体管对。 一对电阻器连接在参考电位和差分和共源共栅晶体管的电流电路之间,以产生控制各自的共源共栅晶体管电流的电阻电压。 差分晶体管通过在差分晶体管之一中产生正向偏置寄生二极管来响应输入。 相位补偿电路通过移位另一个差分晶体管的电阻电压来响应输入,以防止电阻电压的相位反转。 电流补偿电路通过偏移共源共栅晶体管的基极 - 发射极电压来响应输入,以减小其偏置电流,从而将其电流限制在运算放大器未锁存的范围内。