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1. 发明申请

WO1993009443A1 SWITCH PROBE 审中-公开
标题翻译：开关探头
公开(公告)号：WO1993009443A1
公开(公告)日：1993-05-13
申请号：PCT/US1992009708
申请日：1992-11-05
申请人： EVERETT/CHARLES CONTACT PRODUCTS, INC.
发明人： EVERETT/CHARLES CONTACT PRODUCTS, INC. , SWART, Mark, A.
IPC分类号： G01R01/06
CPC分类号： G01R1/067
摘要： A switch probe includes an electrically conductive tubular outer receptacle (92) and a tubular barrel (94) in the receptacle. The barrel has a conductive inside surface (105) and an electrically insulative coating (104) on its outside surface in contact with the inside of the receptacle to electrically isolate the barrel from the receptacle. A terminal (106) disposed in the receptacle (92) has a conductive bearing (108) affixed to the conductive inside of the barrel and a conductive terminal pin (116) extending through the receptacle to the outside switch probe. A conductive plunger (124) travels axially in the barrel (94) against a biasing spring (134) which retains the plunger in a normally open position. A stop (136) in the wall of the barrel (94) engages the plunger to retain it at a critical distance of switch closure travel spaced from the receptacle.

2. 发明申请

WO1994029732A1 INTEGRATED CIRCUIT PROBING APPARATUS INCLUDING A CAPACITOR BYPASS STRUCTURE 审中-公开
标题翻译：集成电路检测装置，包括电容旁路结构
公开(公告)号：WO1994029732A1
公开(公告)日：1994-12-22
申请号：PCT/US1994006577
申请日：1994-06-08
申请人： GGB INDUSTRIES, INC.
发明人： GGB INDUSTRIES, INC. , BOLL, Gregory, George , BOLL Harry, Joseph
IPC分类号： G01R01/06
CPC分类号： G01R1/06772
摘要： A device for testing the performance of high speed integrated circuits (ICs) while in wafer form or separated from the wafer which includes first (14, 92) and second (12) spaced-apart probes fixedly mounted on a support member (16) for accurately positioning the first and second probes in three dimensions for contacting at least one first point (32, 34) and a second point (28), respectively, on an IC under test. The first and second probes are interconnected at a predetermined portion of their length by a capacitor means (38) which provides sufficient flexibility so as to facilitate independent movement of the first and second probes and avoid introducing parameters (e.g., inductance) which interfere with high speed testing of the IC. In one embodiment, the first probe is a transmission line probe (e.g. a coaxial line) and the second probe is a wire probe for supplying power to the second point on the IC. In another embodiment, the first and second probes are wire probes for providing a reference potential and power, respectively, to respective first and second points on the IC. The capacitor means can consist of just a foil type capacitor (80), or a capacitor (24) in series with a flexible metal strip (27) having dimensions to minimize inductance for electrically interconnecting the first and second probes. The capacitor functions to block direct current and pass A.C. signals when required.
摘要翻译：一种用于在晶片形式或与晶片分离的情况下测试高速集成电路（IC）的性能的装置，其包括固定地安装在支撑构件（16）上的第一（14,92）和第二（12）间隔开的探针，将第一和第二探针精确地定位在三维上以分别接触待测IC上的至少一个第一点（32,34）和第二点（28）。第一和第二探针在其长度的预定部分通过电容器装置（38）互连，电容器装置（38）提供足够的灵活性，以便促进第一和第二探针的独立移动，并避免引入干扰高的参数（例如电感） IC的速度测试。在一个实施例中，第一探针是传输线探针（例如同轴线），第二探针是用于向IC上的第二点供电的线探针。在另一个实施例中，第一和第二探针是用于分别向IC上的相应第一和第二点提供参考电位和功率的有线探针。电容器装置可以仅由箔型电容器（80）或与柔性金属带（27）串联的电容器（24）组成，该柔性金属带（27）的尺寸具有最小化用于电互连第一和第二探针的电感的尺寸。电容器用于阻断直流电流，并在需要时通过交流信号。

3. 发明申请

WO1989011659A1 NOVEL METHOD OF MAKING, TESTING AND TEST DEVICE FOR INTEGRATED CIRCUITS 审中-公开
标题翻译：用于集成电路的制造，测试和测试设备的新方法
公开(公告)号：WO1989011659A1
公开(公告)日：1989-11-30
申请号：PCT/US1989002088
申请日：1989-05-15
申请人： LEEDY, Glen, J.
IPC分类号： G01R01/06
CPC分类号： G01R31/31912 , G01R1/07307 , G01R1/0735 , G01R31/2831 , G03F7/70466 , G03F7/70658 , G11C29/006 , H01L22/22 , H01L2924/15192 , Y10T29/4913 , Y10T29/49155 , Y10T29/49764
摘要： Each transistor or logic unit on an integrated circuit wafer (1) is tested prior to interconnect metallization. By CAD means, the transistor or logic units placement net list is revised to substitute redundant defect-free logic units for defective ones. Then the interconnect metallization is laid down and patterned under control of a CAD means. Each die in the wafer (1) thus has its own interconnect scheme, although each die is functionally equivalent, and yields are much higher than with conventional testing at the completed circuit level. The individual transistor or logic unit testing is accomplished by a specially fabricated flexible tester surface (10) made in one embodiment or several layers of flexible silicon dioxide (104), each layer containing vias (116) and conductive traces (17) leading to thousands of microscopic metal probe points (15) on one side of the test surface. The probe points electrically contact the contacts (2) on the wafer (1) under test by fluid pressure. The tester surface traces are then connected, by means of multiplexers, to a conventional tester signal processor.

4. 发明申请

WO1983003141A1 BED-OF-PINS TEST FIXTURE 审中-公开
标题翻译： BED-OF-PINS测试夹具
公开(公告)号：WO1983003141A1
公开(公告)日：1983-09-15
申请号：PCT/US1982000269
申请日：1982-03-05
申请人： MALLOY, James, T.
IPC分类号： G01R01/06
CPC分类号： G01R1/07328
摘要： An in-circuit test fixture for use in making a non functional electrical insepection of individual components and/or circuit paths on a printed circuit board or wired backpanel assembly. The present in-circuit test fixture is cost effective and can be used when only small or moderate numbers of printed circuit boards have to be tested. The present test fixture eliminates the necessity for drilling holes in a support plate. Rather, a test head unit (11) and a transition head unit (12) are put together in modular fashion using assemblies (15) which may be positioned in stacked arrays to provide a two-dimensional series of channels (18) for support of pins (13) to provide a test head for testing a two-dimensional product and to provide a two-dimensional series of channels (18) for support of pins (44) to provide a transition head for interconnection with an electronic circuit analyzer.
摘要翻译：一种在线测试夹具，用于对印刷电路板或有线背板组件上的各个组件和/或电路路径进行非功能性电气检测。本在线测试夹具具有成本效益，只有在小数或中等数量的印刷电路板进行测试时才能使用。本测试夹具消除了在支撑板上钻孔的必要性。相反，测试头单元（11）和过渡头单元（12）以组合方式（15）放置在一起，组件（15）可以位于堆叠阵列中，以提供二维系列的通道（18），用于支撑（13），以提供用于测试二维产品的测试头，并提供用于支撑销（44）的二维系列通道（18），以提供用于与电子电路分析仪互连的转换头。

5. 发明申请

WO1997043652A1 PROBE NEEDLE 审中-公开
标题翻译：探针
公开(公告)号：WO1997043652A1
公开(公告)日：1997-11-20
申请号：PCT/JP1997001582
申请日：1997-05-12
申请人： ICT CO., LTD. , KATO, Masatoshi
发明人： ICT CO., LTD.
IPC分类号： G01R01/06
CPC分类号： G01R1/067
摘要： A probe needle includes a flange disposed around a probe needle main body, a movable first pin disposed at one of the ends of the probe needle main body and a second pin disposed at the other end of the probe needle main body, wherein the needle is slidably supported by a probe needle positioning substrate. In the probe needle of the present invention having such a construction, no load acts on the probe needle positioning substrate at any point of time of probing. Accordingly, the substrate can be made thin and light-weight and because a pin coming into contact with a tested side is immovable, a play becomes unnecessary, and probing can be made with an extremely high level of positioning accuracy.
摘要翻译：探针包括设置在探针主体周围的凸缘，设置在探针主体的一端的可动第一销和设置在探针主体另一端的第二销，由探针定位基板可滑动地支撑。在具有这种结构的本发明的探针中，在探测的任何时间点都不会对探针定位基板施加负载。因此，基板可以制造得薄且重量轻，并且由于与测试侧接触的销不可移动，所以不需要播放，并且可以以极高的定位精度进行探测。

6. 发明申请

WO1997039361A1 CONDUCTIVE CONTACT UNIT SYSTEM 审中-公开
标题翻译：导电接触单元系统
公开(公告)号：WO1997039361A1
公开(公告)日：1997-10-23
申请号：PCT/JP1997001237
申请日：1997-04-10
申请人： NHK SPRING CO., LTD. , KAZAMA, Toshio
发明人： NHK SPRING CO., LTD.
IPC分类号： G01R01/06
CPC分类号： G01R1/06733 , G01R1/06716 , G01R1/06722 , G01R1/06772 , G01R1/07307
摘要： In a conductive contact unit, the base-side end section of a compression spring which urges a contact itself or a needle-like contact is housed in a supporting hole bored into a substrate. One end of the internal conductor of the substrate is exposed at the bottom of the supporting hole and the exposed part of the conductor is electrically connected to the base-side end section of the compression spring. Therefore, no electrical connector is required and the electrical resistance between the internal conductor of the substrate and contact is minimized. In order to achieve excellent electrical contact, it is possible to solder the base-side end section of the compression spring to the exposed part of the internal conductor having a flat section or recessed section.
摘要翻译：在导电接触单元中，将接触本身或针状接触的压缩弹簧的底侧端部容纳在钻入基板中的支撑孔中。基板的内部导体的一端在支撑孔的底部露出，导体的露出部电连接到压缩弹簧的基端侧端部。因此，不需要电连接器，并且使衬底内部导体和触点之间的电阻最小化。为了实现优异的电接触，可以将压缩弹簧的底侧端部焊接到具有平坦部分或凹部的内部导体的露出部分。

7. 发明申请

WO1997027489A1 IMPROVED METHOD AND APPARATUS FOR SCRUBBING THE BOND PADS OF AN INTEGRATED CIRCUIT DURING WAFER SORT 审中-公开
标题翻译：改进方法和装置，用于在WAFER SORT中滚动集成电路的焊盘
公开(公告)号：WO1997027489A1
公开(公告)日：1997-07-31
申请号：PCT/US1996011183
申请日：1996-07-01
申请人： INTEL CORPORATION , KISER, David, Kerry , HYATT, Robert, J.
发明人： INTEL CORPORATION
IPC分类号： G01R01/06
CPC分类号： G01R1/07342 , G01R3/00 , G01R31/2886 , G01R31/2887 , Y10T436/114998
摘要： An improved method and apparatus for removing the dielectric layer on bond pads of an integrated circuit includes a probe card (40, 60) with a plurality of probes (49, 62) and a piezoelectric actuator assembly (43, 70). Electrical contact is achieved between the probes (49, 62) and bond pads by using the actuator assembly (43, 70) to induce a small and rapid cyclic movement between the probes (49, 62) and the bond pads such that the probes (49, 62) pierce a dielectric layer on the surface of the bond pads.
摘要翻译：用于去除集成电路的接合焊盘上的电介质层的改进的方法和装置包括具有多个探针（49,62）和压电致动器组件（43,70）的探针卡（40,60）。通过使用致动器组件（43,70）在探针（49,62）和接合垫之间实现电接触，以在探针（49,62）和接合垫之间引起小的和快速的循环运动，使得探针 49,62）在接合焊盘的表面上刺穿介电层。

8. 发明申请

WO1995029405A1 DEVICE FOR CONNECTING A VOLTAGE DISPLAY APPARATUS TO A SENSOR 审中-公开
标题翻译：设备用于连接电压显示设备与传感器
公开(公告)号：WO1995029405A1
公开(公告)日：1995-11-02
申请号：PCT/EP1995001469
申请日：1995-04-19
申请人： KARL PFISTERER ELEKTROTECHNISCHE SPEZIALARTIKEL GMBH & CO. KG
发明人： KARL PFISTERER ELEKTROTECHNISCHE SPEZIALARTIKEL GMBH & CO. KG , SCHUSTER, Martin , RAMMLER, Wolfgang , RINGERING, Theo , JAKOBS, Hans , ZUBER, Wolfgang , VOGT, Stefanie
IPC分类号： G01R01/06
CPC分类号： G01R15/16 , F02P2017/006
摘要： A device for connecting a voltage display apparatus to a sensor which is capacitively coupled to a conductor of a high-voltage power supply system comprises a circuit (2) which has an input for the electrical voltage delivered by the sensor and an output for connecting the voltage display apparatus. The circuit (2) is accommodated in a closed housing (1) of a preassembled module. Emerging from the housing (1) is a coaxial cable (5) which is connected at one end to the input of the circuit (2) and which is provided at its other end with a connector plug (8). An earthing connection (6) is connected to a ground point of the circuit (2). At least one socket-contact pair (3, 4), forming the output of the circuit (2), is used to produce a plug connection with the voltage display apparatus.
摘要翻译：一种用于电压显示装置连接到耦合到高电压电源系统传感器的一个导体上的kapazititiv装置具有具有用于由所述传感器电压传递的输入端的电路装置（2），和用于连接电压指示器的输出。所述的电路装置（2）是在包括一个预制的模块的封闭壳体（1）。从壳体（1），其连接在其一端与电路装置的输入端（2）同轴电缆（5）熄灭时，为其另一端设置一插头（8）。到电路装置的一个地面点（2）的接地连接件（6）连接。电路装置（2）形成容器对中的至少一个输出端（3，4）被用于产生与所述电压显示装置的插塞连接。

9. 发明申请

WO1980000101A1 PROBE AND INTERFACE DEVICE FOR INTEGRATED CIRCUIT WAFERS 审中-公开
标题翻译：用于集成电路的探头和接口装置
公开(公告)号：WO1980000101A1
公开(公告)日：1980-01-24
申请号：PCT/US1979000444
申请日：1979-06-21
申请人： CERPROBE CORP
发明人： CERPROBE CORP , SCHWARTZ R , ORMAN G , TARZWELL J
IPC分类号： G01R01/06
CPC分类号： G01R1/07342
摘要： Probe device for testing integrated circuit wafers. The probe device comprises a support means (3), which has a plurality of metallized portions (10), and an aperture (12). A plurality of "L" shaped holding means (16), each having a thin metallized edge surface (18), are coupled to metallized portions of the support means so that a portion of the holding means extends into the aperture, The flat surface (28) of said holding means has conductor and resistant patterns (Figure 7) for the construction of active and passive hybrid circuitry to be used as buffers, terminations, loads and a general interface between the circuit under test and the circuit testing apparatus. A needle-like probe member (20) is coupled to a second metallized edge surface (30) of each of the holding means. These probe members are coupled to the holding means in such a manner that their curved portions extend into the support means aperture so as to electrically contact a circuit wafer placed therein, and electrically couple the circuit wafer to the support means and subsequently to the hybrid circuitry present on the support means. The hybrid circuitry may then be coupled to the support means and subsequently to the circuit testing apparatus via the first metallized edge surface as described above.
摘要翻译：用于测试集成电路晶圆的探针装置。探针装置包括具有多个金属化部分（10）和孔（12）的支撑装置（3）。多个具有薄的金属化边缘表面（18）的“L”形保持装置（16）被耦合到支撑装置的金属化部分，使得保持装置的一部分延伸到孔中。平坦表面所述保持装置具有用于构造用作缓冲器，端子，负载的有源和无源混合电路的导体和电阻图案（图7），以及被测电路与电路测试装置之间的通用接口。针状探针构件（20）联接到每个保持装置的第二金属化边缘表面（30）。这些探针构件以这样的方式联接到保持装置，使得它们的弯曲部分延伸到支撑装置孔中，以便电接触放置在其中的电路晶片，并且将电路晶片电耦合到支撑装置，然后电耦合到混合电路出现在支持手段上。混合电路然后可以如上所述经由第一金属化边缘表面耦合到支撑装置并随后耦合到电路测试装置。

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