专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明公开

EP3373147A1 A UNIVERSAL PLATFORM FOR TESTING OF A PLURALITY OF ELECTRONIC DEVICES AND A METHOD THEREFOR 审中-公开
公开(公告)号：EP3373147A1
公开(公告)日：2018-09-12
申请号：EP17159956.6
申请日：2017-03-08
申请人： Vestel Elektronik Sanayi ve Ticaret A.S.
发明人： GEBIZLI, Ceren Sahin , ÖCAL, Ömür
IPC分类号： G06F11/36 , G06F11/22
CPC分类号： G06F11/3664 , G06F11/22
摘要： The present invention refers to a universal platform for testing of a plurality electronic of devices and a method therefor. The platform of the present invention comprises test controller, and a command transmitting unit coupled with the test controller. The command transmitting unit is configured to transmit test signals to the device being tested. A response capturing unit records the response of the device after receiving the test signals. A command transmitting and log reading unit facilitates the changing of state of the device being tested to allow the testing of the device under different states. The platform and the method of the present invention facilitate the concurrent testing of the software modules as well as the hardware components of the device being tested.

2. 发明公开

EP3356931A1 RUNTIME VERIFICATION USING EXTERNAL DEVICE 审中-公开
公开(公告)号：EP3356931A1
公开(公告)日：2018-08-08
申请号：EP15905606.8
申请日：2015-09-30
申请人： Hewlett-Packard Development Company, L.P.
发明人： JEANSONNE, Jeffrey Kevin , ALI, Vali , PLAQUIN, David , VILLATEL, Maugan
IPC分类号： G06F9/22 , G06F11/36
CPC分类号： G06F21/572 , G06F8/66 , G06F9/44 , G06F9/4401 , G06F11/22 , G06F11/36 , G06F21/562 , G06F21/575
摘要： Examples herein disclose a processor-based computing system. The system comprises at least one processor, a non-volatile memory comprising a basic input output system (BIOS), wherein the BIOS creates a data structure and sets up at least one verification software component executed by the processor, a controller communicatively linked to the at least one verification software component, and a memory comprising a system management memory coupled to the at least one processor and code which is executable by the processor-based system to cause the processor to validate the BIOS during a runtime of the processor-based system using the at least one verification software component and the controller.

3. 发明公开

EP3249534A1 VEHICLE CONTROL DEVICE 审中-公开
标题翻译：车辆控制装置
公开(公告)号：EP3249534A1
公开(公告)日：2017-11-29
申请号：EP16740009.2
申请日：2016-01-12
申请人： Hitachi Automotive Systems, Ltd.
发明人： FUKUDA Takeshi , NARISAWA Fumio , EBINA Tomohito , KOMATSU Hiroaki
IPC分类号： G06F11/22 , G06F9/445 , G06F11/14
CPC分类号： G06F11/22 , G06F9/445 , G06F11/14 , G06F11/1417
摘要： The present invention provides a vehicle control device with which, even when an abnormality is detected in a core in a multi-core processor, it is possible to reduce the time needed until the core in which the abnormality is detected restarts and re-executes application software. The present invention is characterized by being provided with: a diagnostic means for carrying out a diagnostic process when starting a processor core, the diagnostic process including hardware diagnosis performed by hardware and software diagnosis performed using software after the hardware diagnosis; and a diagnostic process information change processing means for changing the method for executing the diagnostic process when all of the processor cores are started and when one of the processor cores is restarted.
摘要翻译：本发明提供一种车辆控制装置，利用该车辆控制装置，即使当在多核处理器中在核心中检测到异常时，也可以减少直到检测到异常的核心重新开始并重新执行应用所需的时间软件。本发明的特征在于包括：诊断装置，用于在启动处理器核时执行诊断处理，所述诊断处理包括通过在硬件诊断之后使用软件执行的硬件和软件诊断执行的硬件诊断; 以及诊断过程信息改变处理装置，用于当所有处理器内核都启动并且其中一个处理器内核被重新启动时改变用于执行诊断过程的方法。

4. 发明公开

EP3040730A2 APPARATUS FOR TESTING SEMICONDUCTOR CHIP HAVING BUILT-IN SELF TEST FUNCTION 审中-公开
标题翻译：用于测试具有内置自测功能的半导体芯片的设备
公开(公告)号：EP3040730A2
公开(公告)日：2016-07-06
申请号：EP15185743.0
申请日：2015-09-17
申请人： iA, Inc.
发明人： BAE, Jungyang
IPC分类号： G01R31/3187 , G06F11/00 , G01R31/3183
CPC分类号： G01R31/31724 , G01R31/3177 , G01R31/318342 , G01R31/3187 , G06F11/22
摘要： The present invention relates to an apparatus for testing a semiconductor chip in which a built-in self test function is embedded, the apparatus including a plurality of error generators inserted between a plurality of function blocks performing a function of the semiconductor chip to input an error signal into the function blocks; and an external error controller for controlling the error generators through external input and output pins of the semiconductor chip and confirming the built-in self test function of the semiconductor chip by monitoring an output signal of the function blocks, and thus an error detection function embedded in the semiconductor chip can be correctly verified.
摘要翻译：本发明涉及一种用于测试其中嵌入有自测功能的半导体芯片的设备，所述设备包括插入在执行半导体芯片的功能以输入错误的多个功能块之间的多个错误发生器信号进入功能块; 以及外部错误控制器，用于通过半导体芯片的外部输入和输出引脚来控制错误发生器，并且通过监视功能块的输出信号来确认半导体芯片的内置自测试功能，并且因此嵌入错误检测功能在半导体芯片上可以正确验证。

5. 发明公开

EP2718819A4 OPERATOR MESSAGE COMMANDS FOR TESTING A COUPLING FACILITY 审中-公开
标题翻译：操作者麦克白LE LE TEN UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG
公开(公告)号：EP2718819A4
公开(公告)日：2015-01-07
申请号：EP12797394
申请日：2012-06-06
申请人： IBM
发明人： SHAW THOMAS , GOSS STEVEN NEIL , ELKO DAVID
IPC分类号： G06F11/30 , G06F11/22
CPC分类号： G06F11/008 , G06F11/22 , G06F11/2294
摘要： A facility is provided to enable operator message commands from multiple, distinct sources to be provided to a coupling facility of a computing environment for processing. These commands are used, for instance, to perform actions on the coupling facility, and may be received from consoles coupled to the coupling facility, as well as logical partitions or other systems coupled thereto. Responsive to performing the commands, responses are returned to the initiators of the commands.
摘要翻译：提供了一种设施，以使来自多个不同来源的操作员消息命令能够提供给用于处理的计算环境的耦合设备。例如，这些命令用于对耦合设施执行动作，并且可以从耦合到耦合设施的控制台以及与其耦合的逻辑分区或其它系统接收。响应于执行命令，响应将返回给命令的启动器。

6. 发明公开

EP2163910A2 A system and method for testing and configuring semiconductor functional circuits 审中-公开
标题翻译：系统和Verfahren zum Testen und Konfigurieren von Halbleiterfunktionsschaltungen
公开(公告)号：EP2163910A2
公开(公告)日：2010-03-17
申请号：EP09178413.2
申请日：2004-09-13
申请人： Nvidia Corporation
发明人： The designation of the inventor has not yet been filed
IPC分类号： G01R31/3185
CPC分类号： G01R31/318544 , G01R31/31704 , G01R31/3185 , G01R31/318566 , G06F11/22 , G06F11/2289 , G06F11/267
摘要： Disclosed here are systems and methods to enable configuration of functional components in integrated circuits. A present invention system and method can flexibly change the operational characteristics of functional components in an integrated circuit die based upon a variety of factors including manufacturing defects, compatibility characteristics, performance requirements, and system health (e.g., the number of components operating properly). Functional component operational behavior is tested and analyzed at various levels of configuration abstraction and component organization (e.g., topological inversion analysis). The testing and analysis can be performed in parallel on numerous functional components. Functional component configuration related information is presented in a graphical user interface (GUI) at various levels of granularity and in real time.; The graphical user interface can facilitate user interaction in recognizing failure patterns, production test tuning and field configuration algorithm adjustment. The testing and analysis information can also be organized in a variety of convenient database formats.
摘要翻译：这里公开了能够在集成电路中配置功能部件的系统和方法。本发明的系统和方法可以基于包括制造缺陷，兼容性特性，性能要求和系统健康性（例如，正确操作的组件的数量）的各种因素灵活地改变集成电路管芯中的功能部件的操作特性。在各种级别的配置抽象和组件组织（例如，拓扑反演分析）中测试和分析功能组件操作行为。测试和分析可以在许多功能组件上并行执行。功能组件配置相关信息以不同的粒度级别和实时呈现在图形用户界面（GUI）中。图形用户界面可以方便用户在识别故障模式，生产测试调整和现场配置算法调整时的交互。测试和分析信息也可以以各种方便的数据库格式进行组织。

7. 发明公开

EP1632780A2 Monitoring control apparatus 失效
标题翻译：监控控制设备
公开(公告)号：EP1632780A2
公开(公告)日：2006-03-08
申请号：EP05077739.0
申请日：1996-12-25
申请人： KOKEN CO., LTD. , Nagoya, Mitsugu , Sakamaki, Kazumi
发明人： Nagoya, Mitsugu , Sakamaki, Kazumi
IPC分类号： G01R31/28
CPC分类号： G06F11/0796 , G01R31/31728 , G01R31/318511 , G01R31/318544 , G01R31/31855 , G01R31/318555 , G06F11/22 , G06F11/327
摘要： A monitoring control device which tests integrated circuits which are mounted on a CPU substrate (4) or control substrate (5) and support a boundary scan test method and also tests the connecting relations of the integrated circuit by means of a boundary scan controller substrate (7) as shown in the figure. When the abnormality of the CPU substrate (4) or control substrate (5) is found, the device actuates an alarm device (9) to issue an alarm. In addition, when the abnormality gives a serious influence on the operation of a robot (3) to be monitored and controlled, the device prevents the robot from running out of control by turning off the main power unit (6) of the robot (2) from the fail-safe point of view.
摘要翻译：一种监视控制装置，用于测试安装在CPU基板（4）或控制基板（5）上的集成电路，并且支持边界扫描测试方法，并且还通过边界扫描控制器基板测试集成电路的连接关系如图所示。当发现CPU基板（4）或控制基板（5）的异常时，设备启动警报装置（9）发出警报。此外，当该异常给要监视和控制的机器人（3）的操作带来严重影响时，该装置通过关闭机器人（2）的主动力单元（6）来防止机器人失控）从故障安全的角度出发。

8. 发明授权

EP0636973B1 Processor interface chip for dual-microprocessor processor system 失效
标题翻译：双微处理器系统处理器接口芯片
公开(公告)号：EP0636973B1
公开(公告)日：2005-08-31
申请号：EP94304669.8
申请日：1994-06-27
申请人： Hewlett-Packard Development Company, L.P.
发明人： Rahman, Mizanur Mohammed , Sabernick, Fred C. , Sprouse, Jeff A. , Grosz, Martin Jiri , Fu, Peter , Rector, Russell Mark
IPC分类号： G06F9/445 , G06F12/02 , G06F11/00 , G06F13/24 , G06F13/16 , G06F11/22
CPC分类号： G06F11/1654 , G06F9/4403 , G06F11/1637 , G06F11/22 , G06F12/0223 , G06F12/0862 , G06F2212/6022
摘要： A processor interface chip and a maintenance diagnostic chip are provided coupled with two microprocessors designed to be run in tandem. The processor interface chip includes logic for interfacing between the microprocessors and a main memory, logic for pipelining multiple microprocessor requests between the microprocessors and main memory, logic for prefetching data before a microprocessor issues a read request, logic for allowing a boot to occur from code anywhere in physical memory without regard to the microprocessors' fixed memory location for boot code, and logic for intelligently limiting the flow of interrupt information over a processor bus between the microprocessors and the processor interface chip. The maintenance diagnostic chip includes logic to halt either of the microprocessors if an error is detected, and read out the state of the microprocessors and a secondary cache attached to the microprocessors, before the state of the microprocessors at the time of the fault changes to a different state which might hide evidence of the cause of the fault.

9. 发明授权

EP0909416B1 METHOD AND APPARATUS FOR PROVIDING IMPROVED DIAGNOSTIC FUNCTIONS IN A COMPUTER SYSTEM 失效
标题翻译：方法和装置提供改进的诊断功能，在计算机系统中
公开(公告)号：EP0909416B1
公开(公告)日：2004-08-25
申请号：EP97932317.7
申请日：1997-06-27
申请人： INTEL CORPORATION
发明人： EDWARDS, David, A. , HASBUN, Robert, N.
IPC分类号： G06F11/00 , G06F11/08 , G06F11/34 , G06F11/14 , G06F11/16 , G06F11/22
CPC分类号： G06F11/22
摘要： A memory module including a flash EEPROM memory array (17) designed to be joined to a memory bus (16) of a computer (10), BIOS processes including system status test processes stored in the array (17), diagnostic processes stored in the array (17) to provide data indicating malfunctions in the computer (10), accessing processes stored in the array (17) for calling the system status test processes and the diagnostic processes even though the computer fails to boot, and communication processes stored in the array (17) for transferring results produced by the system status test processes and the diagnostic processes for use in servicing the computer (10).

10. 发明授权

EP0855038B1 Diagnostic de réseaux de composants, avec modélisation par bandes 失效
标题翻译：使用磁带模拟设备的网络诊断
公开(公告)号：EP0855038B1
公开(公告)日：2003-08-27
申请号：EP96916208.0
申请日：1996-05-15
申请人： THALES SYSTEMES AEROPORTES S.A.
发明人： TAILLIBERT, Patrick , LOIEZ, Etienne
IPC分类号： G01R31/28
CPC分类号： G01R31/2834 , G01R31/2846 , G06F11/22

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式