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1. 发明公开

EP4345898A2 HALBBRÜCKEN-LEISTUNGSVORRICHTUNG UND HALBBRÜCKEN-LEISTUNGSMODUL 审中-公开
公开(公告)号：EP4345898A2
公开(公告)日：2024-04-03
申请号：EP23199644.8
申请日：2023-09-26
申请人： ZF Friedrichshafen AG
发明人： HU, Zhiwu , DONG, Tianyuan , LI, Zhao
IPC分类号： H01L25/07 , H01L23/498
摘要： In der vorliegenden Anmeldung werden eine Halbbrücken-Leistungsvorrichtung und ein Halbbrücken-Leistungsmodul bereitgestellt. Die Halbbrücken-Leistungsvorrichtung umfasst: ein Modulsubstrat, das eine obere Oberfläche mit einer Kupferbeschichtung aufweist, wobei die Kupferbeschichtung diskret einen ersten Halbbrückenbereich, einen zweiten Halbbrückenbereich, einen ersten Halbbrückenabführbereich und einen zweiten Halbbrückenabführbereich umfasst. Dabei befinden sich der erste Halbbrückenabführbereich und der zweite Halbbrückenabführbereich jeweils an beiden Enden des Modulsubstrats. Ein erster Halbbrücken-Leistungschip und ein zweiter Halbbrücken-Leistungschip liegen jeweils an dem ersten Halbbrückenbereich und dem zweiten Halbbrückenbereich an. Eine erste Leistungsanschlussklemme, eine zweite Leistungsanschlussklemme und eine dritte Leistungsanschlussklemme sind mit dem ersten Halbbrückenbereich, dem zweiten Halbbrückenbereich, dem ersten Halbbrücken-Leistungschip und dem zweiten Halbbrücken-Leistungschip verbunden, um damit einen Leistungskreis der Halbbrücken-Leistungsvorrichtung zu bilden. Der erste Halbbrücken-Leistungschip und der zweite Halbbrücken-Leistungschip sind jeweils mit dem ersten Halbbrückenabführbereich bzw. dem zweiten Halbbrückenabführbereich verbunden, um damit einen Signalregelkreis für die Halbbrücken-Leistungsvorrichtung zu bilden.

2. 发明公开

EP4325722A3 SEMICONDUCTOR DEVICE, COMMUNICATION APPARATUS, AND PRODUCING METHOD THEREOF 审中-公开
公开(公告)号：EP4325722A3
公开(公告)日：2024-04-03
申请号：EP23185835.8
申请日：2023-07-17
申请人： Suzhou HunterSun Electronics Co., Ltd.
发明人： LIU, Hairui , LAI, Zhiguo , YANG, Qinghua
IPC分类号： H03H9/02 , H03H9/05 , B81B7/00 , H01L23/31 , H01L23/498 , H01L23/538
摘要： The present disclosure relates to a semiconductor device, a communication apparatus and a producing method thereof. The semiconductor device includes: a first functional module arranged on a first substrate (100y) and comprising a chip (101), an electrical connection component and a sealing ring (102), where the sealing ring (102) surrounds the chip (101), and the chip (101) is electrically connected to the electrical connection component; a second functional module comprising a packaging substrate (200), where the packaging substrate comprises at least two metal layers and a dielectrical layer between the metal layers; a third functional module comprising multiple redistribution lines (302; 3021,3022,3024,3025) and multiple micro through holes (303; 3031,3032,3033) used for electrical connection between the first functional module and the second functional module, where the electrical connection component in the first functional module is electrically connected to the third functional module; and a second substrate (400), where the second substrate (400) is sealed with the first substrate (100). At least two of the multiple redistribution lines intersect with each other, and at least one of the micro through holes is electrically connected to the second functional module through at least two different redistribution lines.

3. 发明授权

EP4113600B1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE 有权
公开(公告)号：EP4113600B1
公开(公告)日：2024-04-03
申请号：EP22181327.2
申请日：2022-06-27
发明人： VILLA, Riccardo , DE SANTA, Matteo
IPC分类号： H01L23/495 , H01L23/498

4. 发明公开

EP4343843A1 MULTI-DIE PACKAGE ON PACKAGE 审中-公开
公开(公告)号：EP4343843A1
公开(公告)日：2024-03-27
申请号：EP23195359.7
申请日：2023-09-05
申请人： MediaTek Inc.
发明人： PENG, Tai-Hao , HUANG, Yao-Tsung
IPC分类号： H01L25/10 , H01L23/498 , H01L23/538 , H01L25/065
摘要： A multi-die package on package includes a bottom package having a first device die and a second device die. A top package including a memory die is stacked on the bottom package.

5. 发明公开

EP4340017A1 PACKAGING DEVICE, PACKAGING MODULE, AND ELECTRONIC DEVICE 审中-公开
公开(公告)号：EP4340017A1
公开(公告)日：2024-03-20
申请号：EP23197330.6
申请日：2023-09-14
申请人： Huawei Digital Power Technologies Co., Ltd.
发明人： YU, Bo , WANG, Xudong , LI, Xin
IPC分类号： H01L23/373 , H01L23/538 , H01L23/498 , H05K7/20 , H01L25/07 , H02M7/487 , H02M7/00 , H01L23/48
摘要： This application provides a packaging device. The packaging device includes a first circuit substrate and a second circuit substrate that are electrically connected. The first circuit substrate includes a first line layer and a first insulation layer that are sequentially stacked, and a first electronic component is disposed on the first circuit substrate. The second circuit substrate includes a second line layer and a second insulation layer that are sequentially stacked, and a second electronic component is disposed on the second circuit substrate. A thermal conductivity of the first insulation layer is higher than a thermal conductivity of the second insulation layer. This application further provides a packaging module and an electronic device in which the packaging device is used. According to the packaging device in this application, the first insulation layer and the second insulation layer with different thermal conductivities are targetedly configured, and layouts of the first circuit substrate and the second circuit substrate are flexible. Therefore, a heat dissipation capability of the packaging device can be improved to a maximum extent, and comprehensive costs of the packaging device can be reduced.

6. 发明公开

EP4334976A1 INTEGRATED PASSIVE DEVICE (IPD) COMPONENTS AND A PACKAGE AND PROCESSES IMPLEMENTING THE SAME 审中-公开
公开(公告)号：EP4334976A1
公开(公告)日：2024-03-13
申请号：EP22799665.9
申请日：2022-05-06
申请人： Wolfspeed, Inc.
发明人： MARBELL, Marvin , PUN, Arthur , FISHER, Jeremy , ANDRE, Ulf , KOMPOSCH, Alexander
IPC分类号： H01L23/498 , H01L23/66

7. 发明公开

EP4333053A2 MICROELECTRONIC ASSEMBLIES HAVING POWER DELIVERY ROUTED THROUGH A BRIDGE DIE 审中-公开
公开(公告)号：EP4333053A2
公开(公告)日：2024-03-06
申请号：EP23187423.1
申请日：2023-07-25
申请人： INTEL Corporation
发明人： Marin, Brandon , Ndukum, Tchefor , Darmawikarta, Kristof , Li, Sheng , Pietambaram, Srinivas , Duan, Gang , Nad, Suddhasattwa , Ecton, Jeremy
IPC分类号： H01L23/498
摘要： Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a conductive pad having a first surface, an opposing second surface, and lateral surfaces extending between the first and second surfaces; a conductive via coupled to the first surface of the conductive pad; a liner on the second surface and on the lateral surfaces of the conductive pad, wherein a material of the liner includes nickel, palladium, or gold; a microelectronic component having a conductive contact; and an interconnect electrically coupling the conductive contact of the microelectronic component and the liner on the second surface of the conductive pad, wherein a material of the interconnect includes nickel or tin.

8. 发明授权

EP3754698B1 SEMICONDUCTOR PACKAGE STRUCTURE 有权
公开(公告)号：EP3754698B1
公开(公告)日：2024-02-28
申请号：EP20178978.1
申请日：2020-06-09
发明人： LIN, Tzu-Hung , LIEN, Yung-Chang
IPC分类号： H01L23/00 , H01L23/16 , H01L23/31 , H01L23/538 , H01L25/065 , H05K1/02 , H01L23/13 , H01L23/367 , H01L23/498

9. 发明公开

EP4300551A3 ALIGNMENT VIA-PAD AND VIA-PLANE STRUCTURES 审中-公开
公开(公告)号：EP4300551A3
公开(公告)日：2024-02-14
申请号：EP23169683.2
申请日：2023-04-25
申请人： Intel Corporation
发明人： Strong, Veronica , ALEKSOV, Aleksandar
IPC分类号： H01L21/48 , H01L23/498 , H05K1/11 , H01L23/538
摘要： Disclosed herein are via-trace-via structures with improved alignment, and related devices and methods. For example, in some embodiments, an integrated circuit (IC) package support may include a conductive structure having an aperture; a conductive via at least partially nested in the aperture in the conductive structure; and a conductive bridge spanning between and in contact with the conductive structure and the conductive via. In some embodiments, the conductive structure is a conductive pad. In some embodiments, the conductive structure is a conductive plane.

10. 发明公开

EP4266366A3 MULTICHIP MODULE 审中-公开
公开(公告)号：EP4266366A3
公开(公告)日：2024-01-24
申请号：EP23165321.3
申请日：2023-03-30
申请人： Avago Technologies International Sales Pte. Limited
发明人： ZHANG, Dingyou , WADE, Christopher Paul , SUN, Li , CHUNG, Chris
IPC分类号： H01L25/065 , H01L23/498 , H01L23/552 , H01L25/10 , H01L21/56 , H01L21/60 , H01L25/16
摘要： An apparatus includes a first substrate comprising one or more first interconnection layers, wherein a first die is coupled to a first side of the first substrate, and a second substrate comprising one or more second interconnection layers. The second die may be coupled to a first side of the second substrate, and a third die is coupled to a second side of the second substrate. The first substrate and the second substrate may be stacked together.

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