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1. 发明授权

EP3661112B1 LOW-COMPLEXITY PRIMARY SYNCHRONIZATION SEQUENCES 有权
公开(公告)号：EP3661112B1
公开(公告)日：2022-07-27
申请号：EP19204735.5
申请日：2008-04-30
发明人： ONGGOSANUSI, Eko, N. , DABAK, Anand, G.
IPC分类号： H04L7/02 , H04B7/26 , H04B7/005 , H04J11/00 , H04J13/00

2. 发明公开

EP4018523A1 METHOD AND APPARATUS FOR SYNCHRONISATION AND DATA TRANSMISSION 审中-公开
公开(公告)号：EP4018523A1
公开(公告)日：2022-06-29
申请号：EP20764726.4
申请日：2020-08-20
申请人： Oxford University Innovation Limited
发明人： FROST, Damien , FROST, Tim
IPC分类号： H02J3/36 , H02M7/483 , H04J3/06 , H04L7/02

3. 发明授权

EP3576354B1 SLAVE NODE FOR A CAN BUS NETWORK 有权
公开(公告)号：EP3576354B1
公开(公告)日：2021-07-28
申请号：EP19162971.6
申请日：2019-03-14
发明人： ANANDAN, Swaminatha Vijayaraj , MUTH, Matthias Berthold
IPC分类号： H04L12/40 , H04L7/02 , G06F1/04

4. 发明授权

EP2166695B1 RECEPTION APPARATUS 有权
公开(公告)号：EP2166695B1
公开(公告)日：2020-11-04
申请号：EP08711035.9
申请日：2008-02-08
申请人： Thine Electronics, Inc.
发明人： OMOTE, Kazuyuki , SAITO, Ryutaro
IPC分类号： H04L7/02 , H03L7/00

5. 发明公开

EP3661112A1 LOW-COMPLEXITY PRIMARY SYNCHRONIZATION SEQUENCES 审中-公开
公开(公告)号：EP3661112A1
公开(公告)日：2020-06-03
申请号：EP19204735.5
申请日：2008-04-30
申请人： Texas Instruments Incorporated
发明人： ONGGOSANUSI, Eko, N. , DABAK, Anand, G.
IPC分类号： H04L7/02 , H04B7/26 , H04B7/005 , H04J11/00 , H04J13/00
摘要： Embodiments of the present disclosure provide a transmitter, a receiver and methods of operating a transmitter and a receiver. In one embodiment, a user equipment (110) comprises a receiver (111) configured to receive a primary synchronization signal, and a unit (112) configured to identify one of a plurality of primary communication signals corresponding to a communication cell location of the receiver, wherein at least two of a group of multiple sequences have complex conjugate symmetry in the time domain. In another embodiment a corresponding method of operating a receiver in a user equipment (110) is provided.

6. 发明授权

EP2296279B1 Clock data recovery with selectable phase control 有权
公开(公告)号：EP2296279B1
公开(公告)日：2019-08-14
申请号：EP10172886.3
申请日：2002-08-23
申请人： Rambus Inc.
发明人： Chang, Kun-Yung K. , Wei, Jason C. , Perino, Donald V.
IPC分类号： H03L7/085 , H04L7/02 , H03L7/07 , H03L7/08 , H03L7/081 , H03L7/089 , H03L7/091 , H04L7/00 , H04L7/033 , H04L7/10

7. 发明公开

EP3476076A2 ENHANCED FINE TIMING MEASUREMENT PROTOCOL NEGOTIATION 审中-公开
公开(公告)号：EP3476076A2
公开(公告)日：2019-05-01
申请号：EP17820686.8
申请日：2017-03-30
申请人： Intel IP Corporation
发明人： SEGEV, Jonathan , ABRAMOVSKY, Benny , STACEY, Robert
IPC分类号： H04L7/02 , H04L29/06

8. 发明公开

EP3285448A4 SYMBOL SYNCHRONIZATION METHOD AND APPARATUS 有权
公开(公告)号：EP3285448A4
公开(公告)日：2018-04-25
申请号：EP15891500
申请日：2015-05-12
申请人： HUAWEI TECH CO LTD
发明人： LI XIAODONG , LIU QIAO
IPC分类号： H04L7/02 , H04L27/00
CPC分类号： H04L27/2665 , H04L7/0029 , H04L27/00 , H04L27/0014 , H04L2027/0069
摘要： The present invention provides a symbol synchronization method and apparatus. By means of the symbol synchronization method and apparatus, a timing location is adjusted outside an adaptive loop. In addition, the adaptive loop proceeds to according to an original function of the adaptive loop. That is, the timing location is stabilized to an initial symbol-synchronization location, and the timing location is then further corrected and adjusted. Therefore, impact of an error of a timing location on symbol synchronization is eliminated by correcting the timing location, and positioning accuracy of a symbol-synchronization location is improved.

9. 发明公开

EP3255819A1 REDUCING TIMING UNCERTAINTY 审中-公开
标题翻译：减少时序不确定性
公开(公告)号：EP3255819A1
公开(公告)日：2017-12-13
申请号：EP16173500.6
申请日：2016-06-08
申请人： Nokia Solutions and Networks Oy
发明人： Liang, Zheng , Tirkkonen, Markku Antero , Hyyrylainen, Pasi Petteri
IPC分类号： H04J3/06 , H04L7/00 , H04L7/02
CPC分类号： H03M13/251 , H03M2201/4216 , H03M2201/422 , H04B1/38 , H04J3/0647 , H04L7/005 , H04L7/02
摘要： Solution for reducing timing uncertainty is provided. The solution comprises means (402) for receiving data in a first clock domain; means (402) for selecting in the first clock domain a data unit to be a frame starting point and transmitting the information on the selection to a frame counter in a second clock domain (408); means (410) for performing to the data in a coding/decoding unit coding or decoding, the coding/decoding unit comprising several clock domains; means (408) for obtaining at the output of the coding/decoding unit the position of the selected frame starting point; and means (408) for determining timing of the correct frame starting point of the coded/decoded data utilising the obtained position of the selected frame starting point and the information in the frame counter.
摘要翻译：提供了减少定时不确定性的解决方案该解决方案包括用于在第一时钟域中接收数据的装置（402）用于在所述第一时钟域中选择作为帧起始点的数据单元并且将关于所述选择的所述信息发送到第二时钟域中的帧计数器的装置（408）; 用于在编码/解码单元编码或解码中对所述数据执行的装置（410），所述编码/解码单元包括若干时钟域; 用于在编码/解码单元的输出处获得所选帧开始点的位置的装置（408）以及用于利用所获得的所选帧开始点的位置和所述帧计数器中的信息来确定编码/解码数据的正确帧起始点的定时的装置（408）。

10. 发明授权

EP2850395B1 VERFAHREN ZUR ENTSTÖRUNG EINES ABTASTPROZESSES SOWIE EINE VORRICHTUNG ZUR DURCHFÜHRUNG DES VERFAHRENS 有权
标题翻译： PROCESS FOR的扫描过程抑制和具体实施该方法的装置
公开(公告)号：EP2850395B1
公开(公告)日：2017-01-04
申请号：EP13713143.9
申请日：2013-03-25
申请人： Robert Bosch GmbH
发明人： WUCHERT, Thomas , KALISCH, Matthias
IPC分类号： G01D5/244 , H03M1/12 , G01D5/12 , G01D5/14 , H03M1/16 , G01D3/032 , H03M1/06 , H04B15/00 , H04L7/02 , H04L27/10
CPC分类号： H04B15/00 , G01D3/032 , H03M1/0656 , H03M1/1245 , H04L7/02 , H04L27/10

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