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91. 发明授权

US07217988B2 Bipolar transistor with isolation and direct contacts 有权
标题翻译：双极晶体管具有隔离和直接接触
公开(公告)号：US07217988B2
公开(公告)日：2007-05-15
申请号：US10709905
申请日：2004-06-04
申请人： David C. Ahlgren , Gregory G. Freeman , Francois Pagette , Christopher M. Schnabel , Anna W. Topol
发明人： David C. Ahlgren , Gregory G. Freeman , Francois Pagette , Christopher M. Schnabel , Anna W. Topol
IPC分类号： H01L27/082
CPC分类号： H01L29/66242 , H01L29/7378
摘要： A bipolar transistor has a collector that is contacted directly beneath a base-collector junction by metallization to reduce collector resistance. A conventional reach-through and buried layer, as well as their associated resistance, are eliminated. The transistor is well isolated, nearly eliminating well-to-substrate capacitance and device-to-device leakage current. The structure provides for improved electrical performance, including improved fT, Fmax and drive current.
摘要翻译：双极晶体管具有通过金属化直接接触基极 - 集电极结下方的集电极，以降低集电极电阻。消除了常规的通孔和掩埋层以及它们的相关电阻。晶体管非常隔离，几乎消除了良好的衬底电容和器件到器件的漏电流。该结构提供了改进的电性能，包括改进的f T，F max和驱动电流。

92. 发明申请

US20070102789A1 BIPOLAR TRANSISTOR AND BACK-GATED TRANSISTOR STRUCTURE AND METHOD 审中-公开
标题翻译：双极晶体管和后置栅极结构和方法
公开(公告)号：US20070102789A1
公开(公告)日：2007-05-10
申请号：US11164071
申请日：2005-11-09
申请人： Andres Bryant , William Clark , Edward Nowak
发明人： Andres Bryant , William Clark , Edward Nowak
IPC分类号： H01L27/082
CPC分类号： H01L21/84 , H01L21/8249 , H01L27/0623 , H01L27/1203 , H01L29/0804 , H01L29/7327 , H01L29/78648
摘要： A structure is disclosed including a substrate including an insulator layer on a bulk layer, and a bipolar transistor in a first region of the substrate, the bipolar transistor including at least a portion of an emitter region in the insulator layer. Another disclosed structure includes an inverted bipolar transistor in a first region of a substrate including an insulator layer on a bulk layer, the inverted bipolar transistor including an emitter region, and a back-gated transistor in a second region of the substrate, wherein a back-gate conductor of the back-gated transistor and at least a portion of the emitter region are in the same layer of material. A method of forming the structures including a bipolar transistor and back-gated transistor together is also disclosed.
摘要翻译：公开了一种结构，其包括在体层上包括绝缘体层的衬底和在衬底的第一区域中的双极晶体管，所述双极晶体管包括绝缘体层中的发射极区域的至少一部分。另一公开的结构包括在衬底的第一区域中的反相双极晶体管，其包括体层上的绝缘体层，反相双极晶体管包括发射极区域，以及位于衬底的第二区域中的后栅极晶体管，其中背面背栅式晶体管的栅极导体和发射极区域的至少一部分处于相同的材料层中。还公开了一种将双极晶体管和后栅极晶体管组合在一起的结构的方法。

93. 发明申请

US20070085167A1 Heterojunction bipolar transistor and method for manufacturing same 失效
标题翻译：异质结双极晶体管及其制造方法
公开(公告)号：US20070085167A1
公开(公告)日：2007-04-19
申请号：US10564085
申请日：2004-07-06
申请人： Tohru Saitoh , Takahiro Kawashima , Ken Idota , Yoshihiko Kanzawa , Teruhito Ohnishi
发明人： Tohru Saitoh , Takahiro Kawashima , Ken Idota , Yoshihiko Kanzawa , Teruhito Ohnishi
IPC分类号： H01L27/082
CPC分类号： H01L29/66242 , H01L29/7378
摘要： A bipolar transistor 120 comprises a substrate 1, a intrinsic base region 11 and an extrinsic base region 12. The intrinsic base region 11 comprises a silicon buffer layer 109 comprised of silicon which is formed on the substrate 1, and a composition-ratio graded base layer 111 which is formed on the silicon buffer layer and comprises silicon and at least germanium and where a composition ratio of the germanium to the silicon varies in a thickness direction of the composition-ratio graded base layer 111. The extrinsic base region 12 comprises an extrinsic base formation layer 113 comprised of silicon which is formed on the substrate and adjacent to the silicon buffer layer. And the thickness of the extrinsic base formation layer 113 is not less than 40 nm.
摘要翻译：双极晶体管120包括衬底1，本征基极区域11和外部基极区域12。本征基极区域11包括由衬底1上形成的硅构成的硅缓冲层109和形成在硅缓冲层上并包含硅和至少锗的组成比梯度的基底层111，其中组成锗与硅的比例在组成比梯度的基底层111的厚度方向上变化。外部基极区域12包括由硅构成的非本征基底形成层113，其形成在衬底上并与硅缓冲层相邻。外部基底形成层113的厚度不小于40nm。

94. 发明申请

US20070075399A1 Method of forming a self-aligned transistor and structure therefor 有权
标题翻译：形成自对准晶体管的方法及其结构
公开(公告)号：US20070075399A1
公开(公告)日：2007-04-05
申请号：US11238868
申请日：2005-09-30
申请人： Gordon Grivna
发明人： Gordon Grivna
IPC分类号： H01L27/082
CPC分类号： H01L29/66272 , H01L21/28525 , H01L21/76895 , H01L21/8249 , H01L27/0623 , H01L29/41708 , H01L29/42304
摘要： In one embodiment, a transistor is formed to use two conductors to make electrical connection to one of the active regions of the transistor.
摘要翻译：在一个实施例中，形成晶体管以使用两个导体来与晶体管的一个有源区电连接。

95. 发明授权

US07173320B1 High performance lateral bipolar transistor 有权
标题翻译：高性能横向双极晶体管
公开(公告)号：US07173320B1
公开(公告)日：2007-02-06
申请号：US10427777
申请日：2003-04-30
申请人： Irfan Rahim
发明人： Irfan Rahim
IPC分类号： H01L29/00 , H01L29/82 , H01L43/00 , H01L27/082
CPC分类号： H01L29/7394 , H01L29/0696 , H01L29/7317 , H01L29/78624
摘要： A lateral bipolar transistor includes an emitter region, a base region, a collector region, and a gate disposed over the base region. A bias line is connected to the gate for applying a bias voltage thereto during operation of the transistor. The polarity of the bias voltage is such as to create an accumulation layer in the base under the gate. The accumulation layer provides a low-resistance path for the transistor base current, thus reducing the base resistance of the transistor.
摘要翻译：横向双极晶体管包括发射极区域，基极区域，集电极区域和设置在基极区域上的栅极。偏置线连接到栅极，以在晶体管的工作期间施加偏置电压。偏置电压的极性使得在栅极下方的基极中产生积聚层。累积层为晶体管基极电流提供低电阻通路，从而降低晶体管的基极电阻。

96. 发明申请

US20070007626A1 High-power-gain, bipolar transistor amplifier 有权
标题翻译：大功率增益双极晶体管放大器
公开(公告)号：US20070007626A1
公开(公告)日：2007-01-11
申请号：US11178644
申请日：2005-07-11
申请人： Zhenqiang Ma , Ningyue Jiang
发明人： Zhenqiang Ma , Ningyue Jiang
IPC分类号： H01L27/082 , H01L27/102
CPC分类号： H03F3/189 , H03F1/22
摘要： Improved radio frequency gain in a silicon-based bipolar transistor may be provided by adoption of a common-base configuration, preferably together with excess doping of the base to provide extremely low base resistances boosting performance over similar common-emitter designs.
摘要翻译：可以通过采用共基极配置来提供硅基双极晶体管中的改进的射频增益，优选地与基极的过量掺杂一起提供极低的基极电阻，以提高性能比类似的共发射极设计。

97. 发明申请

US20070001262A1 SOI bipolar transistors with reduced self heating 失效
标题翻译：具有自加热降低的SOI双极晶体管
公开(公告)号：US20070001262A1
公开(公告)日：2007-01-04
申请号：US11173540
申请日：2005-07-01
申请人： Qiqing Ouyang , Kai Xiu
发明人： Qiqing Ouyang , Kai Xiu
IPC分类号： H01L27/082
CPC分类号： H01L21/84 , H01L21/8249 , H01L27/0623 , H01L27/1203
摘要： A bipolar transistor includes a collector located over a substrate; and a heat conductive path connecting the substrate to the collector. The heat conductive path is filled with a heat conductive material such as metal or polysilicon. In one embodiment the heat conductive path runs through the collector to extract heat from the collector and drain it to the substrate. In alternate embodiments, the transistor can be a vertical or a lateral device. According to another embodiment, an integrated circuit using BiCMOS technology comprises pnp and npn bipolar transistors with heat conduction from collector to substrate and possibly p-channel and n-channel MOSFETS. According to yet another embodiment, a method for making a transistor in an integrated network comprises steps of etching the heat conducting path through the collector and to the substrate and fill with heat conductive material to provide a heat drain for the transistor comprising the collector.
摘要翻译：双极晶体管包括位于衬底上方的集电极; 以及将基板连接到集电体的导热路径。导热路径填充有诸如金属或多晶硅的导热材料。在一个实施例中，导热路径穿过收集器以从集电器提取热量并将其排出到基板。在替代实施例中，晶体管可以是垂直或横向装置。根据另一实施例，使用BiCMOS技术的集成电路包括具有从集电极到衬底以及可能的p沟道和n沟道MOSFET的热传导的pnp和npn双极晶体管。根据另一个实施例，一种用于在集成网络中制造晶体管的方法包括以下步骤：蚀刻通过集电器和衬底的导热路径，并填充导热材料，以为包括集电器的晶体管提供散热。

98. 发明授权

US07157786B2 Structure of a bipolar junction transistor and fabricating method thereof 有权
标题翻译：双极结型晶体管的结构及其制造方法
公开(公告)号：US07157786B2
公开(公告)日：2007-01-02
申请号：US11164882
申请日：2005-12-08
申请人： Ching-Hung Kao
发明人： Ching-Hung Kao
IPC分类号： H01L27/082
CPC分类号： H01L29/66287 , H01L21/8249 , H01L29/0821 , H01L29/732
摘要： A method for fabricating a bipolar junction transistor on a wafer is disclosed. The wafer has a N-type doped area and a plurality of isolated structures. A protection layer is formed on the wafer and portions of the protection layer are then removed to expose portions of the doped area. A P-type epitaxy layer is formed on the protection layer and the first doped area and then portions of the epitaxy layer and the protection layer are removed. An insulation layer is formed and at least a collector opening and emitter opening are formed within the insulation layer. Following that, a polysilicon layer is formed to fill the collector opening and the emitter opening. A spacer is formed beside the polysilicon layer and the epitaxy layer followed by performing a self-aligned silicidation process to form a salicide layer on the polysilicon layer and portions of the epitaxy layer.
摘要翻译：公开了一种在晶片上制造双极结晶体管的方法。晶片具有N型掺杂区域和多个隔离结构。在晶片上形成保护层，然后去除保护层的部分以暴露掺杂区域的部分。在保护层和第一掺杂区域上形成P型外延层，然后去除外延层和保护层的部分。形成绝缘层，并且至少在绝缘层内形成集电极开口和发射极开口。之后，形成多晶硅层以填充集电极开口和发射极开口。在多晶硅层和外延层旁边形成间隔物，然后进行自对准硅化工艺，以在多晶硅层和外延层的部分上形成自对准硅化物层。

99. 发明申请

US20060267146A1 Multilayered emitter window for bipolar junction transistor 审中-公开
标题翻译：双极结晶体管的多层发射极窗口
公开(公告)号：US20060267146A1
公开(公告)日：2006-11-30
申请号：US11436390
申请日：2006-05-18
申请人： Noel Hoilien , Kyeonglan Rho , Daniel Fertig , Steven Kosier
发明人： Noel Hoilien , Kyeonglan Rho , Daniel Fertig , Steven Kosier
IPC分类号： H01L27/082 , H01L27/102
CPC分类号： H01L29/732 , H01L29/0804 , H01L29/66272
摘要： An emitter window for a bipolar junction transistor includes a first emitter window layer adjacent to and in contact with a base region, a second emitter window layer adjacent to and in contact with the first layer and a third emitter window layer adjacent to and in contact with the second layer.
摘要翻译：用于双极结型晶体管的发射极窗口包括与基极区域相邻并与其接触的第一发射极窗口层，与第一层相邻并与其接触的第二发射极窗口层和与第一发射极层相邻并与之接触的第三发射极窗口层第二层。

100. 发明授权

US07132729B2 Semiconductor device and method of manufacturing same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07132729B2
公开(公告)日：2006-11-07
申请号：US10929475
申请日：2004-08-31
申请人： Hirokazu Fujimaki
发明人： Hirokazu Fujimaki
IPC分类号： H01L27/082
CPC分类号： H01L27/0664 , H01L21/76227
摘要： The present invention provides a semiconductor device formed with a diode array together with bipolar transistors, which is capable of preventing the occurrence of crystal defects developed in cross patterns in deep trench regions and improving device yields, and a method of manufacturing the semiconductor device. A semiconductor device includes a LOCOS oxide film which isolates a plurality of diodes in an X direction, and deep trenches which isolate the plurality of diodes in a Y direction. The depth of each of the deep trenches is deeper than a high density layer embedded below a collector layer of each bipolar transistor. A shallow trench may be used as an alternative to the LOCOS oxide film.
摘要翻译：本发明提供了一种半导体器件，其形成有二极管阵列和双极晶体管，其能够防止在深沟槽区域中以交叉图案形成的晶体缺陷的出现并提高器件产量，以及制造半导体器件的方法。半导体器件包括在X方向隔离多个二极管的LOCOS氧化物膜和在Y方向上隔离多个二极管的深沟槽。每个深沟槽的深度比嵌入每个双极晶体管的集电极层下方的高密度层更深。可以使用浅沟槽作为LOCOS氧化物膜的替代物。

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