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    • 14. 发明授权
    • Simulation using parallel processors
    • 仿真使用并行处理器
    • US09087166B2
    • 2015-07-21
    • US14262815
    • 2014-04-28
    • ROCKETICK TECHNOLOGIES LTD.
    • Uri TalShay MizrachiTomer Ben-David
    • G06F17/50G06F9/45
    • G06F17/5022G06F8/45G06F17/505
    • A method for design simulation includes partitioning a verification task of a design (100) into a first plurality of atomic Processing Elements (PEs-108) having execution dependencies (112), each execution dependency specifying that a respective first PE is to be executed before a respective second PE. The method further includes computing an order for executing the PEs on a multiprocessor device (32), which includes a second plurality of processors (44) operating in parallel and schedules the PEs for execution by the processors according to a built-in scheduling policy. The order induces concurrent execution of the PEs by different ones of the processors without violating the execution dependencies, irrespective of the scheduling policy. The PEs are executed on the processors in accordance with the computed order and the scheduling policy, to produce a simulation result. A performance of the design is verified responsively to the simulation result.
    • 一种用于设计模拟的方法包括将设计(100)的验证任务划分为具有执行依赖性(112)的第一多个原子处理元件(PE-108),每个执行依赖性指定相应的第一个PE将在 相应的第二个PE。 该方法还包括计算用于在多处理器设备(32)上执行PE的顺序,该多处理器设备(32)包括并行操作的第二多个处理器(44),并根据内置调度策略调度PE以供处理器执行。 该顺序引起不同处理器的PE的并发执行,而不违反执行依赖性,而与调度策略无关。 PE根据计算的顺序和调度策略在处理器上执行,以产生模拟结果。 响应于仿真结果验证设计的性能。