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21. 发明授权

US07397740B2 Method and recording device capable of selecting a write strategy applied to an optical disc 失效
标题翻译：能够选择应用于光盘的写入策略的方法和记录装置
公开(公告)号：US07397740B2
公开(公告)日：2008-07-08
申请号：US10904759
申请日：2004-11-26
申请人： Chia-Chung Chen , Chih-Ching Yu
发明人： Chia-Chung Chen , Chih-Ching Yu
IPC分类号： G11B7/00
CPC分类号： G11B7/1267 , G11B7/00456 , G11B2007/0006
摘要： A method and a recording device capable of selecting a preferred write strategy from a plurality of write strategies for an optical disc. The optical disc contains a characteristic value. The method includes: reading the characteristic value from the optical disc; selecting a first write strategy from the write strategies to be an active test write strategy according to the characteristic value of the optical disc; writing a test pattern onto the optical disc according to the active test write strategy; and reading the written test pattern from the optical disc, checking if the written test pattern satisfies a corresponding criterion, and utilizing the active test write strategy to be the preferred write strategy if the written test pattern satisfies the corresponding criterion.
摘要翻译：一种能够从光盘的多个写入策略中选择优选的写入策略的方法和记录装置。光盘包含特征值。该方法包括：从光盘读取特征值; 根据光盘的特征值，从写入策略中选择第一写策略作为主动测试写策略; 根据主动测试写入策略将测试图案写入光盘; 并从光盘读取写入的测试图形，检查写入的测试图案是否满足相应的标准，如果写入的测试图案满足相应的标准，则使用主动测试写入策略作为首选写入策略。

22. 发明授权

US07394241B2 Method and apparatus for testing power switches using a logic gate tree 失效
标题翻译：使用逻辑门树测试电源开关的方法和装置
公开(公告)号：US07394241B2
公开(公告)日：2008-07-01
申请号：US11380217
申请日：2006-04-26
申请人： Yu-Wen Tsai
发明人： Yu-Wen Tsai
IPC分类号： G01R31/28
CPC分类号： G01R31/2617
摘要： A method for testing power switches using a logic gate tree, the method includes providing a logic gate tree electrically connected to a plurality of power switches, each output node of the plurality of power switches being electrically connected to a corresponding input node of a logic gate of the logic gate tree; applying a pattern of control signals to the plurality of power switches for controlling on-off states of the plurality of power switches; and determining whether an output voltage signal of an output node of the logic gate tree matches a predetermined value corresponding to the pattern of control signals.
摘要翻译：一种使用逻辑门树测试功率开关的方法，所述方法包括提供电连接到多个功率开关的逻辑门树，所述多个功率开关中的每个输出节点电连接到逻辑门的对应输入节点的逻辑门树; 对所述多个电源开关施加控制信号的模式，以控制所述多个电力开关的开 - 关状态; 以及确定逻辑门树的输出节点的输出电压信号是否与对应于控制信号的模式的预定值相匹配。

23. 发明授权

US07327551B2 Capacitor structure 失效
标题翻译：电容结构
公开(公告)号：US07327551B2
公开(公告)日：2008-02-05
申请号：US11561416
申请日：2006-11-19
申请人： Chih-Fu Chien , Chao-Chi Lee , Cheng-Chung Chou
发明人： Chih-Fu Chien , Chao-Chi Lee , Cheng-Chung Chou
IPC分类号： H01G4/00
CPC分类号： H01L28/60 , H01L23/50 , H01L23/5223 , H01L27/1085 , H01L2924/0002 , H01L2924/00
摘要： A capacitor structure is provided. The capacitor structure is configured in a substrate. The capacitor structure includes a plurality of electrode sets, at least a first conductive plug and at least a second conductive plug. The electrode sets correspond with each other and are disposed in different layers of the substrate. Each electrode set includes a first electrode and a second electrode surrounding the former. In addition, the first conductive plug and the second conductive plug are disposed between two adjacent electrode sets. First electrodes of two adjacent electrode sets correspond with each other and are electrically connected to each other through the first conductive plug. Similarly, second electrodes of two adjacent electrode sets correspond with each other and are electrically connected to each other through the second conductive plug.
摘要翻译：提供电容器结构。电容器结构配置在基板中。电容器结构包括多个电极组，至少第一导电插头和至少第二导电插头。电极组彼此对应并且设置在衬底的不同层中。每个电极组包括第一电极和围绕前者的第二电极。此外，第一导电插塞和第二导电插头设置在两个相邻的电极组之间。两个相邻电极组的第一电极彼此对应并且通过第一导电插塞彼此电连接。类似地，两个相邻电极组的第二电极彼此对应并且通过第二导电插塞彼此电连接。

24. 发明授权

US07039415B2 Flexible scheme for configuring “Traffic volume measurement reporting criteria” 有权
公开(公告)号：US07039415B2
公开(公告)日：2006-05-02
申请号：US10428550
申请日：2003-05-02
申请人： Huan-Yueh Chen
发明人： Huan-Yueh Chen
IPC分类号： H04Q7/20
CPC分类号： H04W24/00
摘要： This invention increases the communication efficiency between the network and the mobile device by eliminating repetitive contents within one communication message in a wireless communication system. Meantime, this invention provides improvements while maintains the existing message data structure intact.

25. 发明授权

US06888392B2 Method and related circuitry for buffering output signals of a chip with even number driving circuits 有权
标题翻译：用于缓冲具有偶数驱动电路的芯片的输出信号的方法和相关电路
公开(公告)号：US06888392B2
公开(公告)日：2005-05-03
申请号：US10249750
申请日：2003-05-05
申请人： Yi-Kuang Wei , Chia-Chun Huang , Chi-Ren Kuo
发明人： Yi-Kuang Wei , Chia-Chun Huang , Chi-Ren Kuo
IPC分类号： H03K19/00 , H03K19/003 , H03K19/0175 , H04L25/02 , G06F1/04 , H03K3/00
CPC分类号： H04L25/0286 , H03K19/0005 , H03K19/00323 , H03K19/00369 , H03K19/017545 , H04L25/0278
摘要： A method and related circuitry for driving output signals of a chip is disclosed. The method includes driving output signals with an even number of inverter driving circuits, and keeping an equivalent load of each inverter of the driving circuits substantially identical by keeping impedances of each driving circuit substantially identical.
摘要翻译：公开了一种用于驱动芯片的输出信号的方法和相关电路。该方法包括驱动具有偶数个反相器驱动电路的输出信号，并且通过保持每个驱动电路的阻抗基本相同，保持驱动电路的每个反相器的等效负载基本相同。

26. 发明授权

US06882896B2 Method for classifying a substrate 有权
标题翻译：基材分级方法
公开(公告)号：US06882896B2
公开(公告)日：2005-04-19
申请号：US10064484
申请日：2002-07-18
申请人： Chin-Lung Ting , Chun-Bin Wen
发明人： Chin-Lung Ting , Chun-Bin Wen
IPC分类号： G02F1/1333 , G01N21/47 , G01N21/84 , G01N21/95 , G01N21/958 , G06F7/00 , G06F17/30 , G06T7/00 , H01L21/304 , H01L21/66 , G06F19/00
CPC分类号： G01N21/958 , G01N21/8422 , G01N2021/9513 , G06T7/0006 , G06T2207/30141 , G06T2207/30148
摘要： A method for classifying a substrate first provides the substrate and its corresponding inspection map. Then, a database having a plurality of specification data is provided. After that, the inspection map is compared with each of the specification data so as to find the specification data coinciding with the inspection map. Finally, the substrate is defined according to the layout of active areas coinciding with the inspection map, and then the substrate is classified and stored.
摘要翻译：用于分类基板的方法首先提供基板及其对应的检查图。然后，提供具有多个指定数据的数据库。之后，将检查图与每个规格数据进行比较，以找到与检查图一致的规格数据。最后，根据与检查图重合的有效区域的布局来定义基板，然后对基板进行分类和存储。

27. 发明授权

US10877082B2 Converter valve fault warning method and system 有权
公开(公告)号：US10877082B2
公开(公告)日：2020-12-29
申请号：US15739750
申请日：2017-03-01
申请人： NR ELECTRIC CO., LTD , NR ENGINEERING CO., LTD
发明人： Shengfu Gao , Taixun Fang , Yongping Wang , Xiang Zhang , Weiming Pan , Ming Yuan , Guqing Zhou
IPC分类号： G01R31/08 , H02M7/757 , H02M1/32 , H02J13/00 , H02M1/088
CPC分类号： G01R31/08 , H02J13/00 , H02M1/32 , H02M7/7575 , H02M1/088 , Y02E60/00 , Y04S10/20
摘要： Within a predetermined time range, record time information of status indication signals fed back by thyristor control units (TCU) of a converter valve. Perform statistics and comparison of the pieces of time information using a bias statistics method. Mark a thyristor level whose bias exceeds a preset value. And determine a probability of failure in the thyristor according to the marking result.

28. 发明授权

US10715813B2 Method and apparatus for performing block prediction search based on restored sample values derived from stored sample values in data buffer 有权
公开(公告)号：US10715813B2
公开(公告)日：2020-07-14
申请号：US14534184
申请日：2014-11-06
申请人： MEDIATEK INC.
发明人： Tung-Hsing Wu , Kun-Bin Lee
IPC分类号： H04N19/14 , H04N19/15 , H04N19/105 , H04N19/159 , H04N19/593 , H04N19/423 , H04N19/176 , H04N19/50
摘要： A block prediction search method includes at least following steps: utilizing a data buffer to store bit-depth reduced sample values of a plurality of samples in a first pixel line; detecting occurrence of an edge in the first pixel line according to restored sample values derived from stored sample values in the data buffer; and determining a block prediction vector for a pixel group in a second pixel line different from the first pixel line, wherein the block prediction vector is determined based at least partly on a last edge count value indicative of a number of samples in the first pixel line that have gone by since the edge occurs.

29. 发明授权

US10697106B2 Washing machine and washing drum thereof 有权
公开(公告)号：US10697106B2
公开(公告)日：2020-06-30
申请号：US15806345
申请日：2017-11-08
申请人： TCL HOME APPLIANCES (HEFEI) CO., LTD.
发明人： Lei Xi , Chouguo Zhou , Fei Zhao , Jian Wang , Xiaowei Xie
IPC分类号： D06F37/14 , D06F23/04 , D06F37/26 , D06F37/12 , D06F37/30 , D06F39/08 , D06F31/00 , D06F17/10
摘要： Provided are a washing machine and a washing drum thereof. The washing drum comprises a large container and a small container. The small container is detachably disposed in the large container, and an opening of the small container and an opening of the large container are positioned opposite to each other. In a washing process, clothes needing special care can be placed in the small container so that water in the large container does not enter the small container, thereby realizing separating washing of the clothes needing special care. If there are no clothes needing special care, the small container can be detached from the large container to perform a normal washing operation.

30. 发明授权

US10644701B1 Input and output circuit and self-biased circuit thereof 有权
公开(公告)号：US10644701B1
公开(公告)日：2020-05-05
申请号：US16566887
申请日：2019-09-11
申请人： Faraday Technology Corp.
发明人： Huang-Shiang Su , Chi-Sheng Liao , Jeng-Huang Wu
IPC分类号： H03K19/003 , H03K19/007 , H03K3/356
CPC分类号： H03K19/007 , H03K3/356113 , H03K19/00315
摘要： An input output circuit and a self-biased circuit are provided. The self-biased circuit includes a tracking circuit, a biasing control circuit and first to fourth transistors. The tracking circuit receives a first power voltage, and generates a bias voltage according to variation of the first power voltage. The biasing control circuit generates a first control signal, a second control signal and a third control signal according to the first power voltage and a voltage on a pad. The first transistor is coupled to the pad and controlled by the first control signal. The second transistor is controlled by the second control signal to provide a bias voltage. The third transistor is coupled to the pad and controlled by the third control signal and generates a fourth control signal according to the voltage on the pad. The fourth transistor is controlled by the fourth control signal to generate the bias voltage.

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