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21. 发明申请

US20170220868A1 OBJECT DETECTION DEVICE 审中-公开
公开(公告)号：US20170220868A1
公开(公告)日：2017-08-03
申请号：US15486807
申请日：2017-04-13
申请人： MegaChips Corporation
发明人： Taizo UMEZAKI , Yuki HARAGUCHI , Hiromu HASEGAWA
IPC分类号： G06K9/00 , G06T7/215
CPC分类号： G06K9/00744 , G06K9/00362 , G06K9/00805 , G06T7/215 , G06T2207/20081 , G06T2207/20084 , G06T2207/30196 , G06T2207/30252 , G08G1/166
摘要： The object detection device 1 detects an object being recognized (such as a pedestrian) in a frame image 42, and identifies an area 42a where a detected object which is detected in the frame image 42 is present. A frame image 43 is input after the frame image 42. The object detection device 1 detects the object being recognized in the frame image 43, and identifies an area 43a where a detected object which is detected in the frame image 43 is present. When a distance from center coordinates 42b of the area 42a to center coordinates 43b of the area 43a is smaller than a reference distance, the object detection device 1 determines that the detected object which is detected in the frame image 43 is identical to the detected object which is detected in the frame image 42.

22. 发明授权

US09716561B2 Communication system, and communication device 有权
公开(公告)号：US09716561B2
公开(公告)日：2017-07-25
申请号：US14360349
申请日：2012-10-30
申请人： MegaChips Corporation
发明人： Koji Sugimoto
IPC分类号： H04J3/06 , H04W28/18 , H04W56/00
CPC分类号： H04J3/0605 , H04W28/18 , H04W56/002
摘要： A communication device has a transmission/reception unit and a communication processing unit. The transmission/reception unit is configured to conform to a plurality of communication methods. The communication processing unit selects one of the plurality of communication methods with respect to each time slot based on device time in accordance with a predetermined selection rule, to perform communication via the transmission/reception unit by the selected communication method. In time synchronization master processing, a first communication device gives device time of the device itself as a time stamp to a time synchronization request signal and transmits the time synchronization request signal. In time synchronization slave processing, a second communication device receives the time synchronization request signal and calibrates the device time of the device itself based on the time stamp in the time synchronization request signal.

23. 发明申请

US20170205463A1 SCAN TEST CIRCUIT, SCAN TEST METHOD, AND METHOD OF DESIGNING SCAN TEST CIRCUIT 审中-公开
公开(公告)号：US20170205463A1
公开(公告)日：2017-07-20
申请号：US15411259
申请日：2017-01-20
申请人： MegaChips Corporation
发明人： Hiroyuki Nakamura
IPC分类号： G01R31/3177 , G06F17/50 , G01R31/317
CPC分类号： G01R31/318536 , G01R31/31707 , G01R31/3177 , G01R31/318541 , G01R31/318544 , G01R31/318547 , G01R31/318555 , G01R31/318572 , G01R31/318588 , G06F17/505 , G06F17/5072 , G06F17/5077 , G06F2217/14
摘要： A scan test circuit includes a scan chain formed of a plurality of sub-scan chains, an input distribution circuit, and an output compression circuit. With the use of a bypass circuit, a plurality of sub-scan chains are formed in a compression scan mode by connecting scan cell circuits of a high confidentiality-requiring circuit among a plurality of scan cell circuits included in an internal circuit, and a plurality of sub-scan chains are formed in a non-compression scan mode by bypassing the scan cell circuits of the high confidentiality-requiring circuit.

24. 发明授权

US09679358B2 Pixel interpolation processing apparatus, imaging apparatus, interpolation processing method, and integrated circuit 有权
公开(公告)号：US09679358B2
公开(公告)日：2017-06-13
申请号：US15171953
申请日：2016-06-02
申请人： MegaChips Corporation
发明人： Junji Moriguchi , Hiromu Hasegawa
IPC分类号： G06T3/40 , H04N5/369 , H04N9/04
CPC分类号： G06T3/4015 , G06T3/4007 , H04N5/3696 , H04N9/045 , H04N2209/046
摘要： A pixel interpolation processing apparatus and an image capturing apparatus are provided that are capable of performing a pixel interpolation process properly even when the pattern of color filter array is unknown. An imaging apparatus includes an imaging unit having a single-chip image sensor having four-color filter array for obtaining an image signal, and the imaging apparatus uses pixel data for a surrounding area around a target pixel to calculate a plurality of sets of correlation values in two directions orthogonal to each other, and determines the correlation direction based on these correlation values. The imaging apparatus obtains first to fourth color component pixel values for the target pixel relying on the fact that the high-frequency components of pixel signals in a direction orthogonal to a direction with high correlation have high correlation regardless of the color of color filters, thus allowing for performing pixel interpolation processing properly even if the four colors of color filters are unknown.

25. 发明申请

US20170150078A1 IMAGE SENSOR 审中-公开
公开(公告)号：US20170150078A1
公开(公告)日：2017-05-25
申请号：US15422015
申请日：2017-02-01
申请人： Technology hub Inc. , MegaChips Corporation
发明人： Yukihiro UKAI , Takashi SAWADA
IPC分类号： H04N5/378 , H04N5/355 , H04N5/376 , H04N5/232 , H01L27/146 , H01L31/113
CPC分类号： H04N5/378 , H01L27/14636 , H01L27/14643 , H01L31/1136 , H04N5/23241 , H04N5/355 , H04N5/35554 , H04N5/3698 , H04N5/3745 , H04N5/3765
摘要： A light receiving element includes a first semiconductor layer of a first conductivity type to which a first potential is to be applied, a second semiconductor layer of a second conductivity type formed on the first semiconductor layer, first and second regions of the first conductivity type formed in an upper portion of the second semiconductor layer, a first electrode that is located on the first region and is to be subjected to application of a second potential, a second electrode located on the second region, an insulation layer formed on the second semiconductor layer between the first and the second regions, and a gate electrode that is formed on the insulation layer and is to be subjected to application of a gate voltage. A current readout unit detects, as a pixel signal reflecting an amount of light received, a current flowing from the first region to the second region.

26. 发明授权

US09565380B2 Data processor and data processing method including a decision circuit that compares input pixel data to defective pixel data 有权
标题翻译：数据处理器和数据处理方法包括将输入像素数据与缺陷像素数据进行比较的判定电路
公开(公告)号：US09565380B2
公开(公告)日：2017-02-07
申请号：US14659795
申请日：2015-03-17
申请人： MegaChips Corporation
发明人： Manabu Kotani
IPC分类号： H04N5/367 , H04N1/32
CPC分类号： H04N5/367 , H04N1/32561
摘要： A plurality of pieces of first input data are input to a first decision circuit in an order based on a first rule. The memory has a plurality of first memory areas that respectively store a plurality of pieces of first data that match at least part of the plurality of pieces of first input data. The first decision circuit compares the first data read from the memory with the first input data to be input. When they do not match each other, The first decision circuit compares the first data with the first input data to be input next. When they match, The first decision circuit compares the first data read next from the memory on the basis of the first read pointer incremented with the first input data to be input next.
摘要翻译：基于第一规则，多个第一输入数据被输入到第一判定电路。存储器具有分别存储与多条第一输入数据的至少一部分相匹配的多条第一数据的多个第一存储区。第一判定电路将从存储器读取的第一数据与要输入的第一输入数据进行比较。当它们不匹配时，第一判定电路将第一数据与接下来要输入的第一输入数据进行比较。当它们相匹配时，第一判定电路根据第一读取指针比较下一个从存储器读出的第一个数据，该第一个读取指针与接下来要输入的第一个输入数据相加。

27. 发明授权

US09552619B2 Image processing apparatus and image processing interface circuit 有权
标题翻译：图像处理装置和图像处理接口电路
公开(公告)号：US09552619B2
公开(公告)日：2017-01-24
申请号：US13854340
申请日：2013-04-01
申请人： MegaChips Corporation
发明人： Shogo Iwai , Kazuma Takahashi , Nobuhiro Minami , Kensuke Uchida , Toru Miyakoshi
IPC分类号： G06T1/60 , G06F13/00
CPC分类号： G06T1/60
摘要： An image processing apparatus includes a plurality of image processing module parts, a module arbiter part, and a DMAC (Direct Memory Access Controller) part. Each of the image processing module parts includes a module core for executing a predetermined image processing. The plurality of image processing module parts is connected to the module arbiter part. The module arbiter part arbitrates memory access which is given by the plurality of image processing module parts through a bus. The DMAC part is connected between the module arbiter part and the bus, and executes memory access related to the arbitration result obtained by the module arbiter part.
摘要翻译：图像处理装置包括多个图像处理模块部分，模块仲裁器部分和DMAC（直接存储器存取控制器）部分。每个图像处理模块部件包括用于执行预定图像处理的模块核心。多个图像处理模块部件连接到模块仲裁器部分。模块仲裁器部分通过总线仲裁由多个图像处理模块部件给出的存储器访问。 DMAC部分连接在模块仲裁器部分和总线之间，并执行与模块仲裁器部分获得的仲裁结果相关的存储器访问。

28. 发明申请

US20170013278A1 IMAGE DECODING APPARATUS AND IMAGE DECODING METHOD 有权
标题翻译：图像解码设备和图像解码方法
公开(公告)号：US20170013278A1
公开(公告)日：2017-01-12
申请号：US15276512
申请日：2016-09-26
申请人： MegaChips Corporation
发明人： Yusuke MIZUNO
IPC分类号： H04N19/64 , H04N19/117 , H04N19/30 , H04N19/13 , H04N19/167 , H04N19/124
CPC分类号： H04N19/647 , H04N19/117 , H04N19/124 , H04N19/13 , H04N19/146 , H04N19/167 , H04N19/172 , H04N19/30 , H04N19/46 , H04N19/63
摘要： Circuitry configured to generate an ROI mask by determining whether each of quantized wavelet coefficients constituting quantized image data is associated with an ROI or a non-ROI in an original image on the basis of the scaling amount of the Max-shift method, generate first image data by performing inverse quantization on the quantized image data after being scaled down, generate second image data having a specified decomposition level by performing inverse wavelet transformation on the first image data, generate a restored ROI mask having the same decomposition level as that of the second image data by performing a predetermined process on the ROI mask once or a plurality of times, generate masked image data by applying the restored ROI mask to the second image data, and perform the inverse wavelet transformation on the masked image data until a decomposition level becomes zero.
摘要翻译：电路被配置为基于Max-shift方法的缩放量，通过确定构成量化图像数据的每个量化小波系数是否与原始图像中的ROI或非ROI相关联来生成ROI掩模，生成第一图像通过对经量化后的量化图像数据进行逆量化的数据，通过对第一图像数据进行逆小波变换来生成具有指定的分解电平的第二图像数据，生成具有与第二图像数据相同的分解电平的恢复的ROI掩模通过对ROI掩模一次或多次执行预定处理来生成图像数据，通过将恢复的ROI掩码应用于第二图像数据来生成掩蔽图像数据，并对掩蔽图像数据执行逆小波变换，直到分解水平变为零。

29. 发明申请

US20170010989A1 MEMORY SYSTEM 审中-公开
标题翻译：记忆系统
公开(公告)号：US20170010989A1
公开(公告)日：2017-01-12
申请号：US15205682
申请日：2016-07-08
申请人： MegaChips Corporation
发明人： Takahiko SUGAHARA
IPC分类号： G06F13/16 , G06F13/40
CPC分类号： G06F13/1689 , G06F13/4068
摘要： A control circuit of a memory device feeds a first clock received from a transmission control circuit of a host device back to a reception control circuit of the host device as a second clock. The reception control circuit controls data reception from the memory device in synchronization with the fed-back second clock.
摘要翻译：存储装置的控制电路将从主机装置的传输控制电路接收的第一时钟作为第二时钟馈送给主机装置的接收控制电路。接收控制电路与反馈的第二时钟同步地控制来自存储装置的数据接收。

30. 发明授权

US09537655B2 Random number generating device, cipher processing device, storage device, and information processing system 有权
标题翻译：随机数生成装置，密码处理装置，存储装置和信息处理系统
公开(公告)号：US09537655B2
公开(公告)日：2017-01-03
申请号：US14265588
申请日：2014-04-30
申请人： MegaChips Corporation
发明人： Takahiko Sugahara
IPC分类号： G06F21/00 , H04L9/08 , H04L9/26 , G09C1/00 , G06F7/58
CPC分类号： H04L9/0861 , G06F7/588 , G09C1/00 , H04L9/065 , H04L9/0662 , H04L9/0869 , H04L9/26 , H04L2209/12
摘要： A random number generating device includes an uncertain circuit which outputs uncertain data, and a cipher processing device. The cipher processing device encrypts input data using a cipher function of the cipher processing device, and generates a random number including higher uniformity than data outputted from said uncertain circuit using the cipher function of the cipher processing device and the data outputted from the uncertain circuit.
摘要翻译：随机数生成装置包括输出不确定数据的不确定电路和密码处理装置。密码处理装置使用密码处理装置的密码函数对输入数据进行加密，并使用密码处理装置的密码函数和从不确定电路输出的数据，生成包含比从所述不确定电路输出的数据更均匀的随机数。

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