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21. 发明申请

US20120093212A1 SIGNAL TRANSMITTING METHOD, SIGNAL TRANSMITTING APPARATUS AND SIGNAL TRANSMITTING SYSTEM 审中-公开
标题翻译：信号发送方法，信号发送装置和信号发送系统
公开(公告)号：US20120093212A1
公开(公告)日：2012-04-19
申请号：US13378575
申请日：2010-06-01
申请人： Sung-Bo Oh , Jong-Wook Park , Sung-Han Lee
发明人： Sung-Bo Oh , Jong-Wook Park , Sung-Han Lee
IPC分类号： H04B17/00
CPC分类号： H04N21/43635 , G09G5/006 , G09G2330/021 , G09G2330/06 , G09G2330/12 , G09G2350/00 , G09G2370/045 , G09G2370/12
摘要： A signal transmission method, a signal transmission apparatus, and a signal transmission system are provided. The signal transmission method includes transmitting a test signal via at least one of a plurality of lines included in a channel; receiving transmission state information indicating a state of the transmission of the test signal; and determining whether to change a number of lines to be used for transmitting a main signal based on the transmission state information.
摘要翻译：提供信号传输方法，信号传输装置和信号传输系统。所述信号发送方法包括通过包括在信道中的多条线路中的至少一条发送测试信号; 接收表示测试信号的发送状态的发送状态信息; 以及基于所述传输状态信息来确定是否改变要用于发送主信号的行数。

22. 发明申请

US20100305722A1 METHOD FOR CONTROLLING HOME NETWORK DEVICE USING UNIVERSAL WEB APPLICATION AND APPARATUS THEREOF 有权
标题翻译：使用通用WEB应用程序控制家庭网络设备的方法及其设备
公开(公告)号：US20100305722A1
公开(公告)日：2010-12-02
申请号：US12745003
申请日：2008-11-27
申请人： Ho Jin , Young-Chul Sohn , Jong-Wook Park
发明人： Ho Jin , Young-Chul Sohn , Jong-Wook Park
IPC分类号： G06F17/00 , G06F3/01
CPC分类号： H04L12/2818
摘要： A method of controlling a home network device by using a universal web application. In the method, the universal web application may receive control information, for controlling the home network device, from a server. A control command, which is issued to control the home network device, may be sent to a control point module by using a script application program interface (API) that is included in the received control information. Accordingly, result data that is obtained by executing the control command on the home network device may be received by the control point module.
摘要翻译：一种通过使用通用网络应用来控制家庭网络设备的方法。在该方法中，通用网络应用程序可以从服务器接收用于控制家庭网络设备的控制信息。可以通过使用包含在所接收的控制信息中的脚本应用程序接口（API）将发出控制家庭网络设备的控制命令发送到控制点模块。因此，通过在家庭网络设备上执行控制命令而获得的结果数据可以被控制点模块接收。

23. 发明申请

US20080203436A1 Semiconductor device and layout method of decoupling capacitor thereof 有权
标题翻译：半导体器件及其去耦电容器的布局方法
公开(公告)号：US20080203436A1
公开(公告)日：2008-08-28
申请号：US12069316
申请日：2008-02-08
申请人： Jong-Wook Park
发明人： Jong-Wook Park
IPC分类号： H01L21/768 , H01L27/10
CPC分类号： H01L27/0805 , H01L27/0207
摘要： A semiconductor device and a layout method of a decoupling capacitor thereof are disclosed. The semiconductor device includes a main power/ground voltage voltage supplying line arranged in a first direction; a plurality of decoupling capacitor cells to reduce power noise generated by the power voltage and the ground voltage in the first direction and in a second direction; a plurality of sub power voltage supplying lines arranged in the second direction in a border of the plurality of decoupling capacitor cells; and a plurality of sub ground voltage supplying lines arranged in a net form in the border of the plurality of decoupling capacitor cells, wherein the plurality of decoupling capacitor cells have a first active region arranged to receive the ground voltage and the second active region disposed to receive the power voltage and to avoid a region where an inversion is formed in the decoupling capacitor.
摘要翻译：公开了一种半导体器件及其去耦电容器的布局方法。半导体器件包括沿第一方向布置的主电源/接地电压电压线; 多个去耦电容器单元，用于降低由第一方向和第二方向上的电源电压和接地电压产生的功率噪声; 在所述多个解耦电容器单元的边界中沿所述第二方向布置的多个副电源电压供给线; 以及在所述多个去耦电容器单元的边界中以网状布置的多个次地电压供电线，其中所述多个去耦电容器单元具有布置成接收所述接地电压的第一有源区，并且所述第二有源区设置为接收电源电压并避免在去耦电容器中形成反相的区域。

24. 发明授权

US07085179B2 Integrated circuit having a non-volatile memory cell transistor as a fuse device 失效
公开(公告)号：US07085179B2
公开(公告)日：2006-08-01
申请号：US10776600
申请日：2004-02-12
申请人： Jong-Wook Park , Sang-Jae Lee , Myung-Gyoo Won
发明人： Jong-Wook Park , Sang-Jae Lee , Myung-Gyoo Won
IPC分类号： G11C29/00 , G11C7/00
CPC分类号： G11C29/789 , G11C16/0433 , G11C2216/10 , H01L27/115 , H01L27/11558
摘要： A semiconductor integrated circuit device has a fuse device that can be electrically disconnected without a breakage caused by using a laser beam or current. The semiconductor integrated circuit device employs, as the fuse device for storing status information, a MOSFET of a single polysilicon EEPROM-type cell manufactured through a process of fabricating a volatile semiconductor memory cell array.

25. 发明授权

US5768188A Multi-state non-volatile semiconductor memory and method for driving the same 失效
标题翻译：多状态非易失性半导体存储器及其驱动方法
公开(公告)号：US5768188A
公开(公告)日：1998-06-16
申请号：US763612
申请日：1996-12-11
申请人： Jong-Wook Park , Kang-Deog Suh
发明人： Jong-Wook Park , Kang-Deog Suh
IPC分类号： G11C17/00 , G11C11/56 , G11C16/02 , G11C16/04 , G11C16/06 , G11C11/34
CPC分类号： G11C16/0483 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C2211/5642
摘要： A non-volatile integrated circuit memory device includes an array of memory cells. Each of a plurality of word lines corresponds to a respective row of memory cells, and each of a plurality of bit lines corresponds to a respective column of the memory cells. A current supplying transistor includes a source coupled to a supply voltage source, a gate coupled to a static voltage source, and a drain coupled to the bit lines. The current supplying transistor provides a static current to the bit lines during data read operations. A storage unit has a pair of latches coupled to respective input/output lines to perform a data exchange. The latches are further coupled to respective bit lines to perform a sense operation during the data read operation. Each of a pair of storage control transistors is associated with a respective one of the latches, and each of the storage control transistors inverts and maintains a state of data latched in the storage unit in accordance with levels of the bit lines and in response to enable signals applied thereto during a reading operation. An initialization transistor is connected to each of the bit lines, and the initialization transistor initializes the storage unit in response to a control signal applied thereto before execution of the reading operation while maintaining the bit lines at a respective predetermined voltage levels. A pair of program data transmission transistors are each arranged between a respective one of the latches of the storage unit and a respective bit line associated with the respective latch. Each of the programmed data transmission transistors transmits data latched in the respective latch to the associated bit lines during a programming operation.
摘要翻译：非易失性集成电路存储器件包括存储器单元阵列。多个字线中的每一个对应于相应行的存储器单元，并且多个位线中的每一行对应于存储器单元的相应列。电流供给晶体管包括耦合到电源电压源的源极，耦合到静态电压源的栅极和耦合到位线的漏极。电流供应晶体管在数据读取操作期间向位线提供静态电流。存储单元具有耦合到相应输入/输出线的一对锁存器以执行数据交换。闩锁进一步耦合到相应的位线，以在数据读取操作期间执行感测操作。一对存储控制晶体管中的每一个与锁存器中的相应一个相关联，并且每个存储控制晶体管根据位线的电平反转和维持锁存在存储单元中的数据的状态，并且响应于使能在读取操作期间施加到其上的信号。初始化晶体管连接到每个位线，并且在执行读取操作之前，初始化晶体管响应于施加到其上的控制信号来初始化存储单元，同时将位线保持在相应的预定电压电平。一对程序数据传输晶体管分别布置在存储单元的相应一个锁存器和与各个锁存器相关联的相应位线之间。每个编程数据传输晶体管在编程操作期间将锁存在相应锁存器中的数据传输到相关联的位线。

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