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    • 21. 发明授权
    • Shared memory multiprocessor performing cache coherence control and node controller therefor
    • 共享内存多处理器执行高速缓存一致性控制和节点控制器
    • US06636926B2
    • 2003-10-21
    • US09740816
    • 2000-12-21
    • Yoshiko YasudaNaoki HamanakaToru ShonaiHideya AkashiYuji TsushimaKeitaro Uehara
    • Yoshiko YasudaNaoki HamanakaToru ShonaiHideya AkashiYuji TsushimaKeitaro Uehara
    • G06F1300
    • G06F12/0813G06F12/0833G06F2212/1016
    • Each node includes a node controller for decoding the control information and the address information for the access request issued by a processor or an I/O device, generating, based on the result of decoding, the cache coherence control information indicating whether the cache coherence control is required or not, the node information and the unit information for the transfer destination, and adding these information to the access request. An intra-node connection circuit for connecting the units in the node controller holds the cache coherence control information, the node information and the unit information added to the access request. When the cache coherence control information indicates that the cache coherence control is not required and the node information indicates the local node, then the intra-node connection circuit transfers the access request not to the inter-node connection circuit interconnecting the nodes but directly to the unit designated by the unit information.
    • 每个节点包括用于解码由处理器或I / O设备发出的访问请求的控制信息和地址信息的节点控制器,基于解码结果生成指示高速缓存一致性控制的高速缓存一致性控制信息 是否需要节点信息和传输目的地的单位信息,并将这些信息添加到访问请求。 用于连接节点控制器中的单元的节点内连接电路保持高速缓存一致性控制信息,节点信息和添加到访问请求的单元信息。 当高速缓存一致性控制信息指示不需要高速缓存一致性控制并且节点信息指示本地节点时,节点内连接电路不是将互连节点的节点间连接电路的访问请求传送到节点间连接电路,而是直接连接到 单位由单位信息指定。
    • 22. 发明授权
    • Data transfer method for reduced number of messages by message passing library and direct intermemory data transfer library and computer system suitable therefor
    • 通过消息传递库和直接内存数据传输库和适用于其的计算机系统减少消息数量的数据传输方法
    • US06338095B1
    • 2002-01-08
    • US09177496
    • 1998-10-23
    • Yoshiko YasudaHiroaki Fujii
    • Yoshiko YasudaHiroaki Fujii
    • G06F1516
    • G06F9/544H04L67/10
    • A computer system including a plurality of element processors, and an interconnecting network for connecting the element processors. Each element processor includes a processor, a memory, and a network interface circuit for exchanging messages with the interconnecting network. Each element processor is provided with a message passing library for communicating with user processes running therein and a direct inter-memory data transfer library for communicating with the message passing library and controlling the network interface circuit. The network interface circuit includes a memory read circuit connected to the memory, and a message assembly circuit connected to to memory read circuit for generating a message to be transferred to a destination element processor through said interconnecting network. The memory read circuit reads user data to be transferred and additional information which is to be used in the destination element processor to identify whether the user data is requested by a user process running in said destination element processor based on first and second pieces of address information. The message assembly circuit generates a message which includes a header and send data which includes the user data and the additional information.
    • 包括多个元件处理器的计算机系统和用于连接元件处理器的互连网络。 每个元件处理器包括处理器,存储器和用于与互连网络交换消息的网络接口电路。 每个元件处理器都设有一个消息传递库,用于与其中运行的用户进程进行通信,以及一个直接存储器间数据传输库,用于与消息传递库通信并控制网络接口电路。 网络接口电路包括连接到存储器的存储器读取电路,以及连接到存储器读取电路的消息组合电路,用于通过所述互连网络生成要传送到目的地元件处理器的消息。 存储器读取电路读取要传送的用户数据和将在目的地元素处理器中使用的附加信息,以基于第一和第二地址信息来识别在所述目的地元素处理器中运行的用户进程的用户数据是否请求 。 消息组合电路生成包括报头和发送包括用户数据和附加信息的数据的消息。
    • 23. 发明授权
    • Solid-state color-image sensor and process for fabricating the same
    • 固态彩色图像传感器及其制造方法
    • US4388128A
    • 1983-06-14
    • US242578
    • 1981-03-11
    • Kazufumi OgawaShigeru KondoYoshiko YasudaTaketoshi YonezawaIsamu Kitahiro
    • Kazufumi OgawaShigeru KondoYoshiko YasudaTaketoshi YonezawaIsamu Kitahiro
    • G03F7/00H01L31/0216B29C27/10B32B31/20H01L31/18
    • G03F7/0007H01L31/02162Y10T156/1074
    • In a step for bonding a color filter to a solid-state color-image sensor chip with an adhesive which is curable not only by light or more particularly ultraviolet-ray irradiation but also by heating, pre-curing or partial curing is effected by irradiating light rays after the color filter and the chip has been pressed against each other and correctly aligned with each other in a bonding device and then the chip with the partially-bonded color filter is removed from the bonding device and complete curing of the adhesive is accomplished by heating. According to one embodiment of the present invention the bonding step is carried out in an atmosphere containing the oxygen so that the adhesive which has been squeezed out from the space between the color filter and the clip may be prevented from being cured and subsequently removed in a simple manner. According to a further embodiment of the present invention, prior to the bonding step, the color filter and chip are covered with protective layers or films so that surface flaws may be avoided. Thus, the color filters can be bonded to the chips with a higher degree of accuracy and a higher degree of adhesive strength and the mass production of solid-state color-image sensors can be much facilitated.
    • 在将滤色器与固态彩色图像传感器芯片接合的步骤中,不仅可以通过光线或更具体的紫外线照射而固化,而且通过加热固化,固化或部分固化可以通过照射 在滤色器之后的光线和芯片已经在接合装置中彼此压靠并且彼此正确地对准,然后将具有部分粘合的滤色器的芯片从接合装置移除并完成粘合剂的完全固化 通过加热。 根据本发明的一个实施方案,粘合步骤在含有氧的气氛中进行,从而可以防止从滤色器和夹子之间的空间挤出的粘合剂被固化并随后在 简单的方式。 根据本发明的另一实施例,在接合步骤之前,滤色器和芯片被保护层或膜覆盖,从而可以避免表面缺陷。 因此,可以以更高的准确度和更高的粘合强度将滤色器结合到芯片,并且可以大大方便固态彩色图像传感器的批量生产。
    • 26. 发明授权
    • Compound information platform and managing method for the same
    • 复合信息平台和管理方法相同
    • US08001554B2
    • 2011-08-16
    • US11649760
    • 2007-01-05
    • Takashige BabaYoshiko YasudaJun OkitsuToshiaki Tarui
    • Takashige BabaYoshiko YasudaJun OkitsuToshiaki Tarui
    • G06F9/44G06F15/177
    • G06F13/4022
    • Module combination candidates which compose an information platform, to reduce human error when a platform is composed, and to permit automatic configuration changes. There is therefore provided a compound information platform comprising information platforms combining one or more universal processing modules and dedicated processing modules, wherein a management module has a means which computes processing module combination candidates when newly composing the information platform, computes the sum total value of the maximum guaranteed communication bandwidth of an IO protocol interface for each physical interconnection PL using an interface setting management information, adding an additional maximum guaranteed communication bandwidth due to a processing module combination candidate, and determining whether this is a possible module combination candidate by comparing the addition result with the maximum permitted communication bandwidth of each physical interconnection.
    • 组合信息平台的模块组合候选者,在组成平台时减少人为错误,并允许自动配置更改。 因此,提供了一种组合信息平台,其包括组合一个或多个通用处理模块和专用处理模块的信息平台,其中管理模块具有在新组成信息平台时计算处理模块组合候选的装置,计算总数值 使用接口设置管理信息为每个物理互连PL的IO协议接口的最大保证的通信带宽,由于处理模块组合候选而添加额外的最大保证通信带宽,并且通过比较加法来确定这是否是可能的模块组合候选 导致每个物理互连的最大允许通信带宽。
    • 27. 发明授权
    • IO adapter and data transferring method using the same
    • IO适配器和数据传输方法使用相同
    • US07827331B2
    • 2010-11-02
    • US11831097
    • 2007-07-31
    • Takashige BabaYoshiko YasudaJun Okitsu
    • Takashige BabaYoshiko YasudaJun Okitsu
    • G06F13/28G06F13/12G06F13/38
    • G06F9/5011
    • An IO adapter for guaranteeing the data transfer bandwidth on each capsule interface when multiple capsule interfaces jointly share the DMA engine of the IO adapter. An IO driver containing a capsule interface information table including bandwidth information and for setting the forming status of a pair of capsule interfaces and, during data transfer subdivides the descriptors for the capsule interfaces into multiple groups for each data buffer size satisfying the preset bandwidth information and, copies one group at each fixed sample time set by the descriptor registration means, into the descriptor ring and performs DMA transfer. To control this copy information, the IO driver contains a ring scheduler information table for managing the number of descriptor entries for the capsule interface cycle time and, a ring scheduler cancel means for renewing the entries in the ring scheduler information table each time one transmission of the descriptor group ends.
    • 一个IO适配器,用于在多个胶囊接口共同共享IO适配器的DMA引擎时保证每个胶囊接口上的数据传输带宽。 一种包含胶带接口信息表的IO驱动器,包括带宽信息和用于设置一对胶囊接口的形成状态,并且在数据传输期间,为满足预设带宽信息的每个数据缓冲器大小将胶囊接口的描述符细分为多个组,以及 ,将由描述符登记装置设定的每个固定采样时间的一组复制到描述符环中并执行DMA传输。 为了控制该复制信息,IO驱动器包含用于管理胶囊接口循环时间的描述符条目数量的环形调度器信息表,以及环形调度器取消装置,用于每次发送环形调度器信息表中的条目, 描述符组结束。