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21. 发明授权

US07648905B2 Flash memory device and a method of manufacturing the same 有权
标题翻译：闪存装置及其制造方法
公开(公告)号：US07648905B2
公开(公告)日：2010-01-19
申请号：US11319610
申请日：2005-12-29
申请人： Sung-Jin Kim
发明人： Sung-Jin Kim
IPC分类号： H01L21/4763 , H01L29/00
CPC分类号： H01L27/115 , H01L27/11519 , H01L27/11521
摘要： The present invention provides a flash memory device and a method of forming the same. The method includes: forming an isolation layer and a plurality of gate lines on a semiconductor substrate; forming a source/drain region by ion-implanting impurities into the semiconductor substrate using the gate lines as a mask; forming a side oxide layer on sidewalls and surfaces of the gate lines; forming a side nitride layer on the side oxide layer; forming an insulation layer on the semiconductor substrate and the side nitride layer; forming a photosensitive layer pattern on the insulation layer; exposing the source region between the gate lines by etching the insulation layer using the photosensitive layer pattern as a mask; forming a polysilicon layer on the exposed source region and the insulation layer; and forming a source line by etching the polysilicon layer.
摘要翻译：本发明提供一种闪存器件及其形成方法。该方法包括：在半导体衬底上形成隔离层和多条栅极线; 通过使用栅极线作为掩模将杂质离子注入到半导体衬底中来形成源极/漏极区域; 在所述栅极线的侧壁和表面上形成侧面氧化物层; 在侧面氧化层上形成侧面氮化物层; 在所述半导体衬底和所述侧氮化物层上形成绝缘层; 在所述绝缘层上形成感光层图案; 通过使用感光层图案作为掩模蚀刻绝缘层，在栅极线之间暴露源极区域; 在所述暴露的源极区域和所述绝缘层上形成多晶硅层; 并通过蚀刻多晶硅层形成源极线。

22. 发明授权

US07626157B2 Image sensor including microlens having sizes differing according to deposition of color filter array 有权
标题翻译：图像传感器包括具有根据滤色器阵列的沉积而具有不同尺寸的微透镜
公开(公告)号：US07626157B2
公开(公告)日：2009-12-01
申请号：US11319600
申请日：2005-12-29
申请人： Sang Sik Kim
发明人： Sang Sik Kim
IPC分类号： H01J3/14 , H01J5/16
CPC分类号： H01L27/14603 , H01L27/14621 , H01L27/14625 , H01L27/14627 , H01L27/14645
摘要： A image sensor has a plurality of microlens disposed across an image area in which centrally disposed red pixels are provided with smaller microlenses and peripherally disposed red pixels are provided with larger microlenses. The size differential, which amounts to a small percentage to compensate for a refractivity differential per wavelength of incident light across the image area, prevents the generation of a reddish effect in an output image. The image sensor includes a color filter array having separate color filters including a long-wavelength filter, and a plurality of microlenses respectively formed on the separate color filters, wherein the microlenses corresponding to the long-wavelength filter have relative sizes differing according to disposition with respect to the color filter array.
摘要翻译：图像传感器具有跨越图像区域布置的多个微透镜，其中中央设置的红色像素设置有较小的微透镜，并且外围设置的红色像素设置有较大的微透镜。相对于图像区域中入射光的波长的折射率差异来补偿微小百分比的尺寸差异防止在输出图像中产生微红色的影响。图像传感器包括滤色器阵列，其具有分离的滤色器，包括长波长滤光器和分别形成在分离的滤色器上的多个微透镜，其中对应于长波长滤光器的微透镜具有根据与相对于滤色器阵列。

23. 发明授权

US07618830B2 Rapid thermal processing apparatus and methods 失效
标题翻译：快速热处理设备及方法
公开(公告)号：US07618830B2
公开(公告)日：2009-11-17
申请号：US10869665
申请日：2004-06-16
申请人： Jae-Won Han
发明人： Jae-Won Han
IPC分类号： H01L21/00
CPC分类号： H01L21/67253 , C30B31/10 , C30B33/00
摘要： Rapid thermal processing apparatus methods are disclosed. In a disclosed apparatus, rapid thermal processing is carried out when the residual oxygen detected by a residual oxygen detector does not exceed a predetermined tolerance level. Accordingly, it is possible to prevent the contact resistance of the wafers from increasing due to the presence of excessive oxygen.
摘要翻译：公开了快速热处理装置的方法。在公开的装置中，当由残留氧气检测器检测到的残余氧没有超过预定的容限水平时，进行快速热处理。因此，可以防止晶片的接触电阻由于存在过量的氧而增加。

24. 发明授权

US07611918B2 CMOS image sensor and method for fabricating the same 失效
标题翻译： CMOS图像传感器及其制造方法
公开(公告)号：US07611918B2
公开(公告)日：2009-11-03
申请号：US11448428
申请日：2006-06-07
申请人： Hwang Joon
发明人： Hwang Joon
IPC分类号： H01L27/10
CPC分类号： H01L27/14645 , H01L27/14689
摘要： A CMOS image sensor and a method of fabricating the same are provided. The CMOS image sensor includes: an epitaxial layer of a first conductivity type, formed in a semiconductor substrate of the first conductivity type; a blue photodiode region of a second conductivity type, formed in the epitaxial layer at a first depth; a green photodiode region of the second conductivity type, spaced apart from the blue photodiode region and formed in the epitaxial layer at a second depth larger than the first depth; and a red photodiode region of the second conductivity type, spaced apart from the green photodiode region and formed in the epitaxial layer at a third depth larger than the second depth.
摘要翻译：提供CMOS图像传感器及其制造方法。 CMOS图像传感器包括：形成在第一导电类型的半导体衬底中的第一导电类型的外延层; 形成在第一深度的外延层中的第二导电类型的蓝色光电二极管区域; 第二导电类型的绿色光电二极管区域，与蓝色光电二极管区域间隔开，并在大于第一深度的第二深度形成在外延层中; 以及第二导电类型的红色光电二极管区域，与绿色光电二极管区域间隔开并且形成在大于第二深度的第三深度的外延层中。

25. 发明授权

US07605471B2 Semiconductor devices and methods for manufacturing the same 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US07605471B2
公开(公告)日：2009-10-20
申请号：US12178577
申请日：2008-07-23
申请人： Jae-Suk Lee
发明人： Jae-Suk Lee
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/53238 , H01L21/76846 , H01L21/76856 , H01L21/76877 , H01L23/5226 , H01L23/53233 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices having a copper line layer and methods for manufacturing the same are disclosed. An illustrated semiconductor device comprises a damascene insulating layer having a contact hole, a barrier metal layer including a first ruthenium layer, a ruthenium oxide layer and a second ruthenium layer, a seed copper layer formed on the barrier metal layer, and a copper line layer made of a Cu—Ag—Au solid solution. A disclosed example method of manufacturing a semiconductor device reduces and/or prevents contact characteristic degradation of the barrier metal layer with the silicon substrate or the damascene insulating layer. In addition, by forming the copper line layer made of the Cu—Ag—Au solid solution, long term device reliability may be improved.
摘要翻译：公开了具有铜线层的半导体器件及其制造方法。所示的半导体器件包括具有接触孔的镶嵌绝缘层，包含第一钌层，氧化钌层和第二钌层的阻挡金属层，形成在阻挡金属层上的种子铜层，以及铜线层由Cu-Ag-Au固溶体制成。公开的制造半导体器件的示例性方法减少和/或防止阻挡金属层与硅衬底或镶嵌绝缘层的接触特性劣化。此外，通过形成由Cu-Ag-Au固溶体制成的铜线层，可以提高长期的器件可靠性。

26. 发明授权

US07605074B2 Chemical mechanical polishing and method for manufacturing semiconductor device using the same 失效
标题翻译：化学机械抛光及使用其制造半导体器件的方法
公开(公告)号：US07605074B2
公开(公告)日：2009-10-20
申请号：US11512840
申请日：2006-08-29
申请人： Young Seok Jeong
发明人： Young Seok Jeong
IPC分类号： H01L21/4763
CPC分类号： H01L21/7684 , H01L21/3212 , H01L21/76807 , H01L21/76832 , H01L21/76834
摘要： Provided is a CMP method. According to the CMP method, an interlayer insulating layer having two or more layers is etched to form a trench and/or via hole, and a combined thickness of the two or more layers are measured. A barrier metal layer and a metal layer are sequentially formed in the trench and/or via hole. Portions of the metal layer, the barrier metal layer and the interlayer insulating layer are removed. After that, the combined thickness of the two or more insulating layers is measured again.
摘要翻译：提供了一种CMP方法。根据CMP方法，蚀刻具有两层或更多层的层间绝缘层以形成沟槽和/或通孔，并且测量两层或更多层的组合厚度。阻挡金属层和金属层依次形成在沟槽和/或通孔中。除去金属层，阻挡金属层和层间绝缘层的一部分。之后，再次测量两个或多个绝缘层的组合厚度。

27. 发明授权

US07598550B2 MOS transistor and manufacturing method thereof 有权
标题翻译： MOS晶体管及其制造方法
公开(公告)号：US07598550B2
公开(公告)日：2009-10-06
申请号：US11320629
申请日：2005-12-30
申请人： Hyung Sun Yun
发明人： Hyung Sun Yun
IPC分类号： H01L29/76
CPC分类号： H01L29/66772 , H01L29/42384 , H01L29/78645 , H01L29/78654
摘要： There are provided a MOS transistor and a manufacturing method thereof. The MOS transistor includes a substrate on which an insulating layer is formed, a gate embedded in the insulating layer, wherein the top surface of the gate is exposed, a gate oxide layer formed on the insulating layer and the gate, a silicon layer formed on the gate oxide layer, and a source region and a drain region formed in the silicon layer to be in contact with the gate oxide layer.
摘要翻译：提供了一种MOS晶体管及其制造方法。 MOS晶体管包括其上形成有绝缘层的基板，嵌入在绝缘层中的栅极，其中栅极的顶表面被暴露，形成在绝缘层和栅极上的栅极氧化层，形成在绝缘层上的硅层栅极氧化物层，以及形成在硅层中与栅极氧化物层接触的源极区域和漏极区域。

28. 发明授权

US07595210B2 Method of manufacturing complementary metal oxide semiconductor image sensor 失效
标题翻译：互补金属氧化物半导体图像传感器的制造方法
公开(公告)号：US07595210B2
公开(公告)日：2009-09-29
申请号：US11612619
申请日：2006-12-19
申请人： Hee Sung Shim
发明人： Hee Sung Shim
IPC分类号： H01L21/00
CPC分类号： H01L27/14603 , H01L27/14609 , H01L27/14643 , H01L27/14689
摘要： A method of manufacturing a complementary metal oxide semiconductor (CMOS) image sensor is provided. The method can include the steps of: providing a semiconductor substrate having an active region and an isolation region defined thereon; forming a photodiode at a photodiode area of the active region; forming first and second gate polys on a transistor region of the active region; forming a floating diffusion region on the semiconductor substrate between the first and second gate polys for receiving electrons transferred from the photodiode; and forming a floating diffusion node region at a part of the floating diffusion region for forming a metal contact. The floating diffusion region can be formed independently of the floating diffusion node region, so that a junction leakage current generated from the floating diffusion node region can be controlled.
摘要翻译：提供了制造互补金属氧化物半导体（CMOS）图像传感器的方法。该方法可以包括以下步骤：提供具有限定在其上的有源区和隔离区的半导体衬底; 在有源区的光电二极管区域形成光电二极管; 在有源区域的晶体管区域上形成第一和第二栅极聚合物; 在所述第一和第二栅极聚合物之间的所述半导体衬底上形成用于接收从所述光电二极管转移的电子的浮动扩散区; 以及在用于形成金属接触的浮动扩散区域的一部分处形成浮动扩散节点区域。可以独立于浮动扩散节点区域形成浮动扩散区域，从而可以控制从浮动扩散节点区域产生的结漏电流。

29. 发明授权

US07582563B2 Method for fabricating fully silicided gate 有权
标题翻译：完全硅化栅的制造方法
公开(公告)号：US07582563B2
公开(公告)日：2009-09-01
申请号：US11639257
申请日：2006-12-15
申请人： Dae-Young Kim , Han-Choon Lee
发明人： Dae-Young Kim , Han-Choon Lee
IPC分类号： H01L21/44
CPC分类号： H01L21/28097
摘要： A method for fabricating a fully silicided gate, including forming a gate dielectric layer on a semiconductor substrate, depositing an amorphous silicon layer on the gate dielectric layer, forming a metallic layer on the amorphous silicon layer, depositing a hard mask on the metallic layer, wherein the amorphous silicon layer and the metal layer are silicided due to a thermal budget applied thereto, thereby forming a metal silicide layer, and patterning the metal silicide layer based on the hard mask to form a gate.
摘要翻译：一种制造完全硅化栅的方法，包括在半导体衬底上形成栅介电层，在栅介电层上沉积非晶硅层，在非晶硅层上形成金属层，在金属层上沉积硬掩模，其中由于施加到其上的热预算，非晶硅层和金属层被硅化，从而形成金属硅化物层，并且基于硬掩模构图金属硅化物层以形成栅极。

30. 发明授权

US07569444B2 Transistor and method for manufacturing thereof 失效
标题翻译：晶体管及其制造方法
公开(公告)号：US07569444B2
公开(公告)日：2009-08-04
申请号：US11302137
申请日：2005-12-14
申请人： Park Jeong Ho
发明人： Park Jeong Ho
IPC分类号： H01L21/336
CPC分类号： H01L29/7833 , H01L21/28114 , H01L29/42376 , H01L29/665 , H01L29/66553 , H01L29/6656 , H01L29/66583 , H01L29/6659
摘要： A transistor includes a gate insulating layer over a semiconductor substrate; a first insulating layer on both sides of the gate insulating layer; first spacers over the first insulating layer and being spaced apart from each other; and a gate conductive plug between the first spacers. A method for manufacturing a transistor includes sequentially depositing a first insulating layer and a second insulating layer over a semiconductor substrate; etching the second insulating layer; implanting impurity ions; depositing and etching a layer of spacer material to form first spacers; removing a first portion of the first insulating layer between the first spacers; depositing a gate insulating layer the place of the first portion of the first insulating layer; forming a gate conductive plug on the gate insulating layer; forming second spacers on sidewalls of the gate conductive plug; and forming a silicide on an upper surface of the gate conductive plug.
摘要翻译：晶体管包括半导体衬底上的栅极绝缘层; 栅极绝缘层两侧的第一绝缘层; 第一隔离物在第一绝缘层上并彼此间隔开; 以及在所述第一间隔件之间的栅极导电插塞。一种制造晶体管的方法包括在半导体衬底上顺序地沉积第一绝缘层和第二绝缘层; 蚀刻第二绝缘层; 注入杂质离子; 沉积和蚀刻间隔物材料层以形成第一间隔物; 去除第一间隔物之间的第一绝缘层的第一部分; 在第一绝缘层的第一部分的位置沉积栅极绝缘层; 在所述栅极绝缘层上形成栅极导电插塞; 在所述栅极导电插塞的侧壁上形成第二间隔物; 以及在所述栅极导电插塞的上表面上形成硅化物。

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