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31. 发明授权

US08635179B2 Detection of irregularity in food manufacturing by using conversion pattern 失效
标题翻译：通过使用转换模式检测食品制造中的不规则性
公开(公告)号：US08635179B2
公开(公告)日：2014-01-21
申请号：US12910315
申请日：2010-10-22
申请人： Rong Zeng Cao , Wei Ding , Xiang Yang He , Shun Jiang , Juhnyoung Lee , Feng Li , Tie Liu , Chun Hua Tian , Feng Chun Wang , Hao Zhang
发明人： Rong Zeng Cao , Wei Ding , Xiang Yang He , Shun Jiang , Juhnyoung Lee , Feng Li , Tie Liu , Chun Hua Tian , Feng Chun Wang , Hao Zhang
IPC分类号： G06F17/00 , G06N5/02 , G06F19/00 , G06Q10/00
CPC分类号： G06Q50/04 , A23P10/00 , G06Q10/087 , Y02P90/30
摘要： Irregular food manufacturing detection by using conversion pattern in one aspect generates one or more rules associated with amount of resources used to manufacture a food product, collects data associated with a selected manufacturing process of the food product at a selected manufacturer and determines whether the collected data complies with the generated one or more rules. Irregularity may be identified if the collected data does not comply with the generated one or more rules.
摘要翻译：在一个方面通过使用转换模式进行的不规则食品制造检测产生与用于制造食品的资源量相关联的一个或多个规则，在选定的制造商处收集与选定的食品制造过程相关联的数据，并确定收集的数据符合生成的一个或多个规则。如果收集的数据不符合生成的一个或多个规则，则可能会识别不规则。

32. 发明申请

US20140010013A1 MEMORY ERASING METHOD AND DRIVING CIRCUIT THEREOF 有权
标题翻译：存储器擦除方法及其驱动电路
公开(公告)号：US20140010013A1
公开(公告)日：2014-01-09
申请号：US13540803
申请日：2012-07-03
申请人： HSIAO-HUA LU , CHIH-MING KUO , YU-CHUN WANG
发明人： HSIAO-HUA LU , CHIH-MING KUO , YU-CHUN WANG
IPC分类号： G11C16/16 , G11C16/04
CPC分类号： G11C16/16
摘要： A memory erasing method and a driving circuit thereof are introduced, when cells are selected to be erased, the method includes setting gates of cells which are not selected to be erased and are located at a selected block, drains of all the cells in a selected bank, and the gate of the unselected cells to be floating; supplying a positive voltage to all the sources in a selected bank and their shared P well and N well; and supplying a negative voltage to the gates of the cells located in a selected block and selected to be erased. Accordingly, a positive coupling voltage from P wells is received whenever gates are floating, so as to inhibit erasure of unselected blocks and thereby streamline decoding, thus making it easy to attain further expansion of blocks or banks with a small layout area and partition of sectors in the blocks.
摘要翻译：引入存储器擦除方法及其驱动电路，当选择要擦除单元时，该方法包括设置未被选择被擦除且位于所选块的单元的门，所选择的单元的所有单元的漏极银行，未选择的单元格的门将浮动; 为所选择的银行的所有来源提供正电压及其共享的P阱和N阱; 并向位于所选块中的单元的栅极提供负电压并选择被擦除。因此，每当门浮动时，都接收来自P阱的正耦合电压，以便禁止未选择的块的擦除，从而简化解码，从而使得容易实现具有小布局面积和扇区划分的块或块的进一步扩展在街区。

33. 发明申请

US20140002515A1 ORGANIC LIGHT EMITTING DIODE PIXEL CIRCUIT 审中-公开
标题翻译：有机发光二极管像素电路
公开(公告)号：US20140002515A1
公开(公告)日：2014-01-02
申请号：US14017279
申请日：2013-09-03
申请人： Hieng-Hsiung Huang , Wen-Chun Wang , Wen-Tui Liao , Tsung-Yu Wang , Chih-Hung Huang
发明人： Hieng-Hsiung Huang , Wen-Chun Wang , Wen-Tui Liao , Tsung-Yu Wang , Chih-Hung Huang
IPC分类号： G09G5/10
CPC分类号： G09G5/10 , G09G3/3233 , G09G2300/0819 , G09G2320/0233 , G09G2320/0295 , G09G2320/043 , G09G2320/045
摘要： An organic light emitting diode (OLED) pixel circuit includes a driving node, a pixel driving unit, an electroluminescent device, and a compensation unit. The pixel driving unit is coupled to a data line receiving a data voltage and provides a driving voltage to the driving node. The display electroluminescent device is coupled to the driving node for illuminating in response to the driving voltage, wherein the level of the driving voltage is related to an aging factor voltage, corresponding to a usage time of the display electroluminescent device. The compensation unit, including a compensation electroluminescent device, is couple to the driving node and drives the compensation electroluminescent device to illuminate in response to the driving voltage, so as to compensate the aging decay of the display electroluminescent device with the electroluminescent compensation unit.
摘要翻译：有机发光二极管（OLED）像素电路包括驱动节点，像素驱动单元，电致发光器件和补偿单元。像素驱动单元耦合到接收数据电压的数据线，并向驱动节点提供驱动电压。显示电致发光器件响应于驱动电压耦合到驱动节点进行照明，其中驱动电压的电平与显示电致发光器件的使用时间对应的老化因子电压相关。包括补偿电致发光器件的补偿单元耦合到驱动节点并且驱动补偿电致发光器件以响应于驱动电压进行照明，以便用电致发光补偿单元补偿显示电致发光器件的老化衰减。

34. 发明授权

US08610869B2 Flat display panel comprising a plurality of signal lines connected to a plurality of electrodes disposed along a periphery of a display area wherein the purality of signals lines has one segment extending along a first direction and one segment extending along a second direction 有权
标题翻译：平板显示面板包括连接到沿着显示区域的周边布置的多个电极的多条信号线，其中信号线的多个具有沿着第一方向延伸的一个段和沿着第二方向延伸的一个段
公开(公告)号：US08610869B2
公开(公告)日：2013-12-17
申请号：US12763658
申请日：2010-04-20
申请人： Wen-Chun Wang , Ming-Chang Yu , Yung-Cheng Chang , Wan-Jen Tsai
发明人： Wen-Chun Wang , Ming-Chang Yu , Yung-Cheng Chang , Wan-Jen Tsai
IPC分类号： G02F1/1345 , G02F1/1343
CPC分类号： G02F1/1345 , G09G3/20 , G09G2300/0426
摘要： A flat display panel includes an array substrate and a color filter substrate facing each other. Multiple first electrodes and second electrodes are formed on the array substrate. The first electrodes receive scan signals transmitted from a driving circuit, and each of the second electrodes is connected to a corresponding scan line. Multiple signal lines are formed on the color filter substrate and in an active display area. Besides, multiple third electrodes and forth electrodes are formed on the color filter substrate. Each of the third electrodes is electrically connected to a corresponding forth electrode by a corresponding signal line, each of the third electrodes is electrically connected to a corresponding first electrode, and each of the forth electrodes is electrically connected to a corresponding second electrode.
摘要翻译：平面显示面板包括阵列基板和彼此面对的滤色器基板。多个第一电极和第二电极形成在阵列基板上。第一电极接收从驱动电路发送的扫描信号，并且每个第二电极连接到相应的扫描线。多个信号线形成在滤色器基板上和活动显示区域中。此外，在滤色器基板上形成多个第三电极和第四电极。每个第三电极通过相应的信号线电连接到对应的第四电极，每个第三电极电连接到对应的第一电极，并且每个第四电极电连接到相应的第二电极。

35. 发明授权

US08601407B2 Geometric pattern data quality verification for maskless lithography 有权
标题翻译：无掩模光刻的几何图形数据质量验证
公开(公告)号：US08601407B2
公开(公告)日：2013-12-03
申请号：US13217345
申请日：2011-08-25
申请人： Hung-Chun Wang , Pei-Shiang Chen , Tzu-Chin Lin , Cheng-Hung Chen , Shih-Chi Wang , Nian-Fuh Cheng , Jeng-Horng Chen , Wen-Chun Huang , Ru-Gun Liu
发明人： Hung-Chun Wang , Pei-Shiang Chen , Tzu-Chin Lin , Cheng-Hung Chen , Shih-Chi Wang , Nian-Fuh Cheng , Jeng-Horng Chen , Wen-Chun Huang , Ru-Gun Liu
IPC分类号： G06F17/50
CPC分类号： G03F7/2059
摘要： Provided is a method of performing a maskless lithography process. The method includes providing a proximity correction pattern. The method includes generating a deformed pattern based on the proximity correction pattern. The method includes performing a first convolution process to the proximity correction pattern to generate a first proximity correction pattern contour. The method includes processing the first proximity correction pattern contour to generate a second proximity correction pattern contour. The method includes performing a second convolution process to the deformed pattern to generate a first deformed pattern contour. The method includes processing the first deformed pattern contour to generate a second deformed pattern contour. The method includes identifying mismatches between the second proximity correction pattern contour and the second deformed pattern contour. The method includes determining whether the deformed pattern is lithography-ready in response to the identifying.
摘要翻译：提供了进行无掩模光刻处理的方法。该方法包括提供接近校正模式。该方法包括基于接近校正图案生成变形图案。该方法包括对接近校正图案执行第一卷积处理以产生第一邻近校正图案轮廓。该方法包括处理第一接近校正图案轮廓以产生第二邻近校正图案轮廓。该方法包括对变形图案执行第二卷积处理以产生第一变形图案轮廓。该方法包括处理第一变形图案轮廓以产生第二变形图案轮廓。该方法包括识别第二接近校正图案轮廓和第二变形图案轮廓之间的不匹配。该方法包括响应于识别确定变形图案是否是光刻刻画的。

36. 发明授权

US08592297B2 Wafer and method of processing wafer 有权
标题翻译：晶圆和晶圆加工方法
公开(公告)号：US08592297B2
公开(公告)日：2013-11-26
申请号：US13328346
申请日：2011-12-16
申请人： Tung-Ti Yeh , Wu-Chang Lin , Chung-Yi Huang , Ya Wen Wu , Hui-Mei Jao , Ting-Chun Wang , Chia-Hung Chung
发明人： Tung-Ti Yeh , Wu-Chang Lin , Chung-Yi Huang , Ya Wen Wu , Hui-Mei Jao , Ting-Chun Wang , Chia-Hung Chung
IPC分类号： H01L21/44
CPC分类号： H01L21/02087 , H01L21/76802 , H01L21/76883
摘要： A wafer including a substrate, a dielectric layer over the substrate, and a conductive layer over the dielectric layer is disclosed. The substrate has a main portion. A periphery of the dielectric layer and the periphery of the main portion of the substrate are separated by a first distance. A periphery of the conductive layer and the periphery of the main portion of the substrate are separated by a second distance. The second distance ranges from about a value that is 0.5% of a diameter of the substrate less than the first distance to about a value that is 0.5% of the diameter greater than the first distance.
摘要翻译：公开了一种包括衬底，在衬底上的电介质层和介电层上的导电层的晶片。基板具有主要部分。电介质层的周边和基板的主要部分的周边分开第一距离。导电层的周边和基板的主要部分的周边分开第二距离。所述第二距离的范围从小于所述第一距离的所述基板的直径的0.5％的值的大约为大于所述第一距离的直径的0.5％的值。

37. 发明申请

US20130309829A1 Method of Forming a Semiconductor Device 有权
标题翻译：形成半导体器件的方法
公开(公告)号：US20130309829A1
公开(公告)日：2013-11-21
申请号：US13471986
申请日：2012-05-15
申请人： Ziwei Fang , Tsan-Chun Wang , De-Wei Yu
发明人： Ziwei Fang , Tsan-Chun Wang , De-Wei Yu
IPC分类号： H01L21/336
CPC分类号： H01L29/7848 , H01L21/26506 , H01L21/26586 , H01L21/26593 , H01L21/324 , H01L21/823807 , H01L21/823814 , H01L21/823878 , H01L29/1608 , H01L29/165 , H01L29/66636 , H01L29/7847
摘要： A semiconductor device having dislocations and a method of fabricating the semiconductor device is disclosed. The exemplary semiconductor device and method for fabricating the semiconductor device enhance carrier mobility. The method includes providing a substrate having an isolation feature therein and two gate stacks overlying the substrate, wherein one of the gate stacks is atop the isolation feature. The method further includes performing a pre-amorphous implantation process on the substrate. The method further includes forming a stress film over the substrate. The method also includes performing an annealing process on the substrate and the stress film.
摘要翻译：公开了一种具有位错的半导体器件和制造半导体器件的方法。用于制造半导体器件的示例性半导体器件和方法增强载流子迁移率。该方法包括提供其中具有隔离特性的衬底和覆盖衬底的两个栅极叠层，其中一个栅极堆叠位于隔离特征顶部。该方法还包括在衬底上执行预非晶体注入工艺。该方法还包括在衬底上形成应力膜。该方法还包括对衬底和应力膜进行退火处理。

38. 发明申请

US20130285130A1 BACKSIDE ILLUMINATED IMAGE SENSOR WITH NEGATIVELY CHARGED LAYER 有权
标题翻译：背面照明的图像传感器带负电荷层
公开(公告)号：US20130285130A1
公开(公告)日：2013-10-31
申请号：US13743979
申请日：2013-01-17
申请人： Shyh-Fann TING , Chih-Yu LAI , Cheng-Ta WU , Yeur-Luen TU , Ching-Chun WANG
发明人： Shyh-Fann TING , Chih-Yu LAI , Cheng-Ta WU , Yeur-Luen TU , Ching-Chun WANG
IPC分类号： H01L27/146
CPC分类号： H01L27/146 , H01L27/1463 , H01L27/1464 , H01L27/14683
摘要： A semiconductor image sensor device having a negatively-charged layer includes a semiconductor substrate having a p-type region, a plurality of radiation-sensing regions in the p-type region proximate a front side of the semiconductor substrate, and a negatively-charged layer adjoining the p-type region proximate the plurality of radiation-sensing regions. The negatively-charged layer may be an oxygen-rich silicon oxide, a high-k metal oxide, or a silicon nitride formed as a liner in a shallow trench isolation feature, a sidewall spacer or an offset spacer of a transistor gate, a salicide-block layer, a buffer layer under a salicide-block layer, a backside surface layer, or a combination of these.
摘要翻译：具有带负电荷层的半导体图像传感器装置包括具有p型区域的半导体衬底，在靠近半导体衬底的前侧的p型区域中的多个辐射感测区域和带负电荷层邻近多个辐射感测区域的p型区域。带负电荷的层可以是在浅沟槽隔离特征，侧壁间隔物或晶体管栅极的偏移间隔物中形成的富氧氧化硅，高k金属氧化物或形成为衬垫的氮化硅，自对准硅 - 嵌段层，在自对流硅化物阻挡层下面的缓冲层，背面表面层或它们的组合。

39. 发明授权

US08571864B2 Automatic identification of repeated material in audio signals 有权
公开(公告)号：US08571864B2
公开(公告)日：2013-10-29
申请号：US13309985
申请日：2011-12-02
申请人： David L. DeBusk , Darren P. Briggs , Michael Karliner , Richard W. Cheong Tang , Avery Li-Chun Wang
发明人： David L. DeBusk , Darren P. Briggs , Michael Karliner , Richard W. Cheong Tang , Avery Li-Chun Wang
IPC分类号： G10L15/26
CPC分类号： G06F17/30746 , G06K9/00523 , G10L19/018 , G10L25/48 , G10L25/54 , H04H60/37 , H04H60/58
摘要： A system and method are described for recognizing repeated audio material within at least one media stream without prior knowledge of the nature of the repeated material. The system and method are able to create a screening database from the media stream or streams. An unknown sample audio fragment is taken from the media stream and compared against the screening database to find if there are matching fragments within the media streams by determining if the unknown sample matches any samples in the screening database.

40. 发明授权

US08570287B2 Capacitive touch panel having color compensation layer 有权
标题翻译：具有彩色补偿层的电容式触摸屏
公开(公告)号：US08570287B2
公开(公告)日：2013-10-29
申请号：US12729950
申请日：2010-03-23
申请人： Wen-Chun Wang , Ping-Wen Huang , Chih-Jung Teng , Huang-Ming Chang
发明人： Wen-Chun Wang , Ping-Wen Huang , Chih-Jung Teng , Huang-Ming Chang
IPC分类号： G06F3/041
CPC分类号： G06F3/044 , G06F2203/04111
摘要： A capacitive touch panel includes a transparent substrate, a plurality of first sensing electrode sets and second sensing electrode sets provided on the transparent substrate. Each first sensing electrode set includes a plurality of first sensing electrodes electrically coupled in series through a plurality of first wires. Each second sensing electrode set includes a plurality of second sensing electrodes. A color compensation layer having a mesh-like pattern is provided between the first sensing electrodes and the second sensing electrodes. The second wires cover part of the surface of the color compensation layer to couple the second sensing electrodes in series.
摘要翻译：电容触摸面板包括透明基板，设置在透明基板上的多个第一感测电极组和第二感测电极组。每个第一感测电极组包括通过多个第一导线串联电耦合的多个第一感测电极。每个第二感测电极组包括多个第二感测电极。在第一感测电极和第二感测电极之间设置具有网状图案的色彩补偿层。第二导线覆盖色彩补偿层的表面的一部分，以串联连接第二感测电极。

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