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    • 31. 发明授权
    • Method and arrangement for controlling multiple test access port control modules
    • 用于控制多个测试访问端口控制模块的方法和装置
    • US06385749B1
    • 2002-05-07
    • US09283809
    • 1999-04-01
    • Swaroop AdusumilliJames SteeleDavid Cassetti
    • Swaroop AdusumilliJames SteeleDavid Cassetti
    • G01R3128
    • G01R31/318563G01R31/318555
    • An arrangement controls an IC designed with multiple “core” circuits, such as multiple CPUs, with each core circuit including its own TAP controller. According to one example embodiment, multiple test-access port (TAP) controllers coupled to a common interface are controlled by adapting each TAP controller to receive input signals, determine if the TAP controller is enabled, and generate status signals and test signals. An output circuit responds to the TAP controllers by outputting one of the test signals respectively provided by the multiple TAP controllers, and a link module is used to maintain one of the TAP controllers enabled at a given time. The above-embodiment is useful, for example, in connection with IC applications that require an increasing number of core circuits without increasing the circuit area of the IC and/or the number of IC pins, and can be implemented to avoid changing existing structures of TAP controllers.
    • 一种布置控制了设计有多个“核心”电路的IC,例如多个CPU,每个核心电路包括其自己的TAP控制器。 根据一个示例性实施例,耦合到公共接口的多个测试访问端口(TAP)控制器通过使每个TAP控制器适配以接收输入信号,确定TAP控制器是否被使能并产生状态信号和测试信号来控制。 输出电路通过输出由多个TAP控制器分别提供的一个测试信号来响应于TAP控制器,并且链路模块用于在给定时间内维持其中一个TAP控制器的使能。 上述实施例例如与需要越来越多的核心电路的IC应用有关,而不增加IC的电路面积和/或IC引脚的数量,并且可以实现以避免改变现有的结构 TAP控制器。