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31. 发明授权

US09544475B2 Data transfer apparatus and data transfer method 有权
标题翻译：数据传输装置和数据传输方法
公开(公告)号：US09544475B2
公开(公告)日：2017-01-10
申请号：US13785234
申请日：2013-03-05
申请人： MegaChips Corporation
发明人： Kazuma Takahashi
IPC分类号： H04N5/217 , H04N5/357
CPC分类号： H04N5/2173 , H04N5/3572
摘要： A data transfer apparatus includes a cache memory having a storing portion for writing and reading data at a higher speed than an image data storing portion which stores image data GD of an input image, and data transfer request means for outputting, to the cache memory, a transfer request for image data in a certain region of the input image. The cache memory reads unstored image data from the image data storing portion beyond a reading region corresponding to a transfer request every pixel row if image data in a pixel row included in the reading region is not stored in the storing portion of the cache memory. Moreover, the data transfer request means sequentially gives, in arrangement order in a horizontal direction of an input image, a transfer request for image data in each of reading regions arranged in the horizontal direction.
摘要翻译：数据传送装置包括：高速缓存存储器，具有用于以比存储输入图像的图像数据GD的图像数据存储部分更高的速度写入和读取数据的存储部分;以及数据传送请求装置，对输入图像的特定区域中的图像数据的传送请求。如果读取区域中包括的像素行中的图像数据未被存储在高速缓冲存储器的存储部分中，则高速缓冲存储器从每个像素行读取与图像数据存储部分相对应的读取区域的未分配图像数据。此外，数据传送请求装置按照排列顺序在输入图像的水平方向上顺序地给出沿水平方向布置的每个读取区域中的图像数据的传送请求。

32. 发明授权

US09532075B2 Image processor 有权
标题翻译：图像处理器
公开(公告)号：US09532075B2
公开(公告)日：2016-12-27
申请号：US14219148
申请日：2014-03-19
申请人： MegaChips Corporation
发明人： Takeaki Komuro , Nobuyuki Takasu , Kazuhiro Saito
IPC分类号： H04N19/13 , H04N19/82 , H04N19/70 , H04N19/42
CPC分类号： H04N19/82 , H04N19/13 , H04N19/42 , H04N19/70
摘要： The image processor includes a ⅓ multiplier circuit that approximately multiplies an input value X by ⅓. The ⅓ multiplier circuit includes a loop operation circuit that repeatedly perform a predetermined operation by loops, and a setting circuit that sets a required number of loops in the loop operation circuit. The loop operation circuit includes a register that receives an input of an input value, a bit shift circuit that performs bit shift by 2 bits to the right on a value output from the register, and an adder circuit that adds an input value and a value output from the bit shift circuit, and inputs the added value to the register.
摘要翻译：图像处理器包括将输入值X近似乘以1/3的¼乘法器电路。 ¼乘法器电路包括通过循环重复执行预定操作的环路操作电路，以及在环路操作电路中设置所需数量的环路的设置电路。环路运算电路包括接收输入值的输入的寄存器，在从寄存器输出的值上向右移位2位的位移电路，以及将输入值和值相加的加法电路从位移电路输出，并将附加值输入到寄存器。

33. 发明授权

US09477882B2 Object detection apparatus 有权
标题翻译：物体检测装置
公开(公告)号：US09477882B2
公开(公告)日：2016-10-25
申请号：US14656919
申请日：2015-03-13
申请人： MegaChips Corporation
发明人： Yuki Haraguchi , Yujiro Tani
IPC分类号： G06K9/00 , G06K9/46
CPC分类号： G06K9/00369 , G06K9/00664 , G06K9/4609
摘要： In an object detection apparatus (1), a window setting unit (12) extracts a window (52) from an edge image (22), to thereby generate an ordinary window image (23). When an edge strength of the ordinary window image (23) is not larger than a usage reference value, a used image determination unit (15) determines to use the ordinary window image (23) for calculation of an identification value (30) indicating a degree of presence of a pedestrian in the window (52). When the edge strength of the ordinary window image (23) is larger than the usage reference value, a pixel value correction unit (13) generates a corrected window image (24) having an edge strength smaller than that of the ordinary window image (23) from the ordinary window image (23). When the edge strength of the corrected window image (24) is not larger than the usage reference value, the used image determination unit (15) determines the corrected window image (24) to be used for calculation of the identification value (30).
摘要翻译：在物体检测装置（1）中，窗口设定单元（12）从边缘图像（22）提取窗口（52），从而生成普通窗口图像（23）。当普通窗口图像（23）的边缘强度不大于使用参考值时，所使用的图像确定单元（15）确定使用普通窗口图像（23）来计算识别值（30），该识别值指示窗户（52）中行人的存在程度。当普通窗口图像（23）的边缘强度大于使用参考值时，像素值校正单元（13）生成边缘强度小于普通窗口图像（23）的校正窗口图像（24））从普通窗口图像（23）。当校正窗口图像（24）的边缘强度不大于使用参考值时，所使用的图像确定单元（15）确定用于识别值（30）的计算的校正窗口图像（24）。

34. 发明授权

US09477594B2 Semiconductor device and control method for reading instructions 有权
标题翻译：半导体器件和读取指令的控制方法
公开(公告)号：US09477594B2
公开(公告)日：2016-10-25
申请号：US14656984
申请日：2015-03-13
申请人： MegaChips Corporation
发明人： Takao Kusano
IPC分类号： G06F12/02 , G06F3/06
CPC分类号： G06F12/0246 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G06F2212/1021 , G06F2212/2022 , G06F2212/7208 , Y02D10/13
摘要： A system-in-package semiconductor device with a CPU, a first flash memory configured to store first instructions to be executed by the CPU, and a second flash memory configured to store second instructions to be executed in accordance with a predetermined control instruction included in the first instructions. The semiconductor device determines, prior to the CPU executing the instruction, whether an instruction read out from the first flash memory is a branch instruction, and if it is determined to be the branch instruction, causes the second flash memory to perforin read-out operation using a branch destination address value indicated by the branch instruction, and if a value of a program counter of the CPU matches the branch destination address value, while the second flash memory is in a state of being ready for read-out operation in accordance with the instruction, starts reading out the second instructions from the second flash memory.
摘要翻译：一种具有CPU的系统级封装半导体器件，被配置为存储要由CPU执行的第一指令的第一闪存，以及被配置为存储根据包括在其中的预定控制指令执行的第二指令的第二闪存第一个说明。半导体器件在CPU执行指令之前确定从第一闪存读出的指令是否是分支指令，并且如果确定为分支指令，则使第二闪存进行穿孔读出操作使用由分支指令指示的分支目的地地址值，并且如果CPU的程序计数器的值与分支目的地地址值匹配，则当第二闪存处于准备好用于读取操作的状态时该指令开始从第二个闪存读出第二个指令。

35. 发明申请

US20160284055A1 PIXEL INTERPOLATION PROCESSING APPARATUS, IMAGING APPARATUS, INTERPOLATION PROCESSING METHOD, AND INTEGRATED CIRCUIT 有权
标题翻译：像素插值处理装置，成像装置，插值处理方法和集成电路
公开(公告)号：US20160284055A1
公开(公告)日：2016-09-29
申请号：US15171953
申请日：2016-06-02
申请人： MegaChips Corporation
发明人： Junji MORIGUCHI , Hiromu HASEGAWA
IPC分类号： G06T3/40 , H04N9/04 , H04N5/369
CPC分类号： G06T3/4015 , G06T3/4007 , H04N5/3696 , H04N9/045 , H04N2209/046
摘要： A pixel interpolation processing apparatus and an image capturing apparatus are provided that are capable of performing a pixel interpolation process properly even when the pattern of color filter array is unknown. An imaging apparatus includes an imaging unit having a single-chip image sensor having four-color filter array for obtaining an image signal, and the imaging apparatus uses pixel data for a surrounding area around a target pixel to calculate a plurality of sets of correlation values in two directions orthogonal to each other, and determines the correlation direction based on these correlation values. The imaging apparatus obtains first to fourth color component pixel values for the target pixel relying on the fact that the high-frequency components of pixel signals in a direction orthogonal to a direction with high correlation have high correlation regardless of the color of color filters, thus allowing for performing pixel interpolation processing properly even if the four colors of color filters are unknown.
摘要翻译：提供一种像素插值处理装置和图像捕获装置，即使当滤色器阵列的图案未知时，也能够适当地执行像素内插处理。一种成像设备包括具有用于获得图像信号的具有四色滤波器阵列的单片图像传感器的成像单元，并且该成像设备使用针对目标像素周围区域的像素数据来计算多组相关值在彼此正交的两个方向上，并且基于这些相关值来确定相关方向。该成像装置根据以下事实获得目标像素的第一至第四颜色分量像素值：与相关性高的方向正交的方向上的像素信号的高频分量与滤色器的颜色无关，因此具有高相关性即使四种颜色的滤色器未知，也能够适当地执行像素内插处理。

36. 发明申请

US20160282875A1 MOVING OBJECT CONTROLLER, LANDMARK, AND MOVING OBJECT CONTROL METHOD 审中-公开
标题翻译：移动对象控制器，LANDMARK和移动对象控制方法
公开(公告)号：US20160282875A1
公开(公告)日：2016-09-29
申请号：US15076778
申请日：2016-03-22
申请人： MegaChips Corporation , Kyushu Institute of Technology
发明人： Kenta NAGAMINE , Norikazu IKOMA , Fumiya SHINGU , Hiromu HASEGAWA
IPC分类号： G05D1/02 , G06K9/00 , G06T7/20 , G06T7/60 , G06T7/00 , G05D1/00 , G06K9/62
CPC分类号： G06T7/20 , G05D1/0236 , G05D1/0248 , G05D1/0274 , G06K9/00664 , G06K9/6201 , G06T7/50 , G06T7/60 , G06T7/73 , Y10S901/01 , Y10S901/47
摘要： The position of a moving object is estimated with high accuracy based on landmark information, and highly accurate state estimation is performed appropriately at high speed. A landmark detection unit obtains a distance between the moving object and each of two or more landmarks as landmark distance information based on observation data obtained by an observation obtaining unit. A candidate area obtaining unit determines a candidate area for a position of the moving object based on the landmark distance information obtained by the landmark detection unit, and obtains candidate area information indicating the determined candidate area. A state estimation unit estimates an internal state of the moving object based on the observation data, the landmark distance information, and the candidate area information to obtain moving object internal state estimation data, and estimates the environmental map based on the candidate area information and the landmark distance information to obtain environmental map data.
摘要翻译：基于地标信息，高精度地估计移动物体的位置，高精度地进行高精度的状态估计。地标检测单元基于由观察获取单元获得的观察数据，获取移动物体与两个以上的地标中的每一个之间的距离作为地标距离信息。候选区域获取单元基于由地标检测单元获得的地标距离信息来确定移动物体的位置的候选区域，并获得表示确定的候补区域的候补区域信息。状态估计单元基于观测数据，地标距离信息和候补区域信息来估计移动物体的内部状态，以获得运动对象内部状态估计数据，并根据候选区域信息和地标距离信息获取环境地图数据。

37. 发明授权

US09443319B2 Image processor for motion searches 有权
标题翻译：用于运动搜索的图像处理器
公开(公告)号：US09443319B2
公开(公告)日：2016-09-13
申请号：US14367632
申请日：2012-11-30
申请人： MegaChips Corporation
发明人： Kazuhiro Saito , Yujiro Tani , Shinichi Murata
IPC分类号： G06K9/00 , G06T7/20 , H04N19/433
CPC分类号： G06T7/20 , H04N19/433
摘要： An image processor includes an LSRAM accessible with a higher speed than a frame memory and configured to hold a second image in a predetermined range of a first image, an image production unit configured to read an image in a predetermined range of the second image and produce a third image for rough search based on the read image, an MSRAM accessible with a higher speed than the frame memory and configured to hold the third image, a first search unit configured to read the third image and perform first motion search based on the third image, and a second search unit configured to read a fourth image in a predetermined range of the second image based on a search result by the first search unit and perform second motion search that is more detailed than the first motion search based on the fourth image.
摘要翻译：一种图像处理器包括一个LSRAM，可以以比帧存储器更高的速度进行访问，并被配置为将第二个图像保存在第一个图像的预定范围内;图像生成单元被配置为在第二个图像的预定范围内读取图像，基于所述读取图像的用于粗略搜索的第三图像，以所述帧存储器高于所述帧存储器的速度可访问并被配置为保持所述第三图像的MSRAM;第一搜索单元，被配置为读取所述第三图像，并且基于所述第三图像执行第一运动搜索图像，以及第二搜索单元，被配置为基于第一搜索单元的搜索结果来读取第二图像的预定范围中的第四图像，并且基于第四图像执行比第一运动搜索更详细的第二运动搜索。

38. 发明授权

US09443318B2 Line segment and arc detection apparatus 有权
标题翻译：线段和电弧检测装置
公开(公告)号：US09443318B2
公开(公告)日：2016-09-13
申请号：US14240912
申请日：2012-07-20
申请人： Hiromu Hasegawa
发明人： Hiromu Hasegawa
IPC分类号： G06K9/36 , G06T7/00 , G06K9/46
CPC分类号： G06K9/4633 , G06K9/4652 , G06T7/13 , G06T7/168 , G06T2207/10024 , G06T2207/20061
摘要： An apparatus and method to detect a line segment or arc using Hough transform. A Hough transform unit performs contour extraction on brightness image data to generate contour image data, with pixels having a pixel value of 0 to 255, performs the Hough transform on points in the contour image data, and counts additional values represented by pixel values of points in the contour image data in a Hough table. The Hough transform unit performs contour extraction on first to third component data to generate first to third contour data with pixels having a pixel value of 0 to 255, performs the Hough transform on points in the first to third contour data, and counts additional values represented by pixel values of points in the first to third contour data in the Hough table. The detection unit comprehensively evaluates the counts to detect a line segment or arc.
摘要翻译：使用霍夫变换检测线段或弧的装置和方法。霍夫变换单元对亮度图像数据执行轮廓提取，以生成具有像素值为0至255的像素的轮廓图像数据，对轮廓图像数据中的点执行霍夫变换，并对由点的像素值表示的附加值进行计数在Hough表中的轮廓图像数据中。霍夫变换单元在第一至第三分量数据上执行轮廓提取，以生成具有像素值为0至255的像素的第一至第三轮廓数据，对第一至第三轮廓数据中的点执行霍夫变换，并计数表示的附加值在霍夫表中第一到第三轮廓数据中的点的逐像素值。检测单元综合评估检测线段或弧线的计数。

39. 发明申请

US20160218715A1 DIFFERENTIAL OUTPUT BUFFER 有权
标题翻译：差分输出缓冲器
公开(公告)号：US20160218715A1
公开(公告)日：2016-07-28
申请号：US15002513
申请日：2016-01-21
申请人： MegaChips Corporation
发明人： Tomoaki Kuramasu
IPC分类号： H03K19/0185
CPC分类号： H03K19/018514
摘要： The differential output buffer comprises the differential output circuit, and the bias voltage generation circuit that is the replica circuit of the differential output circuit. The bias voltage generation circuit generates, by the operational amplifier, the bias voltage for controlling currents respectively flowing in the first current source of the differential output buffer and the second current source of the bias voltage generation circuit such that the voltage of the third internal node between the third internal and external resistors and the third switch of the bias voltage generation circuit becomes equal to the reference voltage equal to the voltage of the first internal node when the first switch of the differential output buffer is in an ON state or equal to the voltage of the second internal node when the second switch of the differential output buffer is in an ON state.
摘要翻译：差分输出缓冲器包括差分输出电路和作为差分输出电路的复制电路的偏置电压产生电路。偏置电压产生电路由运算放大器产生用于控制分别在差分输出缓冲器的第一电流源和偏置电压产生电路的第二电流源中流动的电流的偏置电压，使得第三内部节点当差分输出缓冲器的第一开关处于导通状态或等于导通状态时，偏置电压产生电路的第三内部和外部电阻器和第三开关之间的电压变得等于等于第一内部节点的电压的参考电压当差分输出缓冲器的第二开关处于ON状态时，第二内部节点的电压。

40. 发明申请

US20160179472A1 RANDOM NUMBER GENERATION DEVICE AND METHOD FOR GENERATING RANDOM NUMBER 审中-公开
标题翻译：随机数生成装置和随机数生成方法
公开(公告)号：US20160179472A1
公开(公告)日：2016-06-23
申请号：US14974081
申请日：2015-12-18
申请人： MegaChips Corporation
发明人： Takahiko SUGAHARA
IPC分类号： G06F7/58
CPC分类号： G06F7/588
摘要： A random number generation device includes a circuitry configured to output an output value of alternating 0 and 1 of two-valued logic, determine a sampling timing by generating data in which values change irregularly based on the output value, and generate a random number by sampling the output value at the sampling timing.
摘要翻译：随机数生成装置包括被配置为输出二值逻辑的交替0和1的输出值的电路，通过生成基于输出值不规则地改变值的数据来确定采样定时，并且通过采样生成随机数采样时间的输出值。

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