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31. 发明申请

US20140089861A1 METHOD AND SYSTEM FOR DISPLAYING THREE-DIMENSION INTERFACE BASED ON ANDROID SYSTEM 有权
标题翻译：用于显示基于ANDROID系统的三维接口的方法和系统
公开(公告)号：US20140089861A1
公开(公告)日：2014-03-27
申请号：US13816873
申请日：2012-09-27
申请人： Shenzhen Coocaa Network Technology Co., Ltd.
发明人： Kevin Zhang
IPC分类号： G06F3/0481
CPC分类号： G06F3/04815 , G06F9/451 , G06F2203/04802
摘要： The present disclosure provides a method based on an android system for displaying a three-dimension interface, including: a three-dimension engine library transmitting a user operation command to an android system service layer; the android system service layer transmitting the user operation command to a java terminal; the java terminal generating a responding instruction according to the user operation command and sending the responding instruction to the android system service layer; the android system service layer sending the responding instruction to the three-dimension engine library; and the three-dimension engine library controlling a three-dimension model document to load a three-dimension model corresponding to the responding instruction and redrawing the three-dimension interface accordingly. In the present disclosure, with the android system service layer, a decline of processing ability when the system resources are overloaded in an instant can be avoided.
摘要翻译：本公开提供了一种基于用于显示三维界面的android系统的方法，包括：向Android系统服务层发送用户操作命令的三维引擎库; Android系统服务层将用户操作命令发送到java终端; 所述java终端根据用户操作命令生成响应指令，并将所述响应指令发送到所述android系统服务层; android系统服务层向三维引擎库发送响应指令; 并且三维引擎库控制三维模型文档以加载对应于响应指令的三维模型并相应地重新绘制三维界面。在本公开中，对于android系统服务层，可以避免当系统资源在瞬间过载时处理能力的下降。

32. 发明授权

US08395923B2 Antifuse programmable memory array 有权
标题翻译：防毒可编程存储器阵列
公开(公告)号：US08395923B2
公开(公告)日：2013-03-12
申请号：US12639446
申请日：2009-12-16
申请人： Zhanping Chen , Sarvesh H. Kulkarni , Kevin Zhang
发明人： Zhanping Chen , Sarvesh H. Kulkarni , Kevin Zhang
IPC分类号： G11C17/00 , G11C7/00 , G11C17/18 , G11C5/14
CPC分类号： G11C17/16 , G11C17/18
摘要： Techniques and circuitry are disclosed for efficiently implementing programmable memory array circuit architectures, such as PROM, OTPROM, and other such programmable non-volatile memories. The circuitry employs an antifuse scheme that includes an array of memory bitcells, each containing a program device and an antifuse element configured with current path isolation well and for storing the memory cell state. The bitcell configuration, which can be used in conjunction with column/row select circuitry, power selector circuitry, and/or readout circuitry, allows for high-density memory array circuit designs and layouts.
摘要翻译：公开了用于有效实现诸如PROM，OTPROM和其它这样的可编程非易失性存储器的可编程存储器阵列电路架构的技术和电路。电路采用反熔丝方案，其包括存储位单元阵列，每个存储器单元包含程序设备和配置有电流路径隔离阱并用于存储存储单元状态的反熔丝元件。可以与列/行选择电路，功率选择器电路和/或读出电路结合使用的位单元配置允许高密度存储器阵列电路设计和布局。

33. 发明授权

US07660498B2 Multimode reflective tap 有权
标题翻译：多模反光丝锥
公开(公告)号：US07660498B2
公开(公告)日：2010-02-09
申请号：US12103365
申请日：2008-04-15
申请人： Kevin Zhang , Guojun Lai , Youjian Wu , Fahua Lan
发明人： Kevin Zhang , Guojun Lai , Youjian Wu , Fahua Lan
IPC分类号： G02B6/32
CPC分类号： G02B6/327 , G02B6/14
摘要： A glass optical reflective tap is described that optically connects two optical fibers and may tap a portion of the light that is being communicated between the optical fibers. In one embodiment of the invention, the optical filter includes two D-lenses that operate as focusing or collimator lenses. The first D-lens focuses an optical signal onto a tap filter that allows a majority of the light within an optical signal to pass and also reflects a small portion of optical signal light to a reflective port. The second D-lens focuses the passed light into a transmission port of an optical fiber.
摘要翻译：描述了玻璃光学反射抽头，其光学地连接两根光纤并且可以抽出正在光纤之间连通的一部分光。在本发明的一个实施例中，滤光器包括作为聚焦或准直透镜操作的两个D透镜。第一个D透镜将光信号聚焦到抽头滤波器上，允许光信号内的大部分光通过，并将一小部分光信号光反射到反射端口。第二个D镜头将通过的光线聚焦到光纤的传输端口。

34. 发明授权

US07561766B2 Thin film interleaver 有权
标题翻译：薄膜交织器
公开(公告)号：US07561766B2
公开(公告)日：2009-07-14
申请号：US11753499
申请日：2007-05-24
申请人： Johhny Zhong , Yin Zhang , Steve Wang , Ping Xie , Kevin Zhang
发明人： Johhny Zhong , Yin Zhang , Steve Wang , Ping Xie , Kevin Zhang
IPC分类号： G02B6/26 , G02B6/42 , G02B6/32
CPC分类号： G02B6/2937 , G02B6/29386 , H04J14/02
摘要： A thin film interleaver device is disclosed. The thin film interleaver includes thin film optics. The thin film(s) are formed such that they reflect one group of wavelengths while allowing a second group of wavelengths to pass through the thin film(s). The thin film(s) exhibit a flat top frequency response across the channel bandwidths of the multiplexed signal for which the thin film filter is designed such that the thin film interleaver is less sensitive to wavelength drift and temperature variations.
摘要翻译：公开了一种薄膜交织器件。薄膜交织器包括薄膜光学器件。薄膜形成为使得它们反射一组波长，同时允许第二组波长穿过薄膜。该薄膜在多路复用信号的通道带宽上表现出平坦的顶频响应，薄膜滤波器被设计成使得薄膜交织器对波长漂移和温度变化较不敏感。

35. 发明申请

US20080151593A1 Fuse cell array with redundancy features 有权
标题翻译：具有冗余特性的保险丝座阵列
公开(公告)号：US20080151593A1
公开(公告)日：2008-06-26
申请号：US11644381
申请日：2006-12-22
申请人： Zhanping Chen , Jonathan P. Douglas , Praveen Mosalikanti , Kevin Zhang , Gregory F. Taylor
发明人： Zhanping Chen , Jonathan P. Douglas , Praveen Mosalikanti , Kevin Zhang , Gregory F. Taylor
IPC分类号： G11C17/16
CPC分类号： G11C17/16 , G11C17/14 , G11C17/18 , G11C29/816
摘要： An apparatus, a method, and a system for a fuse cell array are disclosed herein. A plurality of fuse cells are arranged in an array. One or more fuse cells include a pair of fuse devices to output a pair of voltages, respectively, wherein the pair of fuse devices are redundantly programmed. A sense amplifier is coupled to the plurality of fuse cells to read the pair of voltage outputs from each of the plurality of fuse cells, respectively. A comparator circuit is coupled to the sense amplifier to compare the pair of voltage outputs for each of the plurality of fuse cells and to output the compared result.
摘要翻译：本文公开了一种用于熔丝单元阵列的装置，方法和系统。多个熔丝单元被布置成阵列。一个或多个保险丝单元包括分别输出一对电压的一对熔丝器件，其中该对熔丝器件被冗余编程。感测放大器耦合到多个熔丝单元以分别从多个熔丝单元中的每一个读出一对电压输出。比较器电路耦合到读出放大器以比较多个熔丝单元中的每一个的一对电压输出并输出比较结果。

36. 发明授权

US07177176B2 Six-transistor (6T) static random access memory (SRAM) with dynamically variable p-channel metal oxide semiconductor (PMOS) strength 有权
标题翻译：具有动态可变p沟道金属氧化物半导体（PMOS）强度的六晶体管（6T）静态随机存取存储器（SRAM）
公开(公告)号：US07177176B2
公开(公告)日：2007-02-13
申请号：US10883609
申请日：2004-06-30
申请人： Bo Zheng , Kevin Zhang , Fatih Hamzaoglu , Yih (Eric) Wang
发明人： Bo Zheng , Kevin Zhang , Fatih Hamzaoglu , Yih (Eric) Wang
IPC分类号： G11C11/00 , G11C5/14 , G11C7/10
CPC分类号： G11C11/417 , G11C11/412
摘要： In embodiments of the present invention, a static random access memory (SRAM) device has an array of memory cells in columns and rows. An individual memory cell includes two PMOS pull-up devices coupled to two NMOS pull-down devices. In READ mode and/or STANDBY/NO-OP mode of a column, the two PMOS pull-up devices are effectively strengthened by forward biasing the PMOS n-wells or by utilizing a lower threshold voltage PMOS device by implanting a lower halo dose in the PMOS device. In WRITE mode of a column, the two PMOS pull-up devices are effectively weakened by reverse biasing the PMOS n-wells or by coupling the sources of the NMOS devices to virtual ground (VSSi).
摘要翻译：在本发明的实施例中，静态随机存取存储器（SRAM）装置具有列和行中的存储器单元阵列。单个存储单元包括耦合到两个NMOS下拉器件的两个PMOS上拉器件。在列的READ模式和/或STANDBY / NO-OP模式下，通过正向偏置PMOS n阱或利用较低阈值电压PMOS器件，通过将较低的光晕剂量 PMOS器件。在列的写入模式下，通过反向偏置PMOS n阱或通过将NMOS器件的源耦合到虚拟接地（V SUB SSi），两个PMOS上拉器件被有效地削弱。

37. 发明授权

US07079426B2 Dynamic multi-Vcc scheme for SRAM cell stability control 有权
公开(公告)号：US07079426B2
公开(公告)日：2006-07-18
申请号：US10950740
申请日：2004-09-27
申请人： Kevin Zhang , Fatih Hamzaoglu , Lin Ma
发明人： Kevin Zhang , Fatih Hamzaoglu , Lin Ma
IPC分类号： G11C7/00 , G11C8/00
CPC分类号： G11C5/14 , G11C11/413
摘要： A dynamic multi-voltage memory array features SRAM cells that are subjected to different biasing conditions, depending on the operating mode of the cells. The selected SRAM cell receives a first voltage when a read operation is performed, and receives a second voltage when a write operation is performed. By biasing the cell differently for the two distinct operations, a total decoupling of the read and write operations is achieved. The disclosed memory array, as well as future SRAM designs incorporating the multi-voltage capability thus avoid the conflicting requirements of read and write operations. Random single-bit failures of the memory array are reduced, due to the improvement in read stability and write margin.

38. 发明授权

US06862207B2 Static random access memory 有权
公开(公告)号：US06862207B2
公开(公告)日：2005-03-01
申请号：US10271500
申请日：2002-10-15
申请人： Liqiong Wei , Kevin Zhang
发明人： Liqiong Wei , Kevin Zhang
IPC分类号： G11C11/419 , G11C11/00 , G11C8/00
CPC分类号： G11C11/419
摘要： A method and apparatus for a four transistor SRAM comprising an array or block of cells. Each cell comprises a pair of pass transistors and a pair of pull-down transistors. In one embodiment of the invention, when the SRAM block is in a standby mode, the difference between the voltage at the gate and the voltage at the source of each pass transistor is greater than 0, and less than the threshold voltage of the pass transistor. In one embodiment of the invention a ground connection of the memory cell is switched such that when the SRAM block is in the standby mode, the ground connection is a virtual ground connection and when the SRAM block is in an active mode the ground connection is a global ground connection.

39. 发明授权

US11573647B1 Back-drive of motor based on position data 有权
公开(公告)号：US11573647B1
公开(公告)日：2023-02-07
申请号：US17028385
申请日：2020-09-22
申请人： Amazon Technologies, Inc.
发明人： Hua Wang , Yi Li , Abhay Gupta , Ehsan Omidi , Shichang Liu , Kevin Zhang , Sanket Parikh , Anchit Rastogi
IPC分类号： G06F3/03 , H02P3/06 , G06F3/01 , H02P7/025 , H02P7/06 , H02P7/28 , H02P6/28
摘要： Techniques for controlling operations of a motor based on position errors are described. In an example, a user device sends an amount of electrical current to the motor to cause the motor to move. The user device also determines the motor is in position for a time interval despite the amount of electrical current. Based at least one the time interval and the amount of electrical current, the user device determines a position difference associated with a target position and a measured position of the motor during the time interval, and reduces the amount of electrical current based at least in part on the time interval.

40. 发明授权

US11531682B2 Federated search of multiple sources with conflict resolution 有权
公开(公告)号：US11531682B2
公开(公告)日：2022-12-20
申请号：US16746717
申请日：2020-01-17
申请人： Palantir Technologies Inc.
发明人： Danielle Kramer , Andrew Israel , Jeffrey Chen , David Cohen , Stephen Freiberg , Bryan Offutt , Matt Avant , Peter Wilczynski , Jason Hoch , Robert Liu , William Waldrep , Kevin Zhang , Alexander Landau , David Tobin
IPC分类号： G06F16/27 , G06F16/25 , G06F16/2457 , G06F16/9535 , G06F16/248
摘要： Methods and apparatuses related to federated search of multiple sources with conflict resolution are disclosed. A method may comprise obtaining a set of data ontologies (e.g., types, properties, and links) associated with a plurality of heterogeneous data sources; receiving a selection of a graph comprising a plurality of graph nodes connected by one or more graph edges; and transforming the graph into one or more search queries across the plurality of heterogeneous data sources. A method may comprise obtaining a first data object as a result of executing a first search query across a plurality of heterogeneous data sources; resolving, based on one or more resolution rules, at least the first data object with a repository data object; deduplicating data associated with at least the first data object and the repository data object prior to storing the deduplicated data in a repository that has a particular data model.

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