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31. 发明授权

US5260863A Control of a discontinuous current by a thyristor rectifier with inductive load 失效
标题翻译：通过具有感性负载的晶闸管整流器控制不连续电流
公开(公告)号：US5260863A
公开(公告)日：1993-11-09
申请号：US812866
申请日：1991-12-20
申请人： Bernd L. Ackermann , Peter L. Herkel
发明人： Bernd L. Ackermann , Peter L. Herkel
IPC分类号： H02M1/08 , H02M7/162 , H03K17/13 , H02M5/443
CPC分类号： H02M7/1623 , H02M1/08 , H03K17/136
摘要： For controlling the current in an inductive load, the gate current used to fire thyristors in a rectifier is controlled to reach zero at exactly the same time, within a given half-wave, as the current in the inductive load which receives the voltage from the rectifier, keeping gate voltage on as long as thyristor current is on. A discontinuous thyristor converter current signal is detected and used to generate an enable signal in conjunction with a thyristor gate voltage. The enable signal, in synchronism with a power supply line voltage, provides a pair of channeling signals which then, depending upon whether the field current is positive or negative, activate the gate voltages of the thyristors such that the gate voltages end exactly at that time, within a given half-wave, where the generator field current becomes discontinuous.
摘要翻译：为了控制感性负载中的电流，用于在整流器中触发晶闸管的栅极电流被控制为在给定的半波内完全相同的时间达到零，作为接收来自电感的电感的电感负载中的电流整流器，只要晶闸管电流接通，就保持栅极电压。检测不连续的晶闸管转换器电流信号并用于产生与晶闸管栅极电压相结合的使能信号。使能信号与电源线电压同步，提供一对通道信号，然后根据励磁电流是正还是负，激活晶闸管的栅极电压，使得栅极电压在那时正好结束在给定的半波内，发生器场电流变得不连续。

32. 发明授权

US5032972A Method and circuit configuration for increasing the efficiency of resonant converter power supply circuits 失效
标题翻译：提高谐振变换器电源电路效率的方法和电路配置
公开(公告)号：US5032972A
公开(公告)日：1991-07-16
申请号：US433672
申请日：1989-11-07
申请人： Ricardo Erckert
发明人： Ricardo Erckert
IPC分类号： H03K17/13 , H03K17/687
CPC分类号： H03K17/133 , H03K17/6871
摘要： A method and circuit configuration for closed-loop control of trigger signals of switching transistors in a resonant converter power supply circuit element having closed-loop control dependent on a zero crossing recognition, wherein a prematurely responding zero crossing detector is provided, includes comparing a period of time between the generation of a trigger signal and the switching of a power transistor with a time interval between a premature response of a zero crossing detector and an actual zero crossing. This is done in order to obtain a closed-loop control signal for controlling a deviation action threshold of the zero crossing detector.
摘要翻译：一种用于闭环控制谐振转换器电源电路元件中的开关晶体管的触发信号的方法和电路配置，所述谐振变换器电源电路元件具有取决于过零点识别的闭环控制，其中提供过早响应的过零检测器，在产生触发信号和功率晶体管的切换之间的时间间隔在零交叉检测器的过早响应与实际零交叉之间的时间间隔内。这是为了获得用于控制过零检测器的偏差动作阈值的闭环控制信号而完成的。

33. 发明授权

US4864457A Method and device for controlling an electromagnet whose energization, by means of an ac current, causes engagement of two parts 失效
标题翻译：用于控制电磁铁的方法和装置，其通过交流电流通电导致两部分的接合
公开(公告)号：US4864457A
公开(公告)日：1989-09-05
申请号：US162386
申请日：1988-01-19
申请人： Bataille Christian , Belbel Elie , Jean-Noel Gast , Lauraire Michel
发明人： Bataille Christian , Belbel Elie , Jean-Noel Gast , Lauraire Michel
IPC分类号： H01H9/56 , H03K17/13 , H03K17/725 , H03K17/78
CPC分类号： H03K17/136 , H01H9/56 , H01F2007/1894
摘要： The invention provides a device for controlling an electromagnet having a coil (L) connected to an AC supply source, through a switch (T) controlled by a control circuit.This control circuit comprising a member for determining the voltage zeros of the AC current (R.sub.4, C.sub.3, D.sub.3, IN.sub.1, C.sub.4, R.sub.6, IN.sub.2), a delay element adjusted for obtaining a delay time which corresponds to the privileged control angle of the electromagnet and a switch-over device (FL) controlled by the delay element for delivering to the switch (T), following a control order, a control signal delayed by said delay time. The invention applies particularly to contactors and electromagnetic valves.
摘要翻译： PCT No.PCT / FR87 / 00167 Sec。 371日期1988年1月19日 102（e）日期1988年1月19日PCT提交1987年5月20日PCT公布。出版物WO87 / 07427 日期：1987年12月3日。本发明提供了一种用于控制电磁体的装置，该装置具有通过由控制电路控制的开关（T）连接到AC电源的线圈（L）。该控制电路包括用于确定AC电流（R4，C3，D3，IN1，C4，R6，IN2）的电压零点的部件，被调整以获得对应于电磁铁的特权控制角的延迟时间的延迟元件以及由所述延迟元件控制的切换装置（FL），用于按照控制顺序传送延迟所述延迟时间的控制信号到所述开关（T）。本发明特别适用于接触器和电磁阀。

34. 发明授权

US4818901A Controlled switching CMOS output buffer 失效
标题翻译：控制开关CMOS输出缓冲器
公开(公告)号：US4818901A
公开(公告)日：1989-04-04
申请号：US75641
申请日：1987-07-20
申请人： William R. Young , Harold D. Davidson
发明人： William R. Young , Harold D. Davidson
IPC分类号： H03K19/00 , H03K19/003 , H03K19/017 , H03K19/094 , H03K17/13
CPC分类号： H03K19/00315 , H03K19/0013 , H03K19/01721 , H03K19/09429
摘要： An output buffer initially operating its output transistors in a constant current mode in response to an input signal transition and subsequently operating its output transistors in a constant voltage drive mode as the output approaches the desried output level. The control electrode of the output transistor is controlled by a switchable voltage divider or current mirror. The control of an output transistor may not be activated until the other output transistor is turned off to prevent having both output devices on at the same time.
摘要翻译：输出缓冲器首先响应于输入信号转换以恒定电流模式操作其输出晶体管，并随后在输出接近输出电平时以恒定电压驱动模式操作其输出晶体管。输出晶体管的控制电极由可切换的分压器或电流镜控制。输出晶体管的控制可能不会被激活，直到另一个输出晶体管截止，以防止同时打开两个输出器件。

35. 发明授权

US4717841A Static power switch apparatus 失效
标题翻译：静态电源开关装置
公开(公告)号：US4717841A
公开(公告)日：1988-01-05
申请号：US899371
申请日：1986-08-05
申请人： Bernard Dumortier , Jean-Noel Gast , Francois Sauvel
发明人： Bernard Dumortier , Jean-Noel Gast , Francois Sauvel
IPC分类号： H03K17/725 , H03K17/13 , H03K17/693 , H03K17/722 , H03K17/723 , H03K17/78 , H03K17/79 , H03K17/94 , H03K17/72
CPC分类号： H03K17/7225 , H03K17/723 , H03K17/79
摘要： The disclosure relates to a static power switch circuit having a power switch member having a bidirectional power switch with at least one controlled semiconductor of the thyristor or triac type with power terminals connected to an AC source in series with a load and a circuit for controlling the power switch member having a first control switch whose current path is connected to the gate of the power semiconductor through a full wave rectifier bridge, this switch being connected to a circuit able to generate control energy of the switch in response to an input signal.
摘要翻译： PCT No.PCT / FR85 / 00339 Sec。 371日期：1986年8月5日 102（e）日期1986年8月5日PCT提交1985年11月29日PCT公布。出版物WO86 / 03631 日期：1986年6月19日。本公开涉及一种具有电源开关元件的静态功率开关电路，该电源开关元件具有双向功率开关，该双向功率开关具有晶闸管或三端双向可控硅开关元件的至少一个受控半导体，其功率端子与AC源串联连接，用于控制具有第一控制开关的电源开关构件的电路，该第一控制开关的电流路径通过全波整流桥连接到功率半导体的栅极，该开关连接到能够产生开关的控制能量的电路对输入信号的响应。

36. 发明授权

US4701646A Direct coupled FET logic using a photodiode for biasing or level-shifting 失效
标题翻译：直接耦合FET逻辑，使用光电二极管进行偏置或电平转换
公开(公告)号：US4701646A
公开(公告)日：1987-10-20
申请号：US931791
申请日：1986-11-18
申请人： Bruce A. Richardson
发明人： Bruce A. Richardson
IPC分类号： H03K19/0952 , H03K17/13 , H03K17/687 , H03K17/78
CPC分类号： H03K19/0952 , Y10S136/293
摘要： A direct coupled FET logic (DCFL) circuit element has an active FET with source connected to a low reference voltage and drain connected through a pull-up FET to a higher reference voltage. An input is applied to the gate of the active FET and the output is taken from its drain, the pull-up FET having its gate connected to its source. In depletion mode configuration, a photodiode is connected to the gate of the active FET, the photodiode energizable to downwardly shift the gate voltage. In enhancement mode configuration, a photodiode is connected between source and gate of the pull-up transistor and is energized to shift the gate voltage upwardly. The photodiodes are integrated with the active and pull-up FETs and are energized by light or decay radiation.
摘要翻译：直流耦合FET逻辑（DCFL）电路元件具有有源FET，其源极连接到通过上拉FET连接到较高参考电压的低参考电压和漏极。输入被施加到有源FET的栅极，并且从其漏极取出输出端，上拉FET的栅极连接到其源极。在耗尽模式配置中，光电二极管连接到有源FET的栅极，光电二极管可通电以使栅极电压向下移位。在增强模式配置中，光电二极管连接在上拉晶体管的源极和栅极之间并通电以向上移动栅极电压。光电二极管与有源和上拉FET集成，并由光或衰变辐射激励。

37. 发明授权

US4674022A SCR priming and sweep-out circuit apparatus 失效
标题翻译： SCR启动和扫除电路装置
公开(公告)号：US4674022A
公开(公告)日：1987-06-16
申请号：US880713
申请日：1986-07-01
申请人： Peter Ver Planck
发明人： Peter Ver Planck
IPC分类号： H02M3/135 , H02M1/08 , H02M1/16 , H03K17/00 , H03K17/04 , H03K17/73 , H03K17/732 , H03K17/72 , H03K17/13 , H03K17/292
CPC分类号： H03K17/0403 , H03K17/732 , H03K2217/0036
摘要： An improved priming and sweep-out circuit in which losses are obviated or minimized by transferring energy resulting from such processes back to the power supply, and wherein a single common storage inductance is used in a secondary winding circuit of a saturable-core inductor transformer, the primary of which is series-connected in the SCR-switching energy storage and discharge pulse generating circuit, to serve both in the priming and sweep-out functions, and wherein reset circuit inductance does not participate in the energy transfer or storage functions.
摘要翻译：一种改进的启动和清除电路，其中通过将由这些处理产生的能量转移回电源来消除或最小化损耗，并且其中在饱和磁芯电感器变压器的次级绕组电路中使用单个公共存储电感，其主要串联连接在SCR开关能量存储和放电脉冲发生电路中，用于起动和清除功能，并且其中复位电路电感不参与能量传输或存储功能。

38. 发明授权

US4670810A Zero-current a.c. switching system 失效
标题翻译：零电流a.c. 切换系统
公开(公告)号：US4670810A
公开(公告)日：1987-06-02
申请号：US840065
申请日：1986-03-17
申请人： Bjorn E. Valeur
发明人： Bjorn E. Valeur
IPC分类号： H03K17/13 , H03K17/60 , H03K17/795 , H02H7/20 , H03K17/08
CPC分类号： H03K17/7955 , H03K17/13 , H03K17/601
摘要： A zero-current a.c. switching system is provided for controlling actuation of relay contacts between a power supply and a load. A primary switch selectively energizes the relay to maintain the relay contacts in the closed state. The load current flowing through the relay contacts to the load is sensed. A secondary switch responds to the sensed load current for normally conducting to energize the relay in parallel with the primary switch. The secondary switch ceases conducting each time the load current drops below a predetermined level to cease energizing the relay and open the relay contacts the next time the load current drops below the predetermined level following the opening of the primary switch.
摘要翻译：零电流a.c. 开关系统被提供用于控制电源和负载之间的继电器触点的致动。主开关选择性地使继电器通电以将继电器触点保持在闭合状态。感测到通过继电器接触到负载的负载电流。辅助开关响应感测到的负载电流，以正常导通，使继电器与主开关并联。次级开关每当负载电流下降到预定电平以下时停止导通，以停止对继电器供电，并且在下一次负载电流下降到初级开关断开之后的预定电平时打开继电器触点。

39. 发明授权

US4625126A Clock generator for providing non-overlapping clock signals 失效
标题翻译：时钟发生器，用于提供不重叠的时钟信号
公开(公告)号：US4625126A
公开(公告)日：1986-11-25
申请号：US626378
申请日：1984-06-29
申请人： Darrell E. Tinker , Shyam Dujari
发明人： Darrell E. Tinker , Shyam Dujari
IPC分类号： H03K5/151 , H03K5/05 , H03K5/15 , H03K5/26 , H03K17/13
CPC分类号： H03K5/1515
摘要： The non-overlap clock circuit of this invention is responsive to a variable input signal for producing a first and second output signal that vary respectively with phases opposite to and the same as the input signal. The circuit comprises a NOR-gate with its first input connected to the variable signal input and its second input to the second signal output of the circuit. The output of the NOR-gate is the first signal output of the circuit. The circuit includes a first means such as an enhancement type FET having a gate and a main current path. The gate is supplied with a first output signal of the circuit and the main current path is connected between ground and the second signal output of the circuit. A second means such as a depletion type FET is also employed with its main current path connected between the variable signal input and the second signal output of the circuit. The second signal output of the circuit is thus driven by the variable input signal through the main current path of the second means. The two output signals provided by the circuit do not overlap and will not simultaneously exceed a predetermined signal level.
摘要翻译：本发明的非重叠时钟电路响应于可变输入信号，用于产生分别以与输入信号相反和相同的相位变化的第一和第二输出信号。该电路包括NOR门，其第一输入连接到可变信号输入端，其第二输入端连接到电路的第二信号输出端。 NOR门的输出是电路的第一个信号输出。电路包括诸如具有栅极和主电流路径的增强型FET的第一装置。门提供电路的第一输出信号，主电流通路连接在地和电路的第二信号输出端之间。还采用诸如耗尽型FET的第二装置，其主电流路径连接在可变信号输入端和电路的第二信号输出端之间。因此，电路的第二信号输出由通过第二装置的主电流路径的可变输入信号驱动。由电路提供的两个输出信号不重叠并且不会同时超过预定的信号电平。

40. 发明授权

US4553041A Monolithic zero crossing triac driver 失效
标题翻译：单片机过零三端双向可控硅驱动器
公开(公告)号：US4553041A
公开(公告)日：1985-11-12
申请号：US525196
申请日：1983-08-22
申请人： Hyung J. Yim
发明人： Hyung J. Yim
IPC分类号： H01L29/74 , H01L29/747 , H03K17/13 , H03K17/725 , H03K17/78 , H03K17/79 , H03K17/72
CPC分类号： H03K17/136 , H03K17/79 , Y10T307/773
摘要： A monolithic, light-activated zero-crossing triac driver is provided that includes back-to-back thyristors, whose gates are shunted by both a resistor to reduce the overall sensitivity and a first field effect transistor. A second field effect transistor shunts the gate of the first field effect transistor. A photovoltaic diode is coupled between the base of the thyristor and the gates of the first and second field effect transistors and serves as a current source to charge the gate capacitance of the first field effect transistor.
摘要翻译：提供了一种单片，光激励的过零三端双向可控硅驱动器，其包括背对背晶闸管，其栅极由电阻器分流以降低总体灵敏度和第一场效应晶体管。第二场效应晶体管分流第一场效应晶体管的栅极。光电二极管耦合在晶闸管的基极和第一和第二场效应晶体管的栅极之间，并且用作为第一场效应晶体管的栅极电容充电的电流源。

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