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41. 发明授权

US07756505B2 Semiconductor integrated circuit and a software radio device 有权
标题翻译：半导体集成电路和软件无线电设备
公开(公告)号：US07756505B2
公开(公告)日：2010-07-13
申请号：US11240618
申请日：2005-10-03
申请人： Hiroshi Tanaka , Takanobu Tsunoda , Tetsuroo Honmura , Manabu Kawabe , Masashi Takada
发明人： Hiroshi Tanaka , Takanobu Tsunoda , Tetsuroo Honmura , Manabu Kawabe , Masashi Takada
IPC分类号： H04B1/28 , H04B1/26 , H04M3/00 , H04M1/00 , G06F7/38 , G06F15/00 , G06F15/76 , G06F9/00 , G06F9/44 , H03K19/173 , H03K19/177 , H01L27/10 , H01L29/76
CPC分类号： H04B1/0003 , H04B1/406
摘要： To realize a software radio processing with a reduced circuit area by hardware and software which can process transmission and reception, or synchronization and demodulation in time division. There are provided a circuit DRC that can dynamically change a configuration with a structure that can change the configuration at a high speed, a general processor, and an interface for connection with an external device such as an AD converter or a DA converter. Software radio is realized by using a software radio chip that conducts plural different processing such as transmission and reception, or synchronization and demodulation in time division. The different processing during the radio signal processing can be conducted in time division. As a result, the software radio can be realized with a circuit of a reduced area in a software radio system that allocates regions of an FPGA to the respective processing.
摘要翻译：通过可以处理发送和接收的硬件和软件实现具有减少电路面积的软件无线电处理，或者在时间上进行同步和解调。提供了一种电路DRC，其可以以可以以高速度改变配置的结构动态地改变配置，通用处理器以及用于与诸如AD转换器或DA转换器的外部设备连接的接口。软件无线电通过使用进行多个不同处理的软件无线电芯片来实现，例如发送和接收，或者时分的同步和解调。无线电信号处理期间的不同处理可以分时进行。结果，软件无线电可以通过在分配FPGA的区域到相应处理的软件无线电系统中的减小区域的电路来实现。

42. 发明申请

US20100166030A1 EXPOSURE APPARATUS, LIGHT SOURCE APPARATUS AND METHOD OF MANUFACTURING DEVICE 失效
标题翻译：曝光装置，光源装置和制造装置的方法
公开(公告)号：US20100166030A1
公开(公告)日：2010-07-01
申请号：US12642726
申请日：2009-12-18
申请人： Hiroshi Tanaka
发明人： Hiroshi Tanaka
IPC分类号： H01S3/10 , G03B27/54 , H01S3/22
CPC分类号： G03B27/54 , G03F7/70025 , G03F7/70041 , G03F7/70575 , H01S3/1055 , H01S3/225
摘要： An apparatus exposes a substrate via a pattern of a reticle using pulsed light generated by a light source, and includes a controller configured to control the light source so that the oscillation frequency of the light source changes periodically while the apparatus exposes the substrate. The oscillation frequency is the number of times of emission of the light source per unit time.
摘要翻译：设备使用由光源产生的脉冲光通过标线图案来曝光基板，并且包括控制器，其被配置为控制光源，使得光源的振荡频率在设备暴露基板时周期性地改变。振荡频率是每单位时间发光的次数。

43. 发明授权

US07730983B2 Power control for hybrid motorcycle 失效
标题翻译：混合动力摩托车的功率控制
公开(公告)号：US07730983B2
公开(公告)日：2010-06-08
申请号：US11782432
申请日：2007-07-24
申请人： Hiroshi Tanaka , Hideki Shirazawa , Hideaki Suzuki
发明人： Hiroshi Tanaka , Hideki Shirazawa , Hideaki Suzuki
IPC分类号： B60W10/08 , B60W10/00
CPC分类号： B60W20/10 , B60K6/48 , B60K6/543 , B60L11/12 , B60L11/14 , B60L2200/12 , B60L2240/421 , B60L2240/547 , B60L2240/549 , B60L2240/80 , B60W10/08 , B60W20/00 , B60W30/186 , B60W2540/10 , B60W2540/106 , B60W2710/081 , B60Y2200/126 , Y02T10/6221 , Y02T10/642 , Y02T10/7005 , Y02T10/7077
摘要： An automatic centrifugal clutch is interposed in a power transmission system between an engine and a driving wheel. A motor, which is capable of generating electricity, is supplied with electricity from a battery to generate auxiliary power. The motor is connected to a crankshaft of the engine. An acceleration data acquisition component acquires the accelerator operation amount and the accelerator operation speed. A delay time setting component sets a delay time according to the acceleration data. A motor controller supplies the motor 13 with a magnitude of electricity in accordance with the acceleration operation amount after the delay time has elapsed from the moment when an accelerator grip was moved from an idle position.
摘要翻译：自动离心式离合器介于发动机和驱动轮之间的动力传动系统中。能够发电的电动机由电池供电以产生辅助电力。电动机连接到发动机的曲轴。加速度数据获取部件获取加速器操作量和加速器操作速度。延迟时间设置组件根据加速度数据设置延迟时间。电动机控制器根据从加速踏板从空转位置移动的时刻经过延迟时间之后的加速操作量，为电动机13提供电量。

44. 发明申请

US20100118515A1 METHOD OF MANUFACTURING DISPLAY, AND DISPLAY 有权
标题翻译：制造显示和显示的方法
公开(公告)号：US20100118515A1
公开(公告)日：2010-05-13
申请号：US12617334
申请日：2009-11-12
申请人： Hiroshi Tanaka , Kazuhito Hori
发明人： Hiroshi Tanaka , Kazuhito Hori
IPC分类号： G09F13/04 , H01J9/24
CPC分类号： H01L51/5271 , H01L51/5237 , H01L51/524 , H01L51/5253 , H01L51/5259 , H01L51/5284
摘要： A method of manufacturing a display not needing a complicated post-process for forming a reflecting mirror film and allowing degradation in an organic light-emitting device to be prevented, and a display. The method of manufacturing a display includes the steps of: forming a plurality of organic light-emitting devices in a display region on a substrate to form a light-emitting panel; forming projection-shaped reflection elements corresponding to the plurality of organic light-emitting devices, respectively, on a base to form a reflector; forming an adhesive layer along an outer edge of the light-emitting panel; and bonding the light-emitting panel and the reflector together with the adhesive layer in a vacuum atmosphere, thereby to form a vacuum layer in a space between the light-emitting panel and the reflector.
摘要翻译：制造不需要用于形成反射镜膜的复杂后处理并且能够防止有机发光器件劣化的显示器的显示方法。制造显示器的方法包括以下步骤：在衬底上的显示区域中形成多个有机发光器件，以形成发光面板; 在基座上分别形成与多个有机发光装置对应的突起状的反射体，形成反射体; 沿着所述发光面板的外缘形成粘合剂层; 并且在真空气氛中将发光面板和反射器与粘合剂层接合，从而在发光面板和反射体之间的空间中形成真空层。

45. 发明申请

US20100035018A1 Sandwich panel 有权
标题翻译：三明治板
公开(公告)号：US20100035018A1
公开(公告)日：2010-02-11
申请号：US11634248
申请日：2006-12-06
申请人： Hiroshi Horigome , Masaaki Hirai , Hiroshi Tanaka
发明人： Hiroshi Horigome , Masaaki Hirai , Hiroshi Tanaka
IPC分类号： B32B3/12
CPC分类号： B32B3/12 , B32B5/024 , B32B5/12 , B32B5/26 , B32B27/12 , B32B27/304 , B32B2250/40 , B32B2260/023 , B32B2260/046 , B32B2262/101 , B32B2262/106 , B32B2307/50 , B32B2307/542 , B32B2307/546 , B32B2307/718 , B32B2605/003 , B32B2605/18 , Y10T428/236 , Y10T428/24149 , Y10T428/24942 , Y10T428/249929 , Y10T428/249939 , Y10T428/24994 , Y10T428/3154
摘要： A sandwich panel that has excellent practicality as an inner wall material used in aircraft, for example, whereby the abovementioned requirements of flexural strength, peel strength, and in-plane shear strength can be satisfied while having reduced weight. A sandwich panel in which a middle material 2 and a surface material 3 that are each formed by laminating a plurality of fiber bodies are laminated from inside to outside on the upper and lower surfaces of a hollow columnar core 1, wherein the middle material 2 is composed of a set of unidirectional fiber bodies 4, 5 whose fibers are aligned in one direction, bonding layers 6, 7 having a resin content ratio of 50% or higher are provided between the unidirectional fiber bodies 4, 5 and between the hollow columnar core 1 and an inside unidirectional fiber body 5, the bonding layer 7 is composed of a woven fiber body 7 in which fibers are used for a warp yarn and a woof yarn that is orthogonal to the warp yarn, and the yarns are woven, and the woven fiber body 7 is formed so that any one of the warp yarn and the woof yarn is substantially parallel to the edge of the sandwich panel, and the other of the warp yarn and the woof yarn is substantially orthogonal to the edge of the sandwich panel.
摘要翻译：作为用于飞机的内壁材料具有优异的实用性的夹芯板，例如，可以在减轻重量的同时满足上述弯曲强度，剥离强度和面内剪切强度的要求。在中空柱状芯1的上表面和下表面上从内向外层叠由多层纤维体形成的中间材料2和表面材料3的夹层板，其中中间材料2为由纤维沿一个方向排列的一组单向纤维体4,5组成，在单向纤维体4,5之间和中空柱状芯之间设置树脂含量比为50％以上的结合层6,7 如图1所示，内侧单向纤维体5中，接合层7由将经纱用于纤维的织造纤维体7和与经纱正交的纬纱以及纱线编织而成，编织纤维体7形成为使经纱和纬纱中的任一个基本上平行于夹心板的边缘，并且经纱和纬纱中的另一个基本上垂直于夹心板的边缘埃尔

46. 发明申请

US20100005323A1 SEMICONDUCTOR INTEGRATED CIRCUIT 审中-公开
标题翻译：半导体集成电路
公开(公告)号：US20100005323A1
公开(公告)日：2010-01-07
申请号：US12300434
申请日：2006-06-07
申请人： Yuki Kuroda , Hiroshi Tanaka
发明人： Yuki Kuroda , Hiroshi Tanaka
IPC分类号： G06F1/26 , G06F1/04
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3243 , G06F1/3293 , G06F1/3296 , Y02D10/122 , Y02D10/126 , Y02D10/152 , Y02D10/172
摘要： A semiconductor integrated circuit with processors incorporated therein, which makes it possible to achieve a good balance between realizing low-power consumption control, and securing a processing performance that the practicability of real time processing is required.The semiconductor integrated circuit with processors incorporated therein is provided with a management unit, combining first control for changing a value of the voltage and a frequency of the clock signal based on control information contained in the program, and second control for changing the voltage value and clock signal frequency according to a progress status of a process by the processor, thereby to accelerate progress of the process by the processor. In a period during which the frequency and voltage of each processor are raised, the power consumption is increased, however it becomes possible to achieve high-speed processing. While in a period during which neither frequency nor voltage of each processor are raised, high-speed processing cannot be performed, however, the power consumption is small. Thus, it is possible to achieve a good balance between to materialize low-power consumption control in a semiconductor integrated circuit with processors incorporated therein, and to ensure a processing performance that the practicability of real time processing is required.
摘要翻译：其中结合有处理器的半导体集成电路，这使得可以在实现低功耗控制和确保需要实时处理的实用性的处理性能之间实现良好的平衡。其中结合有处理器的半导体集成电路设置有管理单元，其基于包含在程序中的控制信息，组合用于改变电压值和时钟信号频率的第一控制，以及用于改变电压值的第二控制和时钟信号频率根据处理器的处理进度状态，从而加速处理器进程的进行。在每个处理器的频率和电压升高的时间段期间，功率消耗增加，但是可以实现高速处理。虽然在每个处理器的频率和电压都不升高的时段中，但是不能执行高速处理，但是功耗很小。因此，可以实现在其中包含有处理器的半导体集成电路中实现低功耗控制的良好平衡，并且确保需要实时处理的实用性的处理性能。

47. 发明授权

US07640005B2 Information protection system for mobile terminal device, information protection method for mobile terminal device, control program, computer-readable medium and electronic information device 失效
标题翻译：移动终端设备信息保护系统，移动终端设备信息保护方法，控制程序，计算机可读介质和电子信息设备
公开(公告)号：US07640005B2
公开(公告)日：2009-12-29
申请号：US11405481
申请日：2006-04-18
申请人： Masaru Matsumoto , Hiroshi Tanaka
发明人： Masaru Matsumoto , Hiroshi Tanaka
IPC分类号： H04M1/66
CPC分类号： H04M3/382 , H04M1/66 , H04M2203/6081
摘要： An information protection system for a mobile terminal device, the information protection system including: an authentication device for performing a person authentication process when an information protection request for the mobile terminal device is issued in order to identify whether any person being subjected to authentication is an owner of the mobile terminal device by using a personal identity information, the mobile terminal device being capable of performing a predetermined information protection process in accordance with a remote operation information; anda management device for generating the remote operation information in order to perform an information protection process for the mobile terminal device and for transmitting the remote operation information to the mobile terminal device when the person authentication process by the authentication process device matches the personal identity information.
摘要翻译：一种用于移动终端设备的信息保护系统，所述信息保护系统包括：认证装置，用于在发出针对所述移动终端设备的信息保护请求时执行人员认证处理，以便识别任何被认证的人是否是通过使用个人身份信息，移动终端设备的所有者，移动终端设备能够根据远程操作信息执行预定的信息保护处理; 以及管理装置，用于当认证处理装置的个人认证处理与个人身份信息匹配时，生成远程操作信息，以执行移动终端装置的信息保护处理，并向远程操作信息发送远程操作信息。

48. 发明申请

US20090320034A1 DATA PROCESSING APPARATUS 审中-公开
标题翻译：数据处理设备
公开(公告)号：US20090320034A1
公开(公告)日：2009-12-24
申请号：US12280005
申请日：2006-03-27
申请人： Takanobu Tsunoda , Hiroshi Tanaka
发明人： Takanobu Tsunoda , Hiroshi Tanaka
IPC分类号： G06F9/46 , G06F12/00
CPC分类号： G11C7/1006 , G11C15/00 , G11C19/00
摘要： A data processing apparatus has a memory element array (330) having a plurality of entries each formed by a memory element of more than one bit having a data shift function and a data comparison function, and the memory element array is arranged so that data can be shifted between corresponding bit positions of adjacent entries. Further, the data processing apparatus has a priority-judging circuit (340) for identifying one of the entries according to predetermined priorities based on results of comparison between data input to the entries in common and contents held by the memory elements constituting the entries. Even when the data held by an entry located halfway is nullified, data shift between entries can avoid that the entry with nullified data remains halfway, and enables the entries to hold valid data in order with the data densely aligned. The time sequence when data are held can be made coincident with the alignment of entries readily. As the time sequence of the entries is ensured uniquely, a given data can be identified from CAM search results by factoring in the priorities following the time sequence.
摘要翻译：一种数据处理装置具有存储元件阵列（330），其具有多个条目，每个条目由具有数据移位功能和数据比较功能的多于一个位的存储元件形成，并且存储元件阵列被布置成使得数据可以在相邻条目的相应位位置之间移位。此外，数据处理装置具有根据预先确定的优先顺序，根据输入到公共条目的数据和构成条目的存储元件所保持的内容之间的比较结果来识别条目之一的优先级判定电路（340）。即使当一半条目所保存的数据无效时，条目之间的数据移动也可以避免具有无效数据的条目保持中途，并使条目能按照数据密集对齐的顺序保存有效数据。保持数据的时间顺序可以与条目的对齐方式一致。由于唯一地确保条目的时间顺序，可以通过考虑时间序列之后的优先级从CAM搜索结果来识别给定的数据。

49. 发明申请

US20090318187A1 PORTABLE COMMUNICATION TERMINAL, FUNCTION MENU DISPLAY METHOD AND PROGRAM TO BE USED IN PORTABLE COMMUNICATION TERMINAL 有权
标题翻译：便携式通信终端，功能菜单显示方法和可在便携式通信终端中使用的程序
公开(公告)号：US20090318187A1
公开(公告)日：2009-12-24
申请号：US12096114
申请日：2006-11-30
申请人： Hideaki Tetsuhashi , Hiroshi Tanaka
发明人： Hideaki Tetsuhashi , Hiroshi Tanaka
IPC分类号： H04M1/00
CPC分类号： H04M1/72563 , G06F3/0482 , H04M1/72586
摘要： The present invention provides a portable communication terminal that allows users to use only basic functions without having to peruse an instruction manual.The basic module (21) of a memory device (2) includes a simple-mode basic module (211) that shows a GUI mode customized to be user friendly, and a custom-mode basic module (212) that shows a GUI mode for letting the user select only desired functions at the time of initial activation. If the “simple-mode” is selected through the basic module (21), the menu display screen of an output device (3) displays only the function menu of the simple-mode basic module (211). If the “custom-mode” is selected through the basic module (21), the menu display screen of the output device (3) displays the custom-mode basic module (212) and functions selected through the custom-mode basic module (212).
摘要翻译：本发明提供一种便携式通信终端，其允许用户仅使用基本功能，而不必阅读说明手册。存储装置（2）的基本模块（21）包括简单模式基本模块（211），其示出了定制为用户友好的GUI模式，以及自定义模式基本模块（212），其显示用于让用户在初始激活时仅选择所需的功能。如果通过基本模块（21）选择“简单模式”，则输出装置（3）的菜单显示画面仅显示简单模式基本模块（211）的功能菜单。如果通过基本模块（21）选择了“定制模式”，则输出设备（3）的菜单显示屏幕显示自定义模式基本模块（212）和通过自定义模式基本模块（212）选择的功能）。

50. 发明申请

US20090282213A1 SEMICONDUCTOR INTEGRATED CIRCUIT 审中-公开
标题翻译：半导体集成电路
公开(公告)号：US20090282213A1
公开(公告)日：2009-11-12
申请号：US12505128
申请日：2009-07-17
申请人： Hiroshi TANAKA , Yohei Akita , Tetsuro Honmura , Fumio Arakawa , Takanobu Tsunoda
发明人： Hiroshi TANAKA , Yohei Akita , Tetsuro Honmura , Fumio Arakawa , Takanobu Tsunoda
IPC分类号： G06F15/80 , G06F9/02
CPC分类号： H03K19/17752 , H03K19/17728 , H03K19/17736 , H03K19/17744 , H03K19/1776
摘要： A basic cell capable of a fixed operating frequency regardless of the configuration information, which is also capable of effectively utilizing the arithmetic logic circuit within the cell in a LSI semiconductor integrated circuit, is capable of dynamic changes in configuration information. The circuit has an input switch ISW connected to multiple data input nodes, an output switch OSW connected to multiple data output nodes, a first data path containing an arithmetic logic circuit ALU and a result storage flip-flop CFF0 between the input switch ISW and output switch OSW. The second data path containing a data transfer flip-flop between an input switch ISW and an output switch OSW, and the result storage flip-flop CFF stores the calculated result data from the arithmetic logic circuit ALU, and the data transfer flip-flop holds data input from any of the multiple data input nodes.
摘要翻译：能够具有固定工作频率的基本单元能够动态地改变配置信息，而与能够有效地利用LSI半导体集成电路中的单元内的算术逻辑电路的配置信息无关。该电路具有连接到多个数据输入节点的输入开关ISW，连接到多个数据输出节点的输出开关OSW，在输入开关ISW和输出端之间包含算术逻辑电路ALU和结果存储触发器CFF0的第一数据路径切换OSW。包含输入开关ISW和输出开关OSW之间的数据传输触发器的第二数据路径，结果存储触发器CFF存储来自算术逻辑电路ALU的计算结果数据，并且数据传送触发器保持从多个数据输入节点中的任何一个输入的数据。

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