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41. 发明授权

US09251085B2 Performing a clear operation absent host intervention 有权
标题翻译：执行一个明确的操作没有主机干预
公开(公告)号：US09251085B2
公开(公告)日：2016-02-02
申请号：US14837585
申请日：2015-08-27
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Charles W. Gainey, Jr. , Dan F. Greiner , Lisa C. Heller , Damian L. Osisek , Gustav E. Sittmann, III
IPC分类号： G06F12/00 , G06F13/00 , G06F12/08
CPC分类号： G06F9/30043 , G06F3/0604 , G06F3/0605 , G06F3/0644 , G06F3/0652 , G06F3/0664 , G06F3/0673 , G06F9/30003 , G06F9/30098 , G06F9/30101 , G06F9/30145 , G06F9/45537 , G06F9/45545 , G06F9/45558 , G06F12/023 , G06F12/08 , G06F12/0891 , G06F12/1009 , G06F2009/45583 , G06F2212/1041 , G06F2212/151 , G06F2212/656 , G06F2212/657 , G06F2212/69
摘要： Optimizations are provided for frame management operations, including a clear operation and/or a set storage key operation, requested by pageable guests. The operations are performed, absent host intervention, on frames not resident in host memory. The operations may be specified in an instruction issued by the pageable guests.
摘要翻译：为框架管理操作提供优化，包括可分页访客请求的清晰操作和/或设置的存储密钥操作。在没有驻留在主机内存中的帧上，执行操作，而不需要主机干预。操作可以在可分页客人发出的指令中指定。

42. 发明授权

US09122477B2 Execution of a perform frame management function instruction 有权
公开(公告)号：US09122477B2
公开(公告)日：2015-09-01
申请号：US14576729
申请日：2014-12-19
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Charles W. Gainey, Jr. , Dan F. Greiner , Lisa C. Heller , Damian L. Osisek , Gustav E. Sittmann, III
IPC分类号： G06F13/00 , G06F9/30 , G06F9/455 , G06F12/08 , G06F12/02
CPC分类号： G06F9/30043 , G06F3/0604 , G06F3/0605 , G06F3/0644 , G06F3/0652 , G06F3/0664 , G06F3/0673 , G06F9/30003 , G06F9/30098 , G06F9/30101 , G06F9/30145 , G06F9/45537 , G06F9/45545 , G06F9/45558 , G06F12/023 , G06F12/08 , G06F12/0891 , G06F12/1009 , G06F2009/45583 , G06F2212/1041 , G06F2212/151 , G06F2212/656 , G06F2212/657 , G06F2212/69
摘要： Optimizations are provided for frame management operations, including a clear operation and/or a set storage key operation, requested by pageable guests. The operations are performed, absent host intervention, on frames not resident in host memory. The operations may be specified in an instruction issued by the pageable guests.

43. 发明授权

US08930603B2 Interruption facility for adjunct processor queues 有权
标题翻译：辅助处理器队列的中断设施
公开(公告)号：US08930603B2
公开(公告)日：2015-01-06
申请号：US13672212
申请日：2012-11-08
申请人： International Business Machines Corporation
发明人： Charles W. Gainey, Jr. , Klaus Meissner , Damian L. Osisek , Klaus Werner
IPC分类号： G06F13/24
CPC分类号： G06F13/24
摘要： Interruption facility for adjunct processor queues. In response to a queue transitioning from a no replies pending state to a reply pending state, an interruption is initiated. This interruption signals to a processor that a reply to a request is waiting on the queue. In order for the queue to take advantage of the interruption capability, it is enabled for interruptions.
摘要翻译：辅助处理器队列的中断设施。响应于队列从无应答等待状态转移到回复挂起状态，发起中断。该中断向处理器通知对请求的响应在队列上等待。为了使队列利用中断能力，它可以被中断。

44. 发明授权

US08838860B2 Determining extended capability of a channel path 有权
标题翻译：确定通道路径的扩展能力
公开(公告)号：US08838860B2
公开(公告)日：2014-09-16
申请号：US13833378
申请日：2013-03-15
申请人： International Business Machines Corporation
发明人： Charles W. Gainey, Jr. , Daniel F. Casper
IPC分类号： G06F3/00 , G06F13/12 , G06F13/00 , G06F12/00 , H04L12/28 , H04J3/00
CPC分类号： G06F13/4022 , G06F3/00 , G06F3/002 , G06F3/0635 , G06F13/12 , G06F13/4282 , G06F2213/4004
摘要： A computer program product includes a tangible storage storing instructions for performing a method. The method includes receiving a request at a channel subsystem in a host computer system from an operating system in the host computer system to provide a channel path description for a channel path, the channel subsystem configured to direct information flow between memory and the control unit via the channel path; and outputting from the channel subsystem to the operating system, a channel path description block including the channel path description for the channel path in response to the request. The channel path description block includes: a descriptor field (DESC) indicating that the channel path supports a Fiber Channel protocol for commanding an I/O operation; and an extension support indicator field (F) specifying whether the channel path supports an extension to the Fiber Channel protocol.
摘要翻译：计算机程序产品包括存储用于执行方法的指令的有形存储器。该方法包括从主计算机系统中的操作系统在主计算机系统中的信道子系统处接收请求，以提供信道路径的信道路径描述，该信道子系统被配置为通过信道子系统引导存储器与控制单元之间的信息流通道路径; 以及从所述信道子系统向所述操作系统输出响应于所述请求的所述信道路径的信道路径描述的信道路径描述块。信道路径描述块包括：指示信道路径支持用于命令I / O操作的光纤通道协议的描述符字段（DESC）; 以及指定信道路径是否支持对光纤通道协议的扩展的扩展支持指示符字段（F）。

45. 发明授权

US11029974B2 Architectural mode configuration 有权
公开(公告)号：US11029974B2
公开(公告)日：2021-06-08
申请号：US16512987
申请日：2019-07-16
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Charles W. Gainey, Jr. , Michael K. Gschwind
IPC分类号： G06F9/4401 , G06F9/445 , G06F15/76 , G06F15/78 , G06F9/30
摘要： A determination is made that a configuration architectural mode facility is installed in a computing environment that is configured for a plurality of architectural modes and has a defined power-on sequence that is to power-on the computing environment in one architectural mode of the plurality of architectural modes. Based on determining that the configuration architectural mode facility is installed, the computing environment is reconfigured to restrict use of the one architectural mode. The reconfiguring includes selecting a different power-on sequence to power-on the computing environment in another architectural mode of the plurality of architectural modes, wherein the another architectural mode is different from the one architectural mode, and executing the different power-on sequence to power-on the computing environment in the another architectural mode in place of the one architectural mode restricting use of the one architectural mode.

46. 发明授权

US11023256B2 Architectural mode configuration 有权
公开(公告)号：US11023256B2
公开(公告)日：2021-06-01
申请号：US16513034
申请日：2019-07-16
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Charles W. Gainey, Jr. , Michael K. Gschwind
IPC分类号： G06F9/4401 , G06F9/445 , G06F15/76 , G06F15/78 , G06F9/30
摘要： A determination is made that a configuration architectural mode facility is installed in a computing environment that is configured for a plurality of architectural modes and has a defined power-on sequence that is to power-on the computing environment in one architectural mode of the plurality of architectural modes. Based on determining that the configuration architectural mode facility is installed, the computing environment is reconfigured to restrict use of the one architectural mode. The reconfiguring includes selecting a different power-on sequence to power-on the computing environment in other architectural mode of the plurality of architectural modes, wherein the other architectural mode is different from the one architectural mode, and executing the different power-on sequence to power-on the computing environment in the other architectural mode in place of the one architectural mode restricting use of the one architectural mode.

47. 发明授权

US10977190B2 Dynamic address translation with access control in an emulator environment 有权
公开(公告)号：US10977190B2
公开(公告)日：2021-04-13
申请号：US16447258
申请日：2019-06-20
申请人： International Business Machines Corporation
发明人： Dan F. Greiner , Charles W. Gainey, Jr. , Lisa C. Heller , Damian L. Osisek , Erwin Pfeffer , Timothy J. Slegel , Charles F. Webb
IPC分类号： G06F12/00 , G06F12/1027 , G06F12/1009 , G06F12/14 , G06F12/02 , G06F12/1036 , G06F9/30 , G06F13/00 , G06F13/28
摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. Based on the origin address, a segment table entry is obtained which contains a format control field and an access validity field. If the format control and access validity are enabled, the segment table entry further contains an access control and fetch protection fields, and a segment-frame absolute address. Store operations to the block of data are permitted only if the access control field matches a program access key provided by either a Program Status Word or an operand of a program instruction being executed. Fetch operations from the desired block of data are permitted only if the program access key associated with the virtual address is equal to the segment access control field.

48. 发明申请

US20190339995A1 ARCHITECTURAL MODE CONFIGURATION 审中-公开
公开(公告)号：US20190339995A1
公开(公告)日：2019-11-07
申请号：US16513034
申请日：2019-07-16
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Charles W. Gainey, Jr. , Michael K. Gschwind
IPC分类号： G06F9/445 , G06F15/78 , G06F9/4401 , G06F15/76 , G06F9/30
摘要： A determination is made that a configuration architectural mode facility is installed in a computing environment that is configured for a plurality of architectural modes and has a defined power-on sequence that is to power-on the computing environment in one architectural mode of the plurality of architectural modes. Based on determining that the configuration architectural mode facility is installed, the computing environment is reconfigured to restrict use of the one architectural mode. The reconfiguring includes selecting a different power-on sequence to power-on the computing environment in other architectural mode of the plurality of architectural modes, wherein the other architectural mode is different from the one architectural mode, and executing the different power-on sequence to power-on the computing environment in the other architectural mode in place of the one architectural mode restricting use of the one architectural mode.

49. 发明授权

US10303478B2 Convert from zoned format to decimal floating point format 有权
公开(公告)号：US10303478B2
公开(公告)日：2019-05-28
申请号：US15083374
申请日：2016-03-29
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Steven R. Carlough , Reid T. Copeland , Charles W. Gainey, Jr. , Marcel Mitran , Eric M. Schwarz , Timothy J. Slegel
IPC分类号： G06F9/30 , G06F7/483
摘要： Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.

50. 发明授权

US10120681B2 Compare and delay instructions 有权
公开(公告)号：US10120681B2
公开(公告)日：2018-11-06
申请号：US14212378
申请日：2014-03-14
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Charles W. Gainey, Jr. , Dan F. Greiner , Christian Jacobi , Marcel Mitran , Donald W. Schmidt , Timothy J. Slegel
IPC分类号： G06F9/30 , G06F9/54 , G06F9/38 , G06F9/455
摘要： A delay facility is provided in which program execution may be delayed until a predefined event occurs, such as a comparison of memory locations results in a true condition, a timeout is reached, an interruption is made pending or another condition exists. The delay facility includes one or more compare and delay machine instructions used to delay execution. The one or more compare and delay instructions may include a 32-bit compare and delay (CAD) instruction and a 64-bit compare and delay (CADG) instruction.

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