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41. 发明授权

US09779836B2 Method for controlling magnetic multi-domain state 有权
公开(公告)号：US09779836B2
公开(公告)日：2017-10-03
申请号：US15125326
申请日：2014-03-12
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Chong Bi , Shibing Long , Ming Liu
IPC分类号： G11C11/14 , G11C19/08
CPC分类号： G11C19/0858 , G11C11/1675 , G11C11/18 , G11C11/5607 , G11C19/0808 , G11C19/0816 , G11C19/0825 , G11C19/0841 , G11C19/085
摘要： The present disclosure relates to the technical field of information data storage and processing. There is provided a method for regulating magnetic multi-domain state, comprising: when a current is applied to a magnetic thin film, applying an additional external magnetic field having a magnetic field strength of 0 to 4×105 A/m to regulate magnetization state of the magnetic thin film; wherein the current is configured to drive movements of a magnetic domain of the magnetic multi-domain states in the magnetic thin film, and the external magnetic field is configured to regulate generation of new magnetic domain in the magnetic thin film and state of the magnetic domain during the movement, so that the magnetic thin film is in a stable magnetic multi-domain state. Such a multi-domain state can't be affected by a higher or lower current and keeps stable when the current is removed. Such a method may be used for magnetic memory or spin-logic device to implement a nonvolatile multi-valued storage, multi-bits logic operation, or neuromorphic computing.

42. 发明授权

US09735287B2 Memory devices, methods of manufacturing the same, and methods of accessing the same 有权
公开(公告)号：US09735287B2
公开(公告)日：2017-08-15
申请号：US14888651
申请日：2013-05-30
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Huilong Zhu
IPC分类号： H01L29/788 , G11C16/10 , H01L29/778 , H01L29/66 , H01L29/78 , G11C16/24 , H01L29/06 , H01L29/16 , H01L29/161 , H01L29/20 , H01L27/11521 , H01L29/165
CPC分类号： H01L29/7883 , G11C16/10 , G11C16/24 , H01L27/11521 , H01L29/0638 , H01L29/0653 , H01L29/16 , H01L29/1608 , H01L29/161 , H01L29/165 , H01L29/20 , H01L29/2003 , H01L29/66537 , H01L29/66795 , H01L29/66803 , H01L29/66825 , H01L29/7781 , H01L29/7848 , H01L29/7855
摘要： Memory devices, methods of manufacturing the same, and methods of accessing the same are provided. In one embodiment, the memory device may include a substrate, a back gate formed on the substrate, and a transistor. The transistor may include fins formed on opposite sides of the back gate on the substrate and a gate stack formed on the substrate and intersecting the fins. The memory device may further include a back gate dielectric layer formed on side and bottom surfaces of the back gate. The back gate dielectric layer may have a thickness reduced portion at a region facing the fins on one side of the gate stack.

43. 发明授权

US09691624B2 Method for manufacturing fin structure 有权
公开(公告)号：US09691624B2
公开(公告)日：2017-06-27
申请号：US14442890
申请日：2012-12-14
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Huilong Zhu , Miao Xu , Jun Luo , Chunlong Li , Guilei Wang
IPC分类号： H01L21/336 , H01L21/84 , H01L21/306 , H01L21/8234 , H01L21/3105 , H01L21/311 , H01L29/10 , H01L29/66
CPC分类号： H01L21/30625 , H01L21/31053 , H01L21/31105 , H01L21/823431 , H01L21/845 , H01L29/1054 , H01L29/66545 , H01L29/66795
摘要： Provided is a method for manufacturing a fin structure. The method may include forming an initial fin on a substrate, forming a dielectric layer on the substrate to cover the initial fin, planarizing the dielectric layer by sputtering, and further etching the dielectric layer back to expose a portion of the initial fin, wherein the exposed portion serves as a fin.

44. 发明授权

US09653358B2 Semiconductor device structure and method for manufacturing the same 有权
公开(公告)号：US09653358B2
公开(公告)日：2017-05-16
申请号：US13133061
申请日：2011-02-25
申请人： Huicai Zhong , Qingqing Liang
发明人： Huicai Zhong , Qingqing Liang
IPC分类号： H01L21/8234 , H01L21/8238 , H01L27/02 , H01L29/10 , H01L29/66 , H01L29/78
CPC分类号： H01L21/823412 , H01L21/823814 , H01L21/823828 , H01L21/823878 , H01L27/0207 , H01L29/1054 , H01L29/66545 , H01L29/66553 , H01L29/66575 , H01L29/66651 , H01L29/78 , H01L29/7848
摘要： The present invention presents a method for manufacturing a semiconductor device structure as well as the semiconductor device structure. Said method comprises: providing a semiconductor substrate; forming a first insulating layer on the semiconductor substrate; forming a shallow trench isolation embedded in the first insulating layer and the semiconductor substrate; forming a channel region embedded in the semiconductor substrate; and forming a gate stack stripe on the channel region. Said method further comprises, before forming the channel region, performing a source/drain implantation on the semiconductor substrate. By means of forming the source/drain regions in a self-aligned manner before forming the channel region and the gate stack, said method achieves the advantageous effects of the replacement gate process without using a dummy gate, thereby simplifying the process and reducing the cost.

45. 发明申请

US20170092374A1 METHOD FOR CONTROLLING MAGNETIC MULTI-DOMAIN STATE 有权
公开(公告)号：US20170092374A1
公开(公告)日：2017-03-30
申请号：US15125326
申请日：2014-03-12
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Chong Bi , Shibing Long , Ming Liu
IPC分类号： G11C19/08
CPC分类号： G11C19/0858 , G11C11/1675 , G11C11/18 , G11C11/5607 , G11C19/0808 , G11C19/0816 , G11C19/0825 , G11C19/0841 , G11C19/085
摘要： The present disclosure relates to the technical field of information data storage and processing. There is provided a method for regulating magnetic multi-domain state, comprising: when a current is applied to a magnetic thin film, applying an external magnetic field having a magnetic field strength of 0 to 4×105 A/m to regulate magnetization state of the magnetic thin film; wherein the current is configured to drive movements of a magnetic domain of the magnetic multi-domain states in the magnetic thin film, and the external magnetic field is configured to regulate generation of new magnetic domain in the magnetic thin film and state of the magnetic domain during the movement, so that the magnetic thin film is in a stable magnetic multi-domain state. Such a multi-domain state can't be affected by a higher or lower current and may be kept to be stable when the current is removed. Such a method may be used for current magnetic memory and to operate the magnetization stage of the spin-logic device in the future to implement a nonvolatile multi-valued storage and multi-bits logic operation.

46. 发明授权

US09590083B2 ITC-IGBT and manufacturing method therefor 有权
标题翻译： ITC-IGBT及其制造方法
公开(公告)号：US09590083B2
公开(公告)日：2017-03-07
申请号：US14648698
申请日：2012-12-06
申请人： INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES , SHANGHAI LIANXING ELECTRONICS CO., LTD , JIANGSU CAS-IGBT TECHNOLOGY CO., LTD
发明人： Zhenxing Wu , Yangjun Zhu , Xiaoli Tian , Shuojin Lu
IPC分类号： H01L29/66 , H01L29/739 , H01L29/15 , H01L21/265 , H01L21/306 , H01L21/324 , H01L29/08 , H01L29/36 , H01L21/02
CPC分类号： H01L29/7397 , H01L21/0245 , H01L21/02507 , H01L21/02532 , H01L21/2652 , H01L21/30625 , H01L21/324 , H01L29/0817 , H01L29/0821 , H01L29/155 , H01L29/36 , H01L29/66348
摘要： An ITC-IGBT and a manufacturing method therefor. The method comprises: providing a heavily doped substrate, forming a GexSi1-x/Si multi-quantum well strained super lattice layer on the surface of the heavily doped substrate, and forming a lightly doped layer on the surface of the GexSi1-x/Si multi-quantum well strained super lattice layer. The GexSi1-x/Si multi-quantum well strained super lattice layer is formed on the surface of the heavily doped substrate through one step, simplifying the production process of the ITC-IGBT.
摘要翻译：一种ITC-IGBT及其制造方法。该方法包括：提供重掺杂的衬底，在重掺杂衬底的表面上形成GexSi1-x / Si多量子阱应变超晶格层，并在GexSi1-x / Si的表面上形成轻掺杂层多量子阱应变超晶格层。 GexSi1-x / Si多量子阱应变超晶格层通过一步形成在重掺杂衬底的表面上，简化了ITC-IGBT的生产过程。

47. 发明授权

US09564434B2 Semiconductor device with body spacer at the bottom of the fin and method for manufacturing the same 有权
标题翻译：翅片底部具有主体间隔物的半导体器件及其制造方法
公开(公告)号：US09564434B2
公开(公告)日：2017-02-07
申请号：US14705835
申请日：2015-05-06
申请人： Institute of Microlectronics, Chinese Academy of Sciences
发明人： Huilong Zhu
IPC分类号： H01L29/00 , H01L27/088 , H01L29/78 , H01L29/66 , H01L29/417 , H01L21/8238 , H01L27/092 , H01L21/84 , H01L27/12 , H01L21/02 , H01L21/306 , H01L21/3105 , H01L21/762 , H01L21/8234 , H01L29/06 , H01L29/16 , H01L29/161 , H01L29/51
CPC分类号： H01L27/0886 , H01L21/02274 , H01L21/02381 , H01L21/02532 , H01L21/30604 , H01L21/31053 , H01L21/76224 , H01L21/823431 , H01L21/823481 , H01L21/823821 , H01L21/845 , H01L27/0924 , H01L27/1211 , H01L29/0653 , H01L29/16 , H01L29/161 , H01L29/41791 , H01L29/517 , H01L29/66545 , H01L29/66795 , H01L29/6681 , H01L29/785
摘要： A semiconductor device and a method of manufacturing the same are disclosed. In one aspect, the method includes forming a first semiconductor layer and a second semiconductor layer sequentially on a substrate. The method also includes patterning the second and first semiconductor layers to form an initial fin. The method also includes selectively etching the first semiconductor layer of the initial fin to form a lateral recess in the first semiconductor layer. The method also includes filling the lateral recess with a dielectric material to form a body spacer. The method also includes forming an isolation layer on the substrate, wherein the isolation layer partially exposes the body spacer and thus defines a fin above the isolation layer. The method also includes forming a gate stack intersecting the fins on the isolation layer.
摘要翻译：公开了一种半导体器件及其制造方法。一方面，该方法包括在基板上依次形成第一半导体层和第二半导体层。该方法还包括图案化第二和第一半导体层以形成初始鳍。该方法还包括选择性地蚀刻初始翅片的第一半导体层以在第一半导体层中形成横向凹槽。该方法还包括用介电材料填充横向凹槽以形成主体间隔件。该方法还包括在衬底上形成隔离层，其中隔离层部分地暴露主体间隔物，从而在隔离层上方限定鳍。该方法还包括形成与隔离层上的翅片相交的栅极堆叠。

48. 发明授权

US09543450B2 Semiconductor devices and methods for manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US09543450B2
公开(公告)日：2017-01-10
申请号：US14440787
申请日：2012-12-04
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Huilong Zhu
IPC分类号： H01L29/788 , H01L29/66 , H01L29/10 , H01L29/49 , H01L21/28 , H01L29/423 , H01L29/51 , H01L21/265
CPC分类号： H01L29/7881 , H01L21/26513 , H01L21/2658 , H01L21/26586 , H01L21/28273 , H01L29/1095 , H01L29/42324 , H01L29/4958 , H01L29/4966 , H01L29/4975 , H01L29/517 , H01L29/6653 , H01L29/66545 , H01L29/6656 , H01L29/66825
摘要： Semiconductor devices and methods for manufacturing the same are provided. In one embodiment, the method may include: forming a first shielding layer on a substrate, and forming one of source and drain regions with the first shielding layer as a mask; forming a second shielding layer on the substrate, and forming the other of the source and drain regions with the second shielding layer as a mask; removing a portion of the second shielding layer which is next to the other of the source and drain regions; forming a first gate dielectric layer and floating gate layer; forming a mask layer as a spacer on a sidewall of a remaining portion of the second shielding layer, and patterning the floating gate layer with the mask layer as a mask, and then removing the mask layer; and forming a second gate dielectric layer, and forming a gate conductor as a spacer on the sidewall of the remaining portion of the second shielding layer.
摘要翻译：提供半导体器件及其制造方法。在一个实施例中，该方法可以包括：在衬底上形成第一屏蔽层，并且将第一屏蔽层作为掩模形成源区和漏区之一; 在所述基板上形成第二屏蔽层，并且以所述第二屏蔽层为掩模形成所述源极和漏极区域中的另一个; 去除所述源极和漏极区域中另一个旁边的所述第二屏蔽层的一部分; 形成第一栅介质层和浮栅; 在所述第二屏蔽层的剩余部分的侧壁上形成作为间隔物的掩模层，并将所述掩模层的浮栅层图案化为掩模，然后除去掩模层; 以及形成第二栅极电介质层，并且在所述第二屏蔽层的剩余部分的侧壁上形成作为间隔物的栅极导体。

49. 发明授权

US09515169B2 FinFET and method of manufacturing same 有权
标题翻译： FinFET及其制造方法
公开(公告)号：US09515169B2
公开(公告)日：2016-12-06
申请号：US14904140
申请日：2013-10-22
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Haizhou Yin , Yunfei Liu
IPC分类号： H01L29/66 , H01L29/78 , H01L21/02 , H01L21/311 , H01L21/762 , H01L29/06
CPC分类号： H01L29/66795 , H01L21/02164 , H01L21/0217 , H01L21/31116 , H01L21/76224 , H01L29/0649 , H01L29/6653 , H01L29/66545 , H01L29/66818 , H01L29/785 , H01L29/7851
摘要： There is provided a FinFET fabricating method, comprising: a. providing a substrate ; b. forming a fin on the substrate; c. forming a channel protective layer on the fin; d. forming a shallow trench isolation on both sides of the fin; e. forming a sacrificial gate stack and a spacer on the top surface and sidewalls of the channel region which is in the middle of the fin; f. forming source/drain regions in both ends of the fin; g. depositing an interlayer dielectric layer on the sacrificial gate stack and the source/drain regions, planarizing later to expose the sacrificial gate stack; h. removing the sacrificial gate stack stack to form a sacrificial gate vacancy and expose the channel region and the channel protective layer; i. covering a portion of the semiconductor structure in one end of the fin with a photoresist layer; j. removing a portion of the spacer not covered; k. removing the photoresist layer and filling a gate stack in the sacrificial gate vacancy; l. planarizing the semiconductor structure formed by the foregoing steps to expose the channel protective layer and forming a first separated gate stack and a second separated gate stack. Comparing with the prior art, control ability of independent-gate-voltage FinFET can be effectively improved and it is good for device performance.
摘要翻译：提供了一种FinFET制造方法，包括：a。提供衬底; b。在基板上形成翅片; C。在翅片上形成通道保护层; d。在鳍的两侧形成浅沟槽隔离; e。在鳍的中间的沟道区的顶表面和侧壁上形成牺牲栅叠层和间隔物; F。在鳍的两端形成源/漏区; G。在所述牺牲栅极堆叠和所述源极/漏极区域上沉积层间电介质层，以稍后平坦化以暴露所述牺牲栅极堆叠; H。去除牺牲栅极堆叠堆叠以形成牺牲栅极空位并暴露沟道区域和沟道保护层; 一世。用光致抗蚀剂层覆盖鳍的一端中的半导体结构的一部分; j。去除未覆盖的间隔件的一部分; k。去除光致抗蚀剂层并在牺牲栅极空位中填充栅极堆叠; l。平面化由上述步骤形成的半导体结构以暴露沟道保护层并形成第一分离的栅极堆叠和第二分离栅极堆叠。与现有技术相比，可以有效提高独立栅极电压FinFET的控制能力，对器件性能有好处。

50. 发明授权

US09502560B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09502560B2
公开(公告)日：2016-11-22
申请号：US14797762
申请日：2015-07-13
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Huilong Zhu
IPC分类号： H01L29/78 , H01L29/66 , H01L29/06 , H01L29/10 , H01L21/265 , H01L21/311 , H01L21/3105 , H01L21/308 , H01L21/02 , H01L29/165
CPC分类号： H01L29/7848 , H01L21/02532 , H01L21/0257 , H01L21/26513 , H01L21/3083 , H01L21/31053 , H01L21/31111 , H01L29/0638 , H01L29/0673 , H01L29/1083 , H01L29/165 , H01L29/66537 , H01L29/66545 , H01L29/66795 , H01L29/66803 , H01L29/6681 , H01L29/7851
摘要： Provided are a semiconductor device and a method of manufacturing the same. An example device may include: a substrate having a well formed therein, the well including a first section and a second section, wherein the first section has a lower doping concentration and is closer to a surface of the substrate than the second section; a fin structure formed on the surface of the substrate; an isolation layer formed on the surface of the substrate, wherein the isolation layer exposes a portion of the fin structure, which serves as a fin for the semiconductor device; a gate stack formed on the isolation layer and intersecting the fin, wherein a Punch-Through Stopper (PTS) is formed in only a region directly under a portion of the fin where the fin intersects the gate stack.
摘要翻译：提供半导体器件及其制造方法。示例性装置可以包括：其中具有良好形成的衬底，所述阱包括第一部分和第二部分，其中所述第一部分具有较低的掺杂浓度并且比所述第二部分更靠近所述衬底的表面; 形成在所述基板的表面上的翅片结构; 形成在所述基板的表面上的隔离层，其中所述隔离层暴露所述鳍结构的作为所述半导体器件的翅片的部分; 形成在隔离层上并与翅片相交的栅极叠层，其中穿孔止动器（PTS）仅形成在翅片的直接与栅极叠层相交的部分下方的区域中。

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