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    • 41. 发明授权
    • Pixel interpolation apparatus, imaging apparatus, pixel interpolation processing method, integrated circuit, and non-transitory computer readable storage medium
    • 像素插值装置,成像装置,像素内插处理方法,集成电路和非暂时计算机可读存储介质
    • US09251602B2
    • 2016-02-02
    • US14429909
    • 2013-07-05
    • MEGACHIPS CORPORATION
    • Hiromu Hasegawa
    • G06T7/40G09G5/00G06K9/62G06K9/46
    • G06T7/408G06K9/4652G06K9/6215G06T7/90G09G5/003H04N9/045
    • An imaging apparatus includes an imaging unit, a signal processing unit, and a pixel interpolation processing unit. The apparatus calculates a correlation degree for pairs in two orthogonal directions for an image signal obtained by the imaging unit including a single-chip image sensor having a four-color filter, such as a WRGB color filter, using pixel data in an area around a target pixel, using the correlation degree as a determination criterion in the interpolation. When a color component pixel with an identical color of a color component pixel subjected to pixel interpolation is not located in the direction having the high correlation, the pixel interpolation apparatus changes ratio in a direction orthogonal to the direction having the high correlation by using a pixel value resulting from color space conversion in the direction orthogonal to the direction having the high correlation, and performs pixel interpolation based on the change ratio.
    • 成像装置包括成像单元,信号处理单元和像素插值处理单元。 该装置对包括具有四色滤波器的单片式图像传感器(例如WRGB滤色器)的成像单元获得的图像信号的两个正交方向上的对的对的相关度进行计算,使用在 目标像素,使用相关度作为插值中的确定标准。 当具有进行像素内插的颜色分量像素的相同颜色的颜色分量像素不位于具有高相关性的方向时,像素内插装置通过使用像素来改变与具有高相关性的方向正交的方向上的比例 在与具有高相关性的方向正交的方向上的颜色空间转换产生的值,并且基于该变化率执行像素插值。
    • 43. 发明授权
    • Data receiver and fail-safe circuit
    • 数据接收器和故障安全电路
    • US09236974B2
    • 2016-01-12
    • US14553814
    • 2014-11-25
    • MegaChips Corporation
    • Yasuhiro Fujimori
    • H04L1/00H04B1/12
    • H04L1/0002H03K19/0075H04B1/12H04L25/0276
    • A data receiver has a reception circuit and a fail-safe circuit. The reception circuit has an input amplifier, a logic signal processing circuit, and a reception stop control circuit. The fail-safe circuit has a high-pass filter, a comparator, and a pulse width extending circuit. The reception circuit receives a serial data of differential input signals based on a predetermined standard, converts the serial data into a serial data of a single-ended output signal, and outputs a converted serial data. The fail-safe circuit detects whether the differential input signals have a nonstandard small amplitude and outputs a fail-safe detection signal indicating a detection result.
    • 数据接收机具有接收电路和故障保护电路。 接收电路具有输入放大器,逻辑信号处理电路和接收停止控制电路。 故障安全电路具有高通滤波器,比较器和脉宽扩展电路。 接收电路基于预定标准接收差分输入信号的串行数据,将串行数据转换为单端输出信号的串行数据,并输出转换的串行数据。 故障保护电路检测差分输入信号是否具有非标准小幅度,并输出表示检测结果的故障安全检测信号。
    • 45. 发明授权
    • Output buffer circuit
    • 输出缓冲电路
    • US09195245B2
    • 2015-11-24
    • US14013467
    • 2013-08-29
    • MegaChips Corporation
    • Yuuki Nishizawa
    • H03B1/00G05F1/10H03F3/45
    • G05F1/10H03F3/45
    • A differential output buffer includes first and third switches and second and fourth switches which are connected in series respectively between a first voltage source and a current source, and a replica circuit includes a second voltage source which is equivalent to a first voltage source. A current control circuit controls a current flowing to the current source in such a manner that a voltage of a third node between two resistive elements connected in series between a first node between the first and third switches and a second node between the second and fourth switches and having an equal resistance value is equal to a reference voltage, for example, and a voltage control circuit generates a control signal in such a manner that a voltage of any node excluding an output terminal of the second voltage source in the current path is equal to a second reference voltage.
    • 差分输出缓冲器包括分别串联在第一电压源和电流源之间的第一和第三开关以及第二和第四开关,并且复制电路包括等效于第一电压源的第二电压源。 电流控制电路以这样的方式控制流向电流源的电流,使得在第一和第三开关之间的第一节点和第二和第四开关之间的第二节点之间串联连接的两个电阻元件之间的第三节点的电压 并且具有相等的电阻值等于参考电压,并且电压控制电路以这样的方式产生控制信号,使得除了当前路径中的第二电压源的输出端子之外的任何节点的电压相等 到第二参考电压。
    • 46. 发明申请
    • DATA PROCESSOR AND DATA PROCESSING METHOD
    • 数据处理器和数据处理方法
    • US20150281508A1
    • 2015-10-01
    • US14659795
    • 2015-03-17
    • MegaChips Corporation
    • Manabu KOTANI
    • H04N1/21H04N5/378H04N5/357H04N5/376
    • H04N5/367H04N1/32561
    • A plurality of pieces of first input data are input to a first decision circuit in an order based on a first rule. The memory has a plurality of first memory areas that respectively store a plurality of pieces of first data that match at least part of the plurality of pieces of first input data. The first decision circuit compares the first data read from the memory with the first input data to be input. When they do not match each other, The first decision circuit compares the first data with the first input data to be input next. When they match, The first decision circuit compares the first data read next from the memory on the basis of the first read pointer incremented with the first input data to be input next.
    • 基于第一规则,多个第一输入数据被输入到第一判定电路。 存储器具有分别存储与多条第一输入数据的至少一部分相匹配的多条第一数据的多个第一存储区。 第一判定电路将从存储器读取的第一数据与要输入的第一输入数据进行比较。 当它们不匹配时,第一判定电路将第一数据与接下来要输入的第一输入数据进行比较。 当它们相匹配时,第一判定电路根据第一读取指针比较下一个从存储器读出的第一个数据,该第一个读取指针与接下来要输入的第一个输入数据相加。
    • 47. 发明申请
    • DATA STORAGE CONTROL APPARATUS AND DATA STORAGE CONTROL METHOD
    • 数据存储控制装置和数据存储控制方法
    • US20150277776A1
    • 2015-10-01
    • US14659828
    • 2015-03-17
    • MegaChips Corporation
    • Akira OKAMOTOTomoaki Madanbashi
    • G06F3/06G06T9/00H04N19/426G06T1/60
    • H04N19/426H04N19/12H04N19/132H04N19/15H04N19/154H04N19/182H04N19/184H04N19/593H04N19/80
    • A compressed data generator compresses, by using a lossless compressor and a lossy compressor, image data in units of first blocks to generate a plurality of types of compressed data. A selector performs selection processing in units of second blocks each including a predetermined number N of first blocks, where N is an integer of 1 or more. The selection processing involves determining whether each of the plurality of types of compressed data satisfies a selection condition and selecting one piece of compressed data that satisfies the selection condition. The selection condition includes a data size condition that a data size of all the first blocks included in the second block is less than or equal to a predetermined value, and a data accuracy condition that information maintaining accuracy is highest among compressed data that satisfy the data size condition.
    • 压缩数据发生器通过使用无损压缩器和有损压缩器来压缩以第一块为单位的图像数据,以产生多种类型的压缩数据。 选择器以包括预定数量N个第一块的第二块为单位进行选择处理,其中N是1或更大的整数。 选择处理涉及确定多种类型的压缩数据中的每一种是否满足选择条件,并且选择满足选择条件的一条压缩数据。 选择条件包括数据大小条件,其中包括在第二块中的所有第一块的数据大小小于或等于预定值,以及在满足数据的压缩数据中信息维持精度最高的数据精度条件 尺寸条件。
    • 48. 发明授权
    • Method and apparatus for data capture in DDR memory interface
    • DDR存储器接口中数据采集的方法和装置
    • US09147463B1
    • 2015-09-29
    • US14224115
    • 2014-03-25
    • MegaChips Corporation
    • Dinakar Venkata SarrajuPurushotham Brahmavar Ramakrishna
    • G11C7/00G11C11/4076G11C11/409
    • G11C11/4076G11C7/22G11C7/222G11C11/409G11C11/4093G11C11/4096
    • A method for data acquisition in a memory system includes oversampling a data signal and a strobe signal with a multiphase clock having n phases to generate a series of data signals and a series of strobe signals representing a first data series and a first strobe series respectively, generating a second strobe series by edge detection of the first strobe series followed by retiming of the edge detected series, generating a third strobe series by edge adjustment of the second strobe series, wherein the edge adjustment ensures that there are no overlapping edges among the signals of the third strobe series, generating a sample selected series by linear shifting of each signal of the third strobe series by n/2, generating a second data series by retiming the first data series, generating a third data series by sample adjustment of the second data series, wherein the sample adjustment ensures that the third data series is in synchronization with a sampling window of the sample selected series, and determining a final data signal by multiplexing the third data series with the sample selected series.
    • 一种用于在存储器系统中进行数据采集的方法包括用具有n个相位的多相时钟对数据信号和选通信号进行过采样,以分别产生一系列数据信号和一系列选通信号,分别表示第一数据序列和第一选通序列, 通过第一选通序列的边缘检测产生第二选通序列,随后重新检测边缘检测到的序列,通过第二选通序列的边缘调整产生第三选通序列,其中边缘调整确保信号中没有重叠的边缘 通过对所述第三选通序列的每个信号进行线性移位乘以n / 2来产生采样选择的序列,通过重新定时所述第一数据序列产生第二数据序列,通过对所述第二选通序列的所述第二数据串进行样本调整来生成第三数据序列 数据序列,其中样本调整确保第三数据序列与所选样本的采样窗口同步 并且通过将第三数据序列与样本选择的系列进行多路复用来确定最终数据信号。
    • 50. 发明授权
    • Object detection method, storage medium, integrated circuit, and object detection apparatus
    • 物体检测方法,存储介质,集成电路和物体检测装置
    • US09122935B2
    • 2015-09-01
    • US14166070
    • 2014-01-28
    • MegaChips Corporation
    • Shohei Nomoto
    • G06K9/00G06K9/62G06K9/32G06T7/60
    • G06K9/00805G06K9/00825G06K9/3241G06K9/6201G06K9/6202G06T7/73G06T2207/30261
    • It is an object of the present invention to achieve an object detection apparatus, a program, and an integrated circuit each of which is capable of appropriately detecting an axially symmetric object in an image, whatever image is to be processed, without performing any complicated thresholding. The object detection apparatus includes a processing object region determination unit, a variance acquisition unit, a matching determination unit, and an object region detection unit. The processing object region determination unit sets a symmetry axis in an image region included in an image and divides the image region into a determination image region and a reference image region so as to be line symmetric with respect to the symmetry axis. The variance acquisition unit acquires a degree of variance of image feature amount in the image region. The matching determination unit acquires a matching value between the determination image region and the reference image region and determines the symmetry between the determination image region and the reference image region with respect to the symmetry axis on the basis of a corrected matching value which is obtained by correcting the acquired matching value in accordance with the degree of variance. The object region detection unit detects an image region which is line symmetric with respect to the symmetry axis on the basis of a determination result from the matching determination unit.
    • 本发明的目的是实现一种物体检测装置,程序和集成电路,其中每个能够适当地检测图像中的轴对称对象,无论何种图像被处理,而不执行任何复杂的阈值 。 物体检测装置包括处理对象区域确定单元,方差获取单元,匹配确定单元和对象区域检测单元。 处理对象区域确定单元在包括在图像中的图像区域中设置对称轴,并且将图像区域划分为相对于对称轴线对称的确定图像区域和参考图像区域。 方差获取单元获取图像区域中的图像特征量的方差。 匹配确定单元获取确定图像区域和参考图像区域之间的匹配值,并且基于经校正的匹配值确定相对于对称轴的确定图像区域和参考图像区域之间的对称性,该校正匹配值由 根据变化程度来校正获取的匹配值。 对象区域检测单元根据来自匹配确定单元的确定结果检测相对于对称轴线对称的图像区域。