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41. 发明申请

US20110031466A1 SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20110031466A1
公开(公告)日：2011-02-10
申请号：US12819874
申请日：2010-06-21
申请人： Yoshihisa KAGAWA , Tetsuya MIZUGUCHI , Ichiro FUJIWARA , Akira KOUCHIYAMA , Satoshi SASAKI , Naomi YAMADA
发明人： Yoshihisa KAGAWA , Tetsuya MIZUGUCHI , Ichiro FUJIWARA , Akira KOUCHIYAMA , Satoshi SASAKI , Naomi YAMADA
IPC分类号： H01L27/24 , H01L21/77 , H01L21/06
CPC分类号： H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/146 , H01L45/16 , H01L45/1633
摘要： Disclosed herein is a semiconductor memory device, including: a first electrode formed on a substrate; an ion source layer formed on an upper layer of the first electrode; and a second electrode formed on an upper layer of the ion source layer. Resistance change type memory cells in each of which either a surface of the first electrode or a surface of the ion source layer is oxidized to form a resistance change type memory layer in an interface between the first electrode and the ion source interface are arranged in a array.
摘要翻译：本文公开了一种半导体存储器件，包括：形成在衬底上的第一电极; 形成在所述第一电极的上层上的离子源层; 以及形成在所述离子源层的上层上的第二电极。将第一电极的表面或离子源层的表面氧化形成第一电极和离子源界面之间的界面中的电阻变化型存储层的电阻变化型存储单元配置在数组。

42. 发明授权

US07880192B2 Nitride semiconductor light emitting element and nitride semiconductor light emitting device 有权
标题翻译：氮化物半导体发光元件和氮化物半导体发光器件
公开(公告)号：US07880192B2
公开(公告)日：2011-02-01
申请号：US12159786
申请日：2006-12-27
申请人： Yoshiaki Hasegawa , Gaku Sugahara , Toshiya Yokogawa
发明人： Yoshiaki Hasegawa , Gaku Sugahara , Toshiya Yokogawa
IPC分类号： H01L21/06
CPC分类号： H01S5/34333 , B82Y20/00 , H01S5/0425 , H01S5/22
摘要： A nitride semiconductor device according to the present invention includes a n-GaN substrate 10 and a semiconductor multilayer structure arranged on the principal surface of the n-GaN substrate 10 and including a p-type region, an n-type region and an active layer between them. An SiO2 layer 30 with an opening and a p-side electrode, which makes contact with a portion of the p-type region of the semiconductor multilayer structure, are arranged on the upper surface of the semiconductor multilayer structure. An n-side electrode 36 is arranged on the back surface of the substrate 10. The p-side electrode includes a p-side contact electrode 32 that contacts with the portion of the p-type region and a p-side interconnect electrode 34 that covers the p-side contact electrode 2 and the SiO2 layer 30. Part of the p-side contact electrode 32 is exposed under the p-side interconnect electrode 34.
摘要翻译：根据本发明的氮化物半导体器件包括n-GaN衬底10和布置在n-GaN衬底10的主表面上并包括p型区，n型区和有源层的半导体多层结构它们之间。具有与半导体多层结构的p型区域的一部分接触的开口部和p侧电极的SiO2层30配置在半导体多层结构体的上表面。 n侧电极36配置在基板10的背面.p侧电极包括与p型区域的部分接触的p侧接触电极32和p侧配线电极34 覆盖p侧接触电极2和SiO 2层30. p侧接触电极32的一部分露出在p侧互连电极34的下方。

43. 发明申请

US20110001107A1 HOLLOW GST STRUCTURE WITH DIELECTRIC FILL 有权
标题翻译：中空结构与电介质填充
公开(公告)号：US20110001107A1
公开(公告)日：2011-01-06
申请号：US12824749
申请日：2010-06-28
申请人： JUN-FEI ZHENG
发明人： JUN-FEI ZHENG
IPC分类号： H01L45/00 , H01L21/06
CPC分类号： H01L45/124 , H01L45/06 , H01L45/144 , H01L45/1616 , H01L45/1641 , H01L45/1691
摘要： A memory cell structure, including a substrate having a via therein bound at first and second ends thereof by electrodes. The via is coated on side surfaces thereof with GST material defining a core that is hollow or at least partially filled with material, e.g., germanium or dielectric material. One or more of such memory cell structures may be integrated in a phase change memory device. The memory cell structure can be fabricated in a substrate containing a via closed at one end thereof with a bottom electrode, by conformally coating GST material on sidewall surface of the via and surface of the bottom electrode enclosing the via, to form an open core volume bounded by the GST material, optionally at least partially filling the open core volume with germanium or dielectric material, annealing the GST material film, and forming a top electrode at an upper portion of the via.
摘要翻译：一种存储单元结构，包括其第一端和第二端通过电极在其中结合的通孔的衬底。通孔在其侧表面上涂覆有GST材料，其中GST材料限定了中空的或至少部分地填充有材料（例如锗或电介质材料）的芯。这种存储单元结构中的一个或多个可以集成在相变存储器件中。存储单元结构可以通过在通孔的侧壁表面和包围通孔的底部电极的表面上保形地涂覆GST材料，在包含通孔闭合的通孔的基板中制造，形成开放芯体积由GST材料限定，任选地用锗或介电材料至少部分地填充开芯体积，退火GST材料膜，并在通孔的上部形成顶电极。

44. 发明授权

US07858501B2 Semiconductor wafer for semiconductor components and production method 有权
标题翻译：半导体晶圆半导体元件及生产方法
公开(公告)号：US07858501B2
公开(公告)日：2010-12-28
申请号：US11844185
申请日：2007-08-23
申请人： Hans-Joachim Schulze
发明人： Hans-Joachim Schulze
IPC分类号： H01L21/06 , H01L21/322
CPC分类号： H01L21/3225 , H01L21/2254 , H01L21/26506
摘要： A semiconductor wafer for semiconductor components and to a method for its production is disclosed. In one embodiment, the semiconductor wafer includes a front side with an adjoining near-surface active zone as basic material for semiconductor component structures. The rear side of the semiconductor wafer is adjoined by a getter zone for gettering impurity atoms in the semiconductor wafer. The getter zone contains oxygen precipitates. In the near-surface active zone, atoms of doping material are located on lattice vacancies. The atoms of doping material have a higher diffusion coefficient that the oxygen atoms.
摘要翻译：公开了一种用于半导体部件的半导体晶片及其制造方法。在一个实施例中，半导体晶片包括具有邻近的近表面活性区的前侧，作为半导体元件结构的基本材料。半导体晶片的后侧与用于吸收半导体晶片中的杂质原子的吸气区相邻。吸气区包含氧沉淀。在近表面活性区，掺杂材料的原子位于晶格空位上。掺杂原子具有较高的扩散系数，即氧原子。

45. 发明申请

US20100317149A1 Method of forming a memory device incorporating a resistance variable chalcogenide element 有权
标题翻译：形成包含电阻变化硫属元素元素的存储器件的方法
公开(公告)号：US20100317149A1
公开(公告)日：2010-12-16
申请号：US12819876
申请日：2010-06-21
申请人： Kristy A. Campbell
发明人： Kristy A. Campbell
IPC分类号： H01L21/06 , H01L21/02
CPC分类号： H01L45/143 , H01L45/085 , H01L45/1233 , H01L45/1641 , H01L45/1675 , Y10S438/90
摘要： A method of forming a memory device, such as a PCRAM, including selecting a chalcogenide glass backbone material for a resistance variable memory function and devices formed using such a method.
摘要翻译：一种形成诸如PCRAM的存储器件的方法，包括选择用于电阻变量存储器功能的硫族化物玻璃主链材料以及使用这种方法形成的器件。

46. 发明授权

US07842385B2 Coated nano particle and electronic device using the same 有权
标题翻译：涂层纳米颗粒和使用其的电子器件
公开(公告)号：US07842385B2
公开(公告)日：2010-11-30
申请号：US11434219
申请日：2006-05-16
申请人： Eun-joo Jang , Shin-ae Jun
发明人： Eun-joo Jang , Shin-ae Jun
IPC分类号： B32B5/16 , H01L23/532 , H01L21/06 , H01L21/18
CPC分类号： C01B19/007 , B82Y20/00 , B82Y30/00 , C01B19/002 , C01P2002/85 , C01P2004/04 , C01P2004/64 , C01P2004/80 , C01P2006/60 , C09K11/025 , C09K11/883 , Y10T428/24942 , Y10T428/256 , Y10T428/2991 , Y10T428/2998
摘要： A coated nano particle and an electronic device using the composite nano particle as an illuminator are provided. The composite nano particle includes a nano particle receiving light and emitting light; and a coating material formed on a surface of the nano particle and having an index of refraction different from that of the nano particle. The coated nano particle is made by coating a surface of the nano particle with a material having an index of refraction, which has an intermediate value between an index of refraction of a matrix and an index of refraction of the nano particle as an illuminator, with a predetermined thickness. The light emitted from the nano particle is efficiently transferred to the outside as the light reflected from the matrix and absorbed by the nano particle is suppressed. Therefore, a luminous efficiency of the illuminator is improved, and an electronic device using the illuminator is provided.
摘要翻译：提供了一种涂覆的纳米颗粒和使用复合纳米颗粒作为照明器的电子装置。复合纳米颗粒包括接收光并发射光的纳米颗粒; 以及形成在纳米颗粒的表面上并且具有与纳米颗粒的折射率不同的折射率的涂层材料。涂覆的纳米颗粒通过用具有折射率的材料涂覆纳米颗粒的表面而制成，所述材料具有在基质的折射率和作为照明器的纳米颗粒的折射率之间的中间值，预定厚度。从纳米颗粒发射的光被从基质反射的光并被纳米颗粒吸收的光被有效地转移到外面。因此，提高了照明器的发光效率，并且提供了使用照明器的电子装置。

47. 发明申请

US20100284218A1 SUPERLATTICE DEVICE, MANUFACTURING METHOD THEREOF, SOLID-STATE MEMORY INCLUDING SUPERLATTICE DEVICE, DATA PROCESSING SYSTEM, AND DATA PROCESSING DEVICE 失效
标题翻译：超级设备，其制造方法，包括超级设备的固态存储器，数据处理系统和数据处理设备
公开(公告)号：US20100284218A1
公开(公告)日：2010-11-11
申请号：US12772340
申请日：2010-05-03
申请人： Kazuo AIZAWA , Isamu Asano , Junji Tominaga , Alexander Kolobov , Paul Fons , Robert Simpson
发明人： Kazuo AIZAWA , Isamu Asano , Junji Tominaga , Alexander Kolobov , Paul Fons , Robert Simpson
IPC分类号： G11C11/34 , H01L29/66 , H01L21/06 , G11C29/00
CPC分类号： G11C13/0004 , G11C2213/55 , G11C2213/72 , G11C2213/79 , H01L45/065 , H01L45/144 , H01L45/1625
摘要： To include a superlattice laminate having laminated thereon a first crystal layer of which crystal lattice is a cubic crystal and in which positions of constituent atoms are reversibly replaced by application of energy, and a second crystal layer having a composition different from that of the first crystal layer, and an orientation layer that is an underlaying layer of the superlattice laminate and causes a laminated surface of the first crystal layer to be (111)-orientated. According to the present invention, the laminated surface of the first crystal layer can be (111)-orientated by using the orientation layer as an underlaying layer. In the first crystal layer of which laminated surface is (111)-orientated, a crystal structure reversibly changes when a relatively low energy is applied. Therefore, characteristics of a superlattice device having this crystal layer can be enhanced.
摘要翻译：为了包括其上层压有晶格为立方晶的第一晶体层，其中构成原子的位置被能量可逆地替代的超晶格层压体，以及具有与第一晶体不同的组成的第二晶体层层，以及作为超晶格层叠体的垫层的取向层，使第一结晶层的层叠表面（111）取向。根据本发明，通过使用取向层作为底层，第一晶体层的层叠表面可以是（111）取向的。在层叠表面为（111）取向的第一晶体层中，当施加相对低的能量时，晶体结构可逆地变化。因此，可以提高具有该晶体层的超晶格器件的特性。

48. 发明授权

US07795068B2 Method of making integrated circuit (IC) including at least one storage cell 有权
标题翻译：制造包括至少一个存储单元的集成电路（IC）的方法
公开(公告)号：US07795068B2
公开(公告)日：2010-09-14
申请号：US12136158
申请日：2008-06-10
申请人： David V. Horak , Chung H. Lam , Hon-Sum P. Wong
发明人： David V. Horak , Chung H. Lam , Hon-Sum P. Wong
IPC分类号： H01L21/00 , H01L21/06
CPC分类号： H01L45/06 , H01L27/2463 , H01L45/1233 , H01L45/1273 , H01L45/144 , H01L45/1691
摘要： A storage cell, integrated circuit (IC) chip with one or more storage cells that may be in an array of the storage cells and a method of forming the storage cell and IC. Each storage cell includes a stylus, the tip of which is phase change material. The phase change tip may be sandwiched between an electrode and conductive material, e.g., titanium nitride (TiN), tantalum nitride (TaN) or n-type semiconductor. The phase change layer may be a chalcogenide and in particular a germanium (Ge), antimony (Sb), tellurium (Te) (GST) layer.
摘要翻译：具有一个或多个存储单元的存储单元，集成电路（IC）芯片，其可以是存储单元阵列，以及形成存储单元和IC的方法。每个存储单元包括触针，其尖端是相变材料。相变尖端可以夹在电极和导电材料之间，例如氮化钛（TiN），氮化钽（TaN）或n型半导体。相变层可以是硫族化物，特别是锗（Ge），锑（Sb），碲（Te）（GST）层。

49. 发明授权

US07785923B2 Phase change memory device preventing contact loss and method for manufacturing the same 失效
标题翻译：防止接触损耗的相变存储器件及其制造方法
公开(公告)号：US07785923B2
公开(公告)日：2010-08-31
申请号：US12211239
申请日：2008-09-16
申请人： Heon Yong Chang , Sang Heon Kim
发明人： Heon Yong Chang , Sang Heon Kim
IPC分类号： H01L21/06
CPC分类号： H01L45/126 , G11C13/0004 , H01L27/2409 , H01L45/06 , H01L45/1233
摘要： A phase change memory device includes a silicon substrate having a phase change cell region. A plurality of phase change cell are formed in the phase change region of the silicon substrate. A contact comprising a first contact and a second contact is formed on each of the phase change cells. A plurality of bit lines are electrically connected to the contacts. A contact plug is formed on the silicon substrate in a region outside of the phase change cell region, and a word line is formed over the silicon substrate and is connected to the contact plug.
摘要翻译：相变存储器件包括具有相变单元区域的硅衬底。在硅衬底的相变区域中形成多个相变单元。在每个相变单元上形成包括第一触点和第二触点的触点。多个位线电连接到触点。在硅衬底上形成在相变单元区域外的区域中的接触插塞，并且在硅衬底上形成字线并连接到接触插头。

50. 发明申请

US20100210068A1 Method of forming phase change memory device 审中-公开
标题翻译：形成相变存储器件的方法
公开(公告)号：US20100210068A1
公开(公告)日：2010-08-19
申请号：US12591772
申请日：2009-12-01
申请人： Won-jun Lee , Jin-woo Park , Byoung-moon Yoon , Cheol-woo Park
发明人： Won-jun Lee , Jin-woo Park , Byoung-moon Yoon , Cheol-woo Park
IPC分类号： H01L21/06
CPC分类号： H01L45/143 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1675
摘要： Provided is a method of forming a phase change memory device, the method including washing and rinsing a phase change device structure. A phase change material layer may be formed on a semiconductor substrate. The phase change material layer may be etched so as to form a phase change device structure. The semiconductor substrate on which the phase change device structure is formed may be washed using a washing solution including a reducing agent containing fluorine (F), a pH controller, a dissolution agent and water. In addition, the semiconductor substrate on which the washing is performed may be rinsed.
摘要翻译：提供一种形成相变存储器件的方法，该方法包括洗涤和漂洗相变装置结构。相变材料层可以形成在半导体衬底上。相变材料层可以被蚀刻以形成相变器件结构。可以使用包含含氟还原剂（F），pH控制剂，溶解剂和水的洗涤溶液洗涤其上形成相变器件结构的半导体衬底。此外，可以冲洗其上进行洗涤的半导体衬底。

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