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    • 59. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US06392945B2
    • 2002-05-21
    • US09769547
    • 2001-01-25
    • Akira Sato
    • Akira Sato
    • G11C702
    • G11C8/08
    • A semiconductor memory device is provided which enables faults in a word line to be redressed with almost no increase in chip size and which does not cause layout problems even in advanced miniaturization. A driver simultaneously drives four word lines. A memory cell connected to these word lines is selected by a selection transistor. Using wiring for connecting word lines, two adjacent word lines are connected at the far end as seen from the driver to form a loop. If a fault occurs at a location on a word line, the driver supplies a charge to the word line from the far end thereof to the fault location via the above wiring and the other word line. Therefore, the word potential at the far end past the fault location is at or above a memory cell threshold voltage, and the memory cell can be read correctly.
    • 提供了半导体存储器件,其使得字线中的故障能够被修正,几乎不增加芯片尺寸,即使在高级小型化中也不会引起布局问题。 驱动程序同时驱动四个字线。 连接到这些字线的存储单元由选择晶体管选择。 使用用于连接字线的布线,从驱动器看,两个相邻的字线连接在远端,形成一个环路。 如果在字线上的某个位置出现故障,则驱动器通过上述布线和另一个字线向字线从远端向故障位置提供电荷。 因此,超过故障位置的远端的字电位处于或高于存储单元阈值电压,并且可以正确地读取存储单元。
    • 60. 发明授权
    • Multilevel storage semiconductor memory read circuit
    • 多层存储半导体存储器读取电路
    • US06377497B2
    • 2002-04-23
    • US09748035
    • 2000-12-22
    • Akira Sato
    • Akira Sato
    • G11C700
    • G11C11/5642G11C7/06G11C7/1006G11C8/14G11C11/56G11C16/08G11C16/32G11C2211/5642
    • In a read circuit, a sense amplifier amplifies a current flowing in a cell and determining whether the cell is an ON cell or an OFF cell. A latch circuit group consists of latch circuits latching output data from the sense amplifier. An encoder circuit converts the latched data into binary data. An output circuit outputs the encoded data. A stop and correction circuit stops an operation of a first-stage or third-stage sense amplifier circuit based on an output result of a second-stage latch circuit and applies a signal expected to be outputted from the sense amplifier which is being stopped, as a latch input signal L0.
    • 在读取电路中,读出放大器放大在单元中流动的电流并确定单元是ON单元还是OFF单元。 锁存电路组由锁存电路组成,其锁存来自读出放大器的输出数据。 编码器电路将锁存的数据转换为二进制数据。 输出电路输出编码数据。 停止和校正电路基于第二级锁存电路的输出结果停止第一级或第三级读出放大器电路的操作,并将预期从正在停止的读出放大器输出的信号作为 锁存输入信号L0。